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MIC2186
User Manual
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Micrel MIC2186 User Manual

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MIC2186
Low Voltage PWM Control IC
Final Information
General Description
Micrel’s MIC2186 is a high efficiency boost PWM control IC. With its wide input voltage range of 2.9V to 14V, the MIC2186 can be used to efficiently boost voltages in 1- or 2-cell Li Ion battery powered applications, as well as to boost voltages in fixed 3.3V, 5V, or 12V systems. Its powerful 1.6Ω output driver allows the MIC2186 to supply large output currents with the selection of proper external MOSFETs.
The MIC2186 can be configured to operate at 100kHz, 200kHz, or 400kHz. With it’s fixed frequency PWM architec­ture, and easily synchronized drive, the MIC2186 is ideal for noise-sensitive telecommunications applications.
0.5µA and programmable undervoltage lockout. A manually selectable SKIP Mode allows high efficiencies in light load situations.
The MIC2186 is available in 16 pin SOIC and QSOP package options with an operating range from –40°C to 125°C.
Features
• Input voltage range: 2.9V to 14V
• 1.6Ω output driver
• Oscillator frequency of 100kHz/200kHz/400kHz
• Frequency sync to 600kHz
• Front edge blanking
• PWM Current Mode Control
• Selectable light load SKIP mode
• 600µA quiescent current (SKIP-Mode)
• 0.5µA shutdown current
• Cycle-by-Cycle current limiting
• Frequency foldback protection
• Adjustable under-voltage lockout
• Precision 1.245V reference output
• 16 pin SOIC and QSOP package options
• Selectable 50% maximum duty cycle for flyback applica-
tions
Applications
• DC power distribution systems
• Wireless Modems
• ADSL line cards
• SLIC power supplies
• 1-and 2-cell Li Ion battery operated equipment
T ypical Application
= 3.3V
V
IN
C
IN
120µF
20V
Ordering Information
Part Number Frequency Voltage Ambient Temp. Range Package
MIC2186BM 100kHz/200kHz/400kHz Adj –40°C to +125°C 16-lead SOP MIC2186BQS 100kHz/200kHz/400kHz Adj –40°C to +125°C 16-lead QSOP
VINP
FB
CSH
MBR2535CT
16
6
14
9
12
Si4404DY (x2)
4.5mΩ
V
OUT
C
OUT
150µF(x2) 20V
= 12V
12V Output Efficienc
95 90 85 80 75 70
EFFICIENCY (%)
65 60
0 0.5 1 1.5 2 2.5 3
OUTPUT CURRENT (A)
VIN = 3.3V
1
VINA
7
EN/UVLO
13
HIDC
15
FREQ/2
10
VDD
4
COMP
8
VREF
2
SKIP
11
SYNC
2.2µH
MIC2186
SS
3
SGND
OUTN
PGND
5
Adjustable Output Boost Converter
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
July 2002 1 MIC2186
MIC2186 Micrel
Pin Configuration
COMP
SGND
EN/UVLO
VREF
16-pin Narrow Body SOP (M)
Pin Description
Pin Number Pin Name Pin Function
1 VINA Input voltage to control circuitry (2.9V to 14V). 2 SKIP SKIP (Input): Regulator operates in PWM mode (no pulse skipping) when
3 SS Soft start reduces the inrush current and delays and slows the output voltage
4 COMP Compensation (Output): Internal error amplifier output. Connect to a
5 SGND Small signal ground: must be routed separately from other grounds to the (-)
6 FB Feedback Input - regulates FB to 1.245V. 7 EN/UVLO Enable/Undervoltage Lockout (input): A low level on this pin will power down
8 VREF The 1.245V reference is available on this pin. A 0.1µF capacitor should be
9 CSH The (+) input to the current limit comparator. A built in offset of 100mV
10 VDD 3V internal linear-regulator output. Vdd is also the supply voltage bus for the
11 SYNC Frequency Synchronization (Input): Connect an external clock signal to
12 PGND MOSFET driver power ground, connects to the bottom of the current sense
13 HIDC High Duty Cycle. Sets duty cycle and frequency along with Freq/2. Logic
14 OUTN High current drive for N channel MOSFET. Voltage swing is from ground to
15 FREQ/2 Sets duty cycle and frequency along with HiDC. See applications section for
16 VINP Power input voltage to the gate drive circuitry (2.9V to 14V). This pin is
SKIP
SS
FB
1VINA 2 3 4 5 6 7 8
16 VINP
FREQ/2
15
OUTN
14
HIDC
13
PGND
12
SYNC
11
VDD
10
CSH
9
16-pin QSOP (QS)
pin is pulled low, and skip mode when raised to Vdd. There is no automatic switching between PWM and skip mode available on this device.
rise time. A 5µA current source will charge the capacitor up to Vdd.
capacitor or series RC network to compensate the regulator’s control loop.
terminal of Cout.
the device, reducing the quiescent current to under 0.5µA. This pin has two separate thresholds, below 1.5V the output switching is disabled, and below
0.9V the device is forced into a complete micropower shutdown. The 1.5V threshold functions as an accurate undervoltage lockout (UVLO) with 135mV hysteresis.
connected form this pin to SGnd.
between CSH and SGnd in conjunction with the current sense resistor sets the current limit threshold level. This is also the (+) input to the current amplifier.
chip. Bypass to SGND with 1µF. Maximum source current is 0.5mA.
synchronize the oscillator. Leading edge of signal above 1.5V starts switch­ing cycle. Connect to SGND if not used.
resistor and the (–) terminal of CIN.
HIGH sets 85% maximum duty cycle. Logic LOW sets 50% maximum duty cycle. See applications section for more information.
VIN. RON is typically 1.6Ω.
more information.
normally connected to the output voltage.
MIC2186 2 July 2002
MIC2186 Micrel
Absolute Maximum Ratings (Note 1)
Supply Voltage (VINA, VINP) .........................................15V
Digital Supply Voltage (V SKIP Pin Voltage (V
SKIP
Max Duty Cycle Pin Voltage (V Frequency Divider Pin Voltage (V Sync Pin Voltage (V
SYNC
Comp Pin Voltage (V Feedback Pin Voltage (V Enable Pin Voltage (V Current Sense Voltage (V Power Dissipation (P
) ...........................................7V
DD
) ................................. –0.3V to 7V
)................ –0.3V to 7V
HIDC
) ........ –0.3V to 7V
FREQ/2
) ................................ –0.3V to 7V
).............................. –0.3V to 3V
COMP
) ............................ –0.3V to 3V
FB
EN/UVLO
)
D
) ...................... –0.3V to 15V
)......................... –0.3V to 1V
CSH
Operating Ratings (Note 2)
Supply Voltage (VINA, VINP) ........................ +2.9V to +14V
Operating Ambient Temperature.........–40°C ≤ T
Junction Temperature ....................... –40°C ≤ T
PackageThermal Resistance
16-lead SOP ...............................................100°C/W
θ
JA
θJA 16-lead QSOP.............................................163°C/W
≤ +85°C
A
≤ +125°C
J
16 lead SOP ..............................400mW @ TA = 85°C
16 lead QSOP ...........................245mW @ TA = 85°C
Ambient Storage Temp ............................–65°C to +150°C
ESD Rating (Note 3)
Electrical Characteristics
VINA = 5V, VINP = V indicate –40°C < TJ < +125°C.
Parameter Condition Min Typ Max Units Regulation
Feedback Voltage Reference (±1%) 1.233 1.245 1.258 V
Feedback Bias Current 50 nA Output Voltage Line Regulation 3V ≤ VINA ≤ 9V +0.08 % / V Output Voltage Load Regulation 0mV ≤ CSH ≤ 75mV –1.2 %
Input & VDD Supply
VINA Input Current, PWM mode V VINP Input Current, PWM mode V VINA Input Current, SKIP mode V Shutdown Quiescent Current VEN/UVLO = 0V; (I Digital Supply Voltage (VDD) IL = 0 2.82 3.0 3.18 V Digital Supply Load Regulation IL = 0 to 0.5mA 0.03 V Undervoltage Lockout VDD upper threshold (turn on threshold) 2.9 2.75 V
Reference Output (V
Reference Voltage (±1.5%) 1.226 1.245 1.264 V
Reference Voltage Line 5V < VinA < 9V 2 mV Regulation
Reference Voltage Load 0 < I Regulation
= 12V, SKIP = 0V, FREQ/2 = 0V, HiDC = 3V, V
OUT
(±2%) 1.220 1.270 V 3V ≤ VINA ≤ 9V; 0mV ≤ CSH ≤ 75mV; (±3%) 1.208 1.245 1.282 V
= 0V 0.7 mA
SKIP
= 0V (excluding external MOSFET gate current) 2.8 mA
SKIP
= 5V 0.6 mA
SKIP
+ I
VINA
VDD lower threshold (turn off threshold) 2.65 V
)
REF
(±2.5%) 1.213 1.276 V
< 100µA1mV
REF
= 0V, TJ = 25°C, unless otherwise specified. Bold values
CSH
) 0.5 5 µA
VINP
July 2002 3 MIC2186
MIC2186 Micrel
Parameter Condition Min Typ Max Units Enable/UVLO
Enable Input Threshold 0.6 0.9 1.2 V UVLO Threshold 1.4 1.5 1.6 V UVLO Hysteresis 140 mV Enable Input Current V
EN/UVLO
Soft Start
Soft Start Current 5 µA
Current Limit
Current Limit Threshold Voltage (Voltage on CSH to trip current limit) 80 100 120 mV
Error Amplifier
Error Amplifier Gain 20 V/V
Current Amplifier
Current Amplifier Gain 3.7 V/V
SKIP Input
SKIP Threshold 0.6 1.4 2.2 V SKIP Input Current V
SKIP
HIDC Input
HIDC Threshold 0.6 1.4 2.2 V
Oscillator Section
Oscillator Frequency (fO) 360 400 440 kHz Maximum Duty Cycle V
FB
VFB = 1.0V, V Minimum On Time VFB = 1.5V, V FREQ/2 Frequency (fO)V
HiDC
Frequency Foldback Threshold Measured on FB 0.3 V Frequency Foldback Frequency V
HiDC
SYNC Threshold Level 0.6 1.4 2.2 V SYNC Input Current 0.1 5 µA SYNC Minimum Pulse Width 200 ns SYNC Capture Range Note 4
Gate Drivers
Rise/Fall Time CL = 3300pF 50 ns Output Driver Impedance source; VINP = 12V 1.8 4 Ω
sink; VINP = 12V 1.6 3.5 Ω
source; VINP =5V 2.6 Ω
sink; VINP = 5V 2.4 Ω
= 5V 0.2 5 µA
= 3V 0.1 5 µA
= 1.0V, V
= 3V, V
= 3V, V
= 3V 85 %
HIDC
= 0V 50
HIDC
= 3V 180 ns
HiDC
= 3V 170 200 230 kHz
FREQ/2
= 0V 90 kHz
FREQ/2
fO + 15 %
600 kHz
Note 1. Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when
Note 2. The device is not guaranteed to function outside its operating rating. Note 3. Devices are ESD sensitive. Handling precautions recommended. Note 4. See application information for limitations on maximum operating frequency.
operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction temperature, T
, the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA.
J(max)
MIC2186 4 July 2002
MIC2186 Micrel
0
0.5
1
1.5
2
2.5
3
3.5
4
0 2 4 6 8 10 12 14 16
I
Q
(mA)
INPUT VOLTAGE (V
INA
)
Quiescent Current vs.
Input Voltage(PWM Mode)
400kHz
200kHz
100kHz
VINP =12V
DC
IQ = I
QVINA+IQVINP
)
)
1.244
1.2442
1.2444
1.2446
1.2448
1.245
1.2452
0 2 4 6 8 10 12 14 16
REFERENCE VOLTAGE (V)
INPUT VOLTAGE (V
INA
)
Reference Voltage
vs. Input Voltage
VINP = 12V
DC
2.80
2.85
2.90
2.95
3.00
3.05
3.10
02468101214
VDD (V)
INPUT VOLTAGE (V
INA
)
VDD vs.
Input Voltage
VINP = 12V
DC
0
50
100
150
200
250
300
02468101214
IENABLE (µA)
VENABLE (V)
Ienable vs.
Venable
VINP = 12V
DC
VINA = 5V
DC
85°C
–40°C
20°C
Typical Characteristics
Quiescent Current vs.
Temperature (SKIP Mode)
0.8
0.7
0.6
0.5
(mA)
0.4
0.3
Q(SKIP)
I
0.2
0.1 0
-40 -20 0 20 40 60 80 100
VINA = 5V
DC
VINP = 12V IQ = I
QVINA+IQVINP
TEMPERATURE (°C)
DC
Quiescent Current vs.
Input Voltage(PWM Mode
4
3.5 3
2.5
(mA)
2
1.5
Q(PWM)
I
1
0.5 0
0 2 4 6 8 10 12 14 16
INPUT VOLTAGE (V
VINP = 12V
VINP = 9V
VINP = 5V
IQ = I
QVINA
fS = 400kHz
+ I
INA
QVINP
)
Quiescent Current vs.
Temperature (PWM Mode)
3.65
3.6
3.55
(mA)
3.5
Q(PWM)
3.45
I
3.4
3.35
-60 -40 -20 0 20 40 60 80 100
VINA = 5V
DC
VINP = 12V IQ = I
DC
QVINA+IQVINP
TEMPERATURE (°C)
Quiescent Current vs.
Input Voltage (SKIP Mode
0.9
0.85
0.8
0.75 VINP = 5V
0.7
(mA)
Q
I
0.65
0.6
0.55
0.5 0 2 4 6 8 10 12 14 16
INPUT VOLTAGE (V
VINP = 9V
DC
VINP = 12V
INA
DC
DC
)
1.2451
1.245
1.2449
1.2448
1.2447
1.2446
1.2445
1.2444
REFERENCE VOLTAGE (V)
1.2443
3.035
3.030
3.025
3.020
July 2002 5 MIC2186
3.015
VDD (V)
3.010
3.005
3.000
2.995
Reference Voltage
vs. Reference Current
VINP = 12V
VINA = 5V
0 20406080100120
REFERENCE CURRENT (µA)
DC
DC
VDD vs.
Load Current
VINP = 12V
VINA = 5V
0 0.2 0.4 0.6 0.8 1 1.2
IVDD (mA)
DC
DC
Reference Voltage
vs. Temperature
1.2454
1.2452
1.2450
1.2448
1.2446
1.2444
1.2442
1.2440
1.2438
REFERENCE VOLTAGE (V)
1.2436
-40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
VINP = 12V
VINA = 5V
VDD vs.
Temperature
3.08 VINP = 12V
3.06
VINA = 5V
3.04
3.02
3.00
VDD (V)
2.98
2.96
2.94
-60 -40 -20 0 20 40 60 80 100
DC
DC
TEMPERATURE (°C)
DC
DC
MIC2186 Micrel
Oscillator Frequency
vs. Input Voltage
406
VINP = 12V
404 402 400 398 396 394 392
OSCILLATOR FREQUENCY (kHz)
02468101214
DC
INPUT VOLTAGE (V
INA
Oscillator Frequency
vs. Temperature
405 400 395 390 385 380 375 370 365
OSCILLATOR FREQUENCY (kHz)
-50 -30 -10 10 30 50 70 90
)
TEMPERATURE (°C)
VINP = 12V VINA = 5V
DC
DC
4.75
4.70
4.65
4.60
4.55
4.50
4.45
4.40
4.35
4.30
SOFT START CURRENT (µA)
4.25
-50 -30 -10 10 30 50 70 90
Soft Start
vs. Temperature
VINP = 12V VINA = 5V
TEMPERATURE (°C)
DC
DC
Overcurrent Threshold
vs. VINA
100
90 80 70 60 50 40 30 20 10
0
OVERCURRENT THRESHOLD (mV)
0 2 4 6 8 10 12 14 16
VINP = 12V
VINA (V)
DC
MIC2186 6 July 2002
MIC2186 Micrel
Functional Diagram
V
IN
C
IN
V
IN
16
OutN 14
L1
P
D1
V
OUT
C
OUT
EN/UVLO
SKIP
C
DECOUP
A
V
IN
1
V
7
On
2
Control
Bias
REF
V
DD
fs/4
Overcurrent Reset
Freq/2
15
Sync
V
DD
HiDC
Soft Start
COMP
Osc
11
13
3
4
Corrective
Ramp
Reset
PWM Comparator
Error
Amplifier
gm = 0.0002
Gain = 20
Gain = 3.7
V
REF
100k
fs/4
V
REF
8
V
DD
10
V
REF
Frequency
V
DD
S
GND
5S
GND
Foldback
P
GND
0.1V
Overcurrent Comparator
P
0.3V
GND
CSH 9
P 12
V 6
R
SENSE
GND
R1
fb
R2
Figure 1. MIC2186 PWM Block Diagram
Functional Description
The MIC2186 is a BiCMOS, switched mode multi-topology controller. It will operate most low side drive topologies including boost, SEPIC, flyback and forward. The controller has a low impedance driver capable of switching large N­channel MOSFETs. It features multiple frequency and duty cycle settings. Current mode control is used to achieve superior transient line and load regulation. An internal correc­tive ramp provides slope compensation for stable operation above a 50% duty cycle. The controller is optimized for high efficiency, high performance DC-DC converter applications. Figure 1 shows a block diagram of the MIC2186 configured as a PWM boost converter.
July 2002 7 MIC2186
The switching cycle starts when OutN goes high and turns on the low side, N-channel MOSFET, Q1. The Vgs of the MOSFET is equal to VINP. This forces current to ramp up in the inductor. The inductor current flows through the current sense resistor, Rsense. The voltage across the resistor is amplified and combined with an internal ramp for stability. This signal is compared with the error voltage signal from the error amplifier. When the current signal equals the error voltage signal, the low side MOSFET is turned off. The inductor current then flows through the diode, D1, to the output. The MOSFET remains off until the beginning of the next switching cycle.
MIC2186 Micrel
V
IN
C
C
DECOUP
A
V
IN
1
V
EN/UVLO
7
SKIP
V
DD
HiDC
2
13
Control
Bias
On
REF
V
DD
IN
L1
V
P
IN
16
D1
V
OUT
C
OutN 14
Q1
OUT
Freq/2
Sync
Soft Start
COMP
V
P
V
REF
1.245V
GND
CSH 9
R
SENSE
P
P
GND
GND
12
15
11
3
4
F/2=H 2us off-time
Osc
F/2=L 1us off-time
Current
Reset
50mV
Skip Current
Limit Comparator
R1
V
REF
8
V
DD
10
V
REF
Hysteresis
V
DD
S
GND
5S
GND
Comparator
±1%
fb
6
R2
Figure 2. MIC2186 SKIP Mode Block Diagram
The description of the MIC2186 controller is broken
down into 6 basic functions.
• Control Loop
• PWM Operation
• SKIP Mode Operation
• Current Limit
• MOSFET gate drive
• Reference, enable & UVLO
• Oscillator & Sync
• Soft start
Control Loop PWM and SKIP modes of operation
The MIC2186 can operate in either PWM (pulse width modu­lated) or SKIP mode. The efficiency of the boost converter can be improved at lower output loads by manually selecting the skip mode of operation. The potential disadvantage of skip mode is the variable switching frequency that accompa­nies this mode of operation. The occurrence of switching pulses depends on component values as well as line and load conditions. PWM mode is the best choice of operation at higher output loads. PWM mode has the advantages of lower output ripple voltage and higher efficiencies at higher output loads. Pulling the SKIP pin (pin 3) low will force the controller to operate in PWM mode for all load conditions. Pulling the SKIP pin high will force the controller to operate in SKIP mode.
MIC2186 8 July 2002
MIC2186 Micrel
I
50mV
R
INDUCTOR_pk
SENSE
=
SKIP Mode Operation
This control method is used to improve efficiency at low output loads. A block diagram of the MIC2186 SKIP mode is shown in Figure 2. The power drawn by the MIC2186 control IC is (I
A · VINA )+ (I
VIN
P · VINP). The power dissipated by
VIN
the IC can be a significant portion of the total output power during periods of low output current, which lowers the effi­ciency of the power supply. In SKIP mode the MIC2186 lowers the IC supply current by turning off portions of the control and drive circuitry when the IC is not switching. The disadvantage of this method is greater output ripple and variable switching frequency. The soft start, HiDC and Sync pins have no effect when operating in SKIP mode.
In SKIP mode, switching starts when the feedback voltage drops below the lower threshold level of the hysteresis comparator. The OutN pin goes high, turning on the N­channel MOSFET, Q1. Current ramps up in the inductor until either the current limit comparator or the hysteretic voltage comparator turns off Q1’s gate drive. If the feedback voltage exceeds the upper hysteretic threshold, Q1’s gate drive is terminated. However, if the voltage at the CSH pin exceeds the SKIP mode current limit threshold, it terminates the gate drive for that switching cycle. The gate drive remains off for a constant period at the end of each switching cycle. This off time period is typically 1µs when the F/2 pin is low and 2µs when the F/2 pin is high. Figure 3 shows some typical SKIP mode switching waveforms.
SKIP Mode Waveforms
TIME (10µs/div)
V
= 3V
IN
VO = 9V IO = 0.6A
I
@5A/div
IND
MOSFET gate drive @ 10V/div
Switch Node Voltage (MOSFET Drain) @10V/div
VOUT Ripple Voltage @100mV/div
Figure 3. SKIP Mode Waveform
The SKIP mode current threshold limits the peak inductor current per cycle. Depending on the input, output and circuit parameters, many switching cycles can occur before the feedback voltage exceeds the upper hysteretic threshold. Once the voltage on the feedback pin exceeds the upper hysteretic threshold the gate drive is disabled. The output load discharges the output capacitance causing Vout to decrease until the feedback voltage drops below the lower threshold voltage limit. The switching converter then turns the gate drive back on. While the gate drive is disabled, the MIC2186 draws less IC supply current then while it is switch­ing, thereby improving efficiency at low output loads. Figure 4 shows the efficiency improvement at low output loads when SKIP mode is selected.
Low Current
80 70 60 50 40 30
EFFICIENCY (%)
20 10
0
0 0.05 0.1 0.15 0.2 0.25
Efficiency
PWM Mode
SKIP Mode
INPUT CURRENT (A)
Figure 4.
The maximum peak inductor current depends on the skip current limit threshold and the value of the current sense resistor, Rsense. For a typical 50mV current limit threshold in SKIP Mode, the peak inductor current is:
The maximum output current is SKIP mode depends on the input conditions, output conditions and circuit component values. Assuming a discontinuous mode where the inductor current starts from zero at each cycle, the maximum output current is calculated below:
−
I
O(max)
=
2.5 10 L fs
2R V V
××−×
SENSE
3
×××
2
η
()
O
IN
where:
Iomax is the maximum output current Vo is the output voltage Vin is the input voltage L is the value of the boost inductor fs is the switching frequency η is the efficiency of the boost converter Rsense it the value of the current sense resistor
2.5·10-3 is a constant based on the SKIP mode current threshold (50mV)
2
PWM Operation
Figure 5 shows typical waveforms for PWM mode of opera­tion. The gate drive signal turns on the external MOSFET which allows the inductor current to ramp up. When the MOSFET turns off, the inductor forces the MOSFET drain voltage to rise until the boost diode turns on and the voltage is clamped at approximately the output voltage.
July 2002 9 MIC2186
MIC2186 Micrel
I
VVV
2fsLV
CRIT
IN
2
O
IN
O
2
=
×−
()
×
×××
η
PWM Mode Waveforms
Inductor Current @
Conditions:
V
= 3V
IN
VO = 9V
= 0.6A
I
O
TIME (1µs/div)
1A/div
MOSFET gate drive @ 10V/div
Switch Node Voltage (MOSFET Drain) @10V/div
VOUT Ripple Voltage @50mV/div
Figure 5 - PWM mode waveforms
The MIC2186 uses current mode control to improve output regulation and simplify compensation of the control loop. Current mode control senses both the output voltage (outer loop) and the inductor current (inner loop). It uses the inductor current and output voltage to determine the duty cycle (D) of the buck converter. Sampling the inductor current effectively removes the inductor from the control loop, which simplifies compensation. A simplified current mode control diagram is shown in Figure 6.
I_inductor
V
IN
Voltage
Divider
I_inductor
Gate Driver
V
I_inductor
REF
Current Sensing and Overcurrent Protection
The inductor current is sensed during the switch on time by a current sense resistor located between the source of the MOSFET and ground (Rsense in Figure 1). Exceeding the current limit threshold will immediately terminate the gate drive of the N-channel MOSFET, Q1. This forces the Q1 to operate at a reduced duty cycle, which lowers the output voltage. In a boost converter, the overcurrent limit will not
protect the power supply or load during a severe overcurrent condition or short circuit condition. If the
output is short-circuited to ground, current will flow from the input, through the inductor and output diode to ground. Only the impedance of the source and components limits the current.
The critical value of output current in a boost converter is calculated below. The operating mode is discontinuous if the output current is below this value and is continuous if above this value.
I_inductor
V
COMP
Gate Drive at OutN
T
ON
T
PER
Figure 6: PWM Control Loop
A block diagram of the MIC2186 PWM current mode control loop is shown in Figure 1. The inductor current is sensed by measuring the voltage across a resistor, Rsense. The current sense amplifier buffers and amplifies this signal. A ramp is added to this signal to provide slope compensation, which is required in current mode control to prevent unstable opera­tion at duty cycles greater than 50%.
where:
η is the efficiency of the boost converter Vin is the minimum input voltage L is the value of the boost inductor Fs is the switching frequency
Vo is the output voltage Maximum Peak Current in Discontinuous Mode: The peak inductor current is:
I
IND(pk)
2I V V
×× −×
=
OO
η
()
×
Lfs
IN
where:
Io is the maximum output current Vo is the output voltage Vin is the minimum input voltage L is the value of the boost inductor fs is the switching frequency η is the efficiency of the boost converter
The maximum value of current sense resistor is:
MIC2186 10 July 2002
MIC2186 Micrel
V
R
SENSE
=
SENSE
I
IND(pk)
where:
Vsense is the minimum current sense threshold of the CSH pin
Maximum Peak Current in Continuous Mode:
The peak inductor current is equal to the average inductor current plus one half of the peak to peak inductor current.
The peak inductor current is:
II
=+×
IND(pk) IND(ave) IND(pp)
VI
=
V
OO IN
I
IND(pk)
1 2
VVV
×
+
×
I
×−×
()
L
O
2 V fs L
×××η
O
η
IN
where:
Io is the maximum output current Vo is the output voltage Vin is the minimum input voltage L is the value of the boost inductor fs is the switching frequency η is the efficiency of the boost converter VL is the voltage across the inductor
VL may be approximated as Vin for higher input voltage. However, the voltage drop across the inductor winding resis­tance and low side MOSFET on-resistance must be ac­counted for at the lower input voltages that the MIC2186 operates at.
VI
×
VV
=−
LIN
OO
V
×
η
IN
RR
×+
()
WINDING DSON
where:
Rwinding is the winding resistance of the inductor Rdson is the on resistance of the low side switching
MOSFET
The maximum value of current sense resistor is:
V
R
SENSE
=
SENSE
I
IND(pk)
where:
V
is the minimum current sense threshold
SENSE
of the CSH pin
The current sense pin, CSH, is noise sensitive due to the low signal level. The current sense voltage measurement is referenced to the signal ground pin of the MIC2186. The current sense resistor ground should be located close to the IC ground. Make sure there are no high currents flowing in this trace. The PCB trace between the high side of the current sense resistor and the CHS pin should also be short and routed close to the ground connection. The input to the internal current sense amplifier has a 30nS dead time at the beginning of each switching cycle. This dead time prevents leading edge current spikes from prematurely terminating the
switching cycle. A small RC filter between the current sense pin and current sense resistor may help to attenuate larger switching spikes or high frequency switching noise. Adding the filter slows down the current sense signal, which has the effect of slightly raising the overcurrent limit threshold.
MOSFET Gate Drive
The MIC2186 converter drives a low side N-channel MOSFET. The driver for the OutN pin has a 1.6Ω typical source and sink impedance. The VinP pin is the supply pin for the gate drive circuit. It typically connected to the output. The maximum supply voltage to the VinP pin is 14V. If the output voltage is greater than 14V or if it is desired to drive the MOSFET with a voltage less than Vout, the VinP pin can be connected to the input or to an separate supply voltage.
MOSFET Selection
In a boost converter, the Vds of the MOSFET is approxi­mately equal to the output voltage. The maximum Vds rating of the MOSFET must be high enough to allow for ringing and spikes in addition to the output voltage.
The VinP pin supplies the N-channel gate drive voltage. The Vgs threshold voltage of the N-channel MOSFET must be low enough to operate at the minimum VinP voltage to guarantee the boost converter will start up.
The maximum amout of MOSFET gate charge that can be driven is limited by the power dissipation in the MIC2186. The power dissipated by the gate drive circuitry is calculated below:
P_gate_drive=Q_gate * VinP * fs
where:
Q_gate is the total gate charge of the external MOSFET
The graph in Figure 7 shows the total gate charge which can be driven by the MIC2186 over the input voltage range, for different values of switching frequency. Higher gate charge will slow down the turn-on and turn-off times of the MOSFET, which increases switching losses.
Power Dissipation
220 200 180 160 140 120 100
80 60 40 20
MAXIMUM GATE CHARGE (nC)
vs. Frequency
100kHz
200kHz
500kHz
600kHz
0
0 2 4 6 8 101214
400kHz
VINP (V)
Figure 7 - MIC2186 freq vs pdiss
External Schottky Diode
In a boost converter topology, the boost diode, D1 must be rated to handle the peak and average current. The average current through the diode is equal to the average output current of the boost converter. The peak current is calculated in the current limit section of this specification.
July 2002 11 MIC2186
MIC2186 Micrel
The reverse voltage requirement of the diode is: For the MIC2186, Schottky diodes are recommended when
they can be used. They have a lower forward voltage drop than ultra-fast rectifier diodes, which lowers power dissipa­tion and improves efficiency. They also do not have a recov­ery time mechanism, which results in less ringing and noise when the diode turns off. If the output voltage of the circuit prevents the use of a Schottky diode, then only ultra-fast recovery diodes should be used. Slower diodes will dissipate more power in both the MOSFET and the diode. The will also cause excessive ringing and noise when the diode turns off.
Reference, Enable and UVLO Circuits
The output drivers are enabled when the following conditions are satisfied:
• The Vdd voltage (pin 10) is greater than its undervoltage threshold.
• The voltage on the enable pin is greater than the enable UVLO threshold.
The internal bias circuitry generates a 1.245V bandgap reference for the voltage error amplifier and a 3V Vdd voltage for the internal supply bus. The reference voltage in the MIC2186 is buffered and brought out to pin 8. The Vref pin must be bypassed to GND (pin 4) with a 0.1uf capacitor. The Vdd pin must be decoupled to ground with a 1uf ceramic capacitor.
The enable pin (pin 7) has two threshold levels, allowing the MIC2186 to shut down in a micro-current mode, or turn off output switching in standby mode. Below 0.9V, the device is forced into a micro-power shutdown. If the enable pin is between 0.9V and 1.5V the output gate drive is disabled but the internal circuitry is powered on and the soft start pin voltage is forced low. There is typically 135mV of hysteresis below the 1.5V threshold to insure the part does not oscillate on and off due to ripple voltage on the input. Raising the enable voltage above the UVLO threshold of 1.5V enables the output drivers and allows the soft start capacitor to charge. The enable pin may be pulled up to VinA.
Oscillator & Sync
The internal oscillator is self-contained and requires no external components. The HiDC and f/2 pins allow the user to select from three different switching frequencies and two maximum duty cycles. The chart in Table 1 shows the four combinations that can be programmed along with the typical minimum and maximum duty cycles.
nip2/F
CDiH
leveL
leveL
01 zHk004%58%7sµ1
11 zHk002%58%6sµ2
00 zHk002%05%4sµ1
10 zHk001%05%3sµ2
gnihctiwS
ycneuqerF
mumixaM
elcyCytuD
lacipyT
T
ni
muminiM
elcyCytuD
FFO
edoMpikS
Table 1
Minimum duty cycle becomes important in a boost converter as the input voltage approaches the output voltage. At lower duty cycles, the input voltage can be closer to the output voltage without the output rising out of regulation.
A frequency foldback mode is enabled if the voltage on the feedback pin (pin 6) is less than 0.3V. In frequency foldback the oscillator frequency is reduced by approximately a factor of 4. For the 400kHz setting, the oscillator runs at 100khz in frequency foldback. For a 200kHz setting the oscillator runs at approximately 50kHz and for a 100kHz setting, the oscil­lator runs at approximately 25kHz.
The SYNC input (pin 11) allows the MIC2186 to synchronize with an external CMOS or TTL clock signal. Depending on the setting of the HiDC pin,the output frequency is either equal to or 1/2 of the sync input frequency. If the HiDC level is low, the output switching frequency is half the sync frequency. If the HiDC level is high, the output switching frequency is equal to the sync frequency.
The rising edge of the sync signal generates a reset signal in the oscillator, which turns off the high-side gate drive output. The low-side drive is turned on, restarting the switching cycle. The sync signal is inhibited when the controller operates in skip mode or frequency foldback. The sync signal frequency must be greater than the maximum specified free running frequency of the MIC2186. If the synchronizing frequency is lower, double pulsing of the gate drive outputs will occur. When not used, the sync pin must be connected to ground. Table 2 shows the minimum recommended sync frequencies for the different combinations of f/2 and HiDC inputs.
Figure 8a shows the timing between the external sync signal (trace 2) and the low-side drive (trace 1) for a high level on the HiDC pin. Figure 8b shows the timing between the external sync signal (trace 2) and the low-side drive (trace 1) for a low level on the HiDC pin. The sync frequency is twice the output switching frequency.
nip2/F
CDiH
leveL
01 zHk004zHk084f
11 zHk002zHk052f
00 zHk002zHk084f
10 zHk001zHk052f
leveL
gnitallicsOfleS
ycneuqerF
muminiM
dednemmoceR
ycneuqerFcnyS
f
S
f
CNYS
f=
S
f=
S
=1/2f
S
=1/2f
S
ycneuqerFtupnIcnyS
ycneuqerfgnihctiwstuptuo=
ycneuqerftupnicnys=
CNYS
CNYS
CNYS
CNYS
Table 2
MIC2186 12 July 2002
MIC2186 Micrel
MIC2186 Sync
Sync Input
Conditions:
HiDC = HIGH
F/2 = LOW
(Pin 11)
Gat Drive Output (Pin 14)
Figure 8a.
MIC2186 Sync
Sync Input
Conditions:
HiDC = LOW
F/2 = LOW
(Pin 11)
Gat Drive Output (Pin 14)
Figure 8b.
The maximum recommended output switching frequency is 600kHz. Synchronizing to higher frequencies may be pos­sible, however there are some concerns. As the switching frequency is increased, the switching period decreases. The minimum on-time in the MIC2186 becomes a greater part of the total switching period. This may prevent proper operation as Vin approaches Vout and may also minimize the effective­ness of the current limit circuitry. The maximum duty cycle decreases as the sync frequency is increased. Figure 9 shows the relationship between the minimum/maximum duty cycle and frequency.
output capacitance. Slowing the output risetime lowers the input surge current. Soft start may also be used for power supply sequencing. The soft start cannot control the initial surge in current in a boost converter when Vin is applied. This surge current is caused by the output capacitance charging up to the input voltage. The current flows from the input through the inductor and output diode to the output capaci­tors.
The soft start voltage is applied directly to the PWM compara­tor. A 5uA internal current source is used to charge up the soft start capacitor. Either of 2 UVLO conditions will pull the soft start capacitor low.
* When the Vdd voltage drops below its UVLO
threshold
* When the enable pin drops below its 1.5V UVLO
threshold
The risetime of the output is dependent on the soft start capacitor, output capacitance, input and output voltage and load current. The scope photo in Figure 10 show the output voltage and the soft start pin voltage at startup. The output voltage is initially at the input voltage less a diode drop. After the converter is enabled the output slowly rises due to the minimum duty cycle of the controller. As the soft start voltage increases, the output voltage rises in a controlled fashion until the output voltage reaches the regulated value.
Soft Start
Max. Duty Cycle
85 80 75 70 65 60 55 50 45
MAXIMUM DUTY CYCLE (%)
40
vs. Frequency
HiDC=H F/2=H
HiDC=L F/2=H
250 300 350 400 450 500 550 600
SYNC FREQUENCY (kHz)
HiDC=H
F/2=L
HiDC=L
F/2=L
0V
Figure 10.
Voltage Setting Components
The MIC2186 requires two resistors to set the output voltage
Figure 9.
as shown in figure 11
Soft start
Soft start reduces the power supply input surge current at start up by limiting the output voltage risetime. Input surge current occurs when the boost converter charges up the
July 2002 13 MIC2186
MIC2186 Micrel
MIC2186
Voltage
Amplifier
V
REF
1.245V
Pin
R1
6
R2
Figure 11.
The output voltage is determined by the equation below.
VV 1
=×+
REF
O
R1 R2
Where: Vref for the MIC2186 is nominally 1.245V. Lower values of resistance are preferred to prevent noise from apprearing on the Vfb pin. A typically recommended value for R1 is 10K.
Decoupling Capacitor Selection
A minimum 0.1uf ceramic capacitor is required to decouple the Vin. The capacitor should be placed near the IC and connected directly between pins 10 (Vcc) and 5 (SGND). A
0.1uf capacitor is required to decouple Vref. It should be located near the Vref pin.
Efficiency calculation and considerations
Efficiency is the ratio of output power to input power. The difference is dissipated as heat in the boost converter. The significant contributors at light output loads are:
* The VinA pin supply current. * The VinP pin supply current which includes the
current required to switch the external MOSFETs
* Core losses in the inductor To maximize efficiency at light loads: * Use a low gate charge MOSFET or use the
smallest MOSFET, which is still adequate for the
maximum output current.
* Allow the MIC2186 to run in skip mode at lower
currents. If running in PWM mode, set the MIC2186 to switch at a lower frequency.
* se a ferrite material for the inductor core, which
has less core loss than an MPP or iron power core.
The significant contributors to power loss at higher output loads are (in approximate order of magnitude):
* Resistive on-time losses in the MOSFET * Switching transition losses in the MOSFET * Inductor resistive losses * Current sense resistor losses * Output capacitor resistive losses (due to the
capacitor’s ESR)
To minimize power loss under heavy loads:
* Use Logic level, low on resistance MOSFETs.
Multiplying the gate charge by the on resistance gives a figure of merit, providing a good balance between switching and resistive power dissipa­tion.
* Slow transition times and oscillations on the
voltage and current waveforms dissipate more power during the turn-on and turn-off of the low side MOSFET. A clean layout will minimize parasitic inductance and capacitance in the gate drive and high current paths. This will allow the fastest transition times and waveforms without oscillations. Low gate charge MOSFETs will switch faster than those with higher gate charge specifications.
* For the same size inductor, a lower value will
have fewer turns and therefore, lower winding resistance. However, using too small of a value will increase the inductor current and therefore require more output capacitors to filter the output ripple.
* Lowering the current sense resistor value will
decrease the power dissipated in the resistor. However, it will also increase the overcurrent limit and may require larger MOSFETs and inductor components to handle the higher currents.
* Use low ESR output capacitors to minimize the
power dissipated in the capacitor’s ESR.
MIC2186 14 July 2002
MIC2186 Micrel
Package Information
PIN 1
0.157 (3.99)
0.150 (3.81)
0.020 (0.51) REF
0.0648 (1.646)
0.0434 (1.102)
0.009 (0.2286)
0.0098 (0.249)
0.0040 (0.102)
SEATING
PLANE
0.050 (1.27)
0.157 (3.99)
0.150 (3.81)
REF
0.0688 (1.748)
0.0532 (1.351)
BSC
0.394 (10.00)
0.386 (9.80)
0.025 (0.635) BSC
0.020 (0.51)
0.013 (0.33)
0.0098 (0.249)
0.0040 (0.102)
SEATING
PLANE
16-Pin SOIC (M)
PIN 1
0.012 (0.30)
0.008 (0.20)
0.196 (4.98)
0.189 (4.80)
DIMENSIONS:
INCHES (MM)
0.050 (1.27)
0.016 (0.40)
0.244 (6.20)
0.228 (5.79)
DIMENSIONS:
INCHES (MM)
0.0098 (0.249)
0.0075 (0.190)
45°
45°
0.050 (1.27)
0.016 (0.40)
0.2284 (5.801)
0.2240 (5.690)
0°–8°
8° 0°
16-Pin QSOP (QS)
July 2002 15 MIC2186
MIC2186 Micrel
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2001 Micrel Incorporated
MIC2186 16 July 2002
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