The MIC2085 and MIC2086 are single channel positive
voltage hot swap controllers designed to allow the safe
insertion of boards into live system backplanes. The MIC2085
and MIC2086 are available in 16-pin and 20-pin QSOP
packages, respectively. Using a few external components
and by controlling the gate drive of an external N-Channel
MOSFET device, the MIC2085/86 provide inrush current
limiting and output voltage slew rate control in harsh, critical
power supply environments. Additionally, a circuit breaker
function will latch the output MOSFET off if the current limit
threshold is exceeded for a programmed period of time. The
devices’ array of features provide a simplified yet robust
solution for many network applications in meeting the power
supply regulation requirements and affords protection of
critical downstream devices and components.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
Features
• MIC2085: Pin for pin functional equivalent to the
LTC1642
• 2.3V to 16.5V supply voltage operation
• Surge voltage protection to 33V
• Operating temperature range –40°C to 85°C
• Active current regulation limits inrush current
independent of load capacitance
• Programmable inrush current limiting
• Analog foldback current limiting
• Electronic circuit breaker
• Dual-level overcurrent fault sensing
• Fast response to short circuit conditions (< 1µs)
• Programmable output undervoltage detection
• Undervoltage lockout protection
• Power-on reset (MIC2085/86) and
power-good (MIC2086) status outputs
• /FAULT status output
• Driver for SCR crowbar on overvoltage
Applications
• RAID systems
• Cellular base stations
• LAN servers
• WAN servers
• InfiniBand™ Systems
• Industrial high side switching
T ypical Application
(PowerPAK
/POR
FB
283
Q1
Si7884DP
14
11
10
5
7
1
C6
0.01µF
TM
SO-8)
*R6
10Ω
R7
127kΩ
1%
R10
47kΩ
R8
16.2kΩ
1%
C7
0.033µF
µ
s
V
LOGIC
C2
0.022µF
R11
47kΩ
Q2
2N4401
**R9
180Ω
C
LOAD
220µF
Output Signal
(Power Good)
Power-On Reset
Output
Q3
TCR22-4
V
OUT
12V@5A
PWRGD
LOGIC
CONTROLLER
/RESET
34
C1
µ
F
1
1615
4
ON
6
/FAULT
9
OV
12
COMP—
13
REF
CPOR
C4
µ
F
0.1
R
SENSE
0.007Ω
2%
12
SENSEVCC
MIC2085
GATE
COMP+
COMPOUT
CRWBR
GND
CFILTER
C5
8200pF
POR/START-UP DELAY = 60ms
Circuit-Breaker Response Time = 500
*R6 is an optional component used for noise filtering
**R9 needed when using a sensitive gate SCR
InfiniBand is a trademark of InfiniBand Trade Association
PowerPAK is a trademark of Vishay Intertechnology Inc.
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
January 20041M0235-121903
MIC2085/2086Micrel
Ordering Information
Part NumberFast Circuit Breaker ThresholdDischarge OutputPackage
MIC2085-xBQSx = J, 95mVNA16-pin QSOP
x = K, 150mV*
x = L, 200mV*
x = M, Off
MIC2086-xBQSx = J, 95mVYes20-pin QSOP
x = K, 150mV*
x = L, 200mV*
x = M, Off
*Contact factory for availability.
Pin Configuration
CFILTER
CPOR
ON
/POR
/FAULT
FB
GND
1CRWBR
1CRWBR
2
3
4
5
6
7
8
16 VCC
SENSE
15
GATE
14
REF
13
COMP–
12
COMP+
11
COMPOUT
10
OV
9
CFILTER
PWRGD
CPOR
ON
/POR
/FAULT
FB
GND
GND
2
3
4
5
6
7
8
9
10
20 VCC
VCC
19
SENSE
18
GATE
17
REF
16
DIS
15
COMP–
14
COMP+
13
COMPOUT
12
OV
11
MIC2085
16-Pin QSOP (QS)
MIC2086
20-Pin QSOP (QS)
Pin Description
Pin NumberPin NumberPin NamePin Function
MIC2086MIC2085
11CRWBROvervoltage Timer and Crowbar Circuit Trigger: A capacitor connected to
this pin sets the timer duration for which an overvoltage condition will trigger
an external crowbar circuit. This timer begins when the OV input rises above
its threshold as an internal 45µA current source charges the capacitor. Once
the voltage reaches 470mV, the current increases to 1.5mA.
22CFILTERCurrent Limit Response Timer: A capacitor connected to this pin defines the
period of time (t
fault condition and trip the circuit breaker. If no capacitor is connected, then
t
OCSLOW
OCSLOW
defaults to 5µs.
33CPORPower-On Reset Timer: A capacitor connected between this pin and ground
sets the start-up delay (t
VCC rises above the UVLO threshold, the capacitor connected to CPOR
begins to charge. When the voltage at CPOR crosses 1.24V, the start-up
threshold (V
C
POR
above V
CPOR rises above the power-on reset delay threshold (VTH), the timer
START
is immediately discharged to ground. When the voltage at FB rises
, capacitor C
FB
resets by pulling CPOR to ground, and /POR is deasserted.
If C
= 0, then t
POR
) in which an overcurrent event must last to signal a
) and the power-on reset interval (t
START
), a start cycle is initiated if ON is asserted while capacitor
begins to charge again. When the voltage at
POR
defaults to 20µs.
START
POR
). When
M0235-1219032January 2004
MIC2085/2086Micrel
Pin Description (Cont.)
Pin NumberPin NumberPin NamePin Function
MIC2086MIC2085
44ONON Input: Active high. The ON pin, an input to a Schmitt-triggered compara-
tor used to enable/disable the controller, is compared to a VTH reference
with 100mV of hysteresis. Once a logic high is applied to the ON pin
> 1.24V), a start-up sequence is initiated as the GATE pin starts
(V
ON
ramping up towards its final operating voltage. When the ON pin receives a
low logic signal (V
high if VCC is above the UVLO threshold. ON must be low for at least 20µs
in order to initiate a start-up sequence. Additionally, toggling the ON pin
LOW to HIGH resets the circuit breaker.
55/PORPower-On Reset Output: Open drain N-Channel device, active low. This pin
remains asserted during start-up until a time period t
voltage rises above the power-good threshold (V
C
determines t
POR
at the FB pin, /POR is asserted for a minimum of one timing cycle, t
/POR pin has a weak pull-up to VCC.
6N/APWRGDPower-Good Output: Open drain N-Channel device, active high. When the
voltage at the FB pin is lower than 1.24V, the PWRGD output is held low.
When the voltage at the FB pin is higher than 1.24V, then PWRGD is
asserted. A pull-up resistor connected to this pin and to VCC will pull the
output up to VCC. The PWRGD pin has a weak pull-up to VCC.
76/FAULTCircuit Breaker Fault Status Output: Open drain N-Channel device, active
low. The /FAULT pin is asserted when the circuit breaker trips due to an
overcurrent condition. Also, this pin indicates undervoltage lockout and
overvoltage fault conditions. The /FAULT pin has a weak pull-up to VCC.
87FBPower-Good Threshold Input: This input is internally compared to a 1.24V
reference with 3mV of hysteresis. An external resistive divider may be used
to set the voltage at this pin. If this input momentarily goes below 1.24V,
then /POR is activated for one timing cycle, t
undervoltage condition. The /POR signal de-asserts one timing cycle after
the FB pin exceeds the power-good threshold by 3mV. A 5µs filter on this pin
prevents glitches from inadvertently activating this signal.
9,108GNDGround Connection: Tie to analog ground.
119OVOV Input: When the voltage on OV exceeds its trip threshold, the GATE pin
is pulled low and the CRWBR timer starts. If OV remains above its threshold
long enough for CRWBR to reach its trip threshold, the circuit breaker is
tripped. Otherwise, the GATE pin begins to ramp up one POR timing cycle
after OV drops below its trip threshold.
1210COMPOUTUncommitted Comparator’s Open Drain Output.
1311COMP+Comparator’s Non-Inverting Input.
1412COMP-Comparator’s Inverting Input.
15NADISDischarge Output: When the MIC2086 is turned off, a 550Ω internal resistor
at this output allows the discharging of any load capacitance to ground.
1613REFReference Output: 1.24V nominal. Tie a 0.1µF capacitor to ground to ensure
stability.
1714GATEGate Drive Output: Connects to the gate of an external N-Channel
MOSFET. An internal clamp ensures that no more than 13V is applied
between the GATE pin and the source of the external MOSFET. The GATE
pin is immediately brought low when either the circuit breaker trips or an
undervoltage lockout condition occurs.
< 1.14V), the GATE pin is grounded and /FAULT is
ON
after the FB pin
POR
). The timing capacitor
. When an output undervoltage condition is detected
POR
FB
, indicating an output
POR
POR
. The
January 20043M0235-121903
MIC2085/2086Micrel
Pin Description (Cont.)
Pin NumberPin NumberPin NamePin Function
MIC2086MIC2085
1815SENSECircuit Breaker Sense Input: A resistor between this pin and VCC sets the
current limit threshold. Whenever the voltage across the sense resistor
exceeds the slow trip current limit threshold (V
is adjusted to ensure a constant load current. If V
exceeded for longer than time period t
OCSLOW
TRIPSLOW
, then the circuit breaker is
tripped and the GATE pin is immediately pulled low. If the voltage across the
sense resistor exceeds the fast trip circuit breaker threshold, V
any point due to fast, high amplitude power supply faults, then the GATE pin
is immediately brought low without delay. To disable the circuit breaker, the
SENSE and VCC pins can be tied together.
The default V
TRIPFAST
are available: 150mV, 200mV, or OFF(V
factory for availability of other options.
for either device is 95mV. Other fast trip thresholds
TRIPFAST
19,2016VCCPositive Supply Input: 2.3V to 16.5V. The GATE pin is held low by an
internal undervoltage lockout circuit until VCC exceeds a threshold of 2.18V.
If VCC exceeds 16.5V, an internal shunt regulator protects the chip from
VCC and SENSE pin voltages up to 33V.
), the GATE voltage
TRIPSLOW
(48mV) is
TRIPFAST
, at
disabled). Please contact
M0235-1219034January 2004
MIC2085/2086Micrel
Absolute Maximum Ratings
(1)
(All voltages are referred to GND)
Supply Voltage (VCC) ..................................... –0.3V to 33V
SENSE Pin..........................................–0.3V to VCC + 0.3V
GATE Pin ....................................................... –0.3V to 22V
ON, DIS, /POR, PWRGD, /FAULT,
COMP+, COMP–, COMPOUT ....................... –0.3V to 20V
CRWBR, FB, OV, REF..................................... –0.3V to 6V
Maximum Currents
Digital Output Pins .....................................................10mA
VCC = 5.0V, TA = 25°C unless otherwise noted. Bold indicates specifications over the full operating temperature range of –40°C to +85°C.
SymbolParameterConditionMinTypMaxUnits
When circuit boards are inserted into live system backplanes
and supply voltages, high inrush currents can result due to
the charging of bulk capacitance that resides across the
supply pins of the circuit board. This inrush current, although
transient in nature, may be high enough to cause permanent
damage to on-board components or may cause the system’s
supply voltages to go out of regulation during the transient
period which may result in system failures. The MIC2085/86
acts as a controller for external N-Channel MOSFET devices
in which the gate drive is controlled to provide inrush current
limiting and output voltage slew rate control during hot plug
insertions.
Power Supply
VCC is the supply input to the MIC2085/86 controller with a
voltage range of 2.3V to 16.5V. The VCC input can withstand
transient spikes up to 33V. In order to help suppress transients and ensure stability of the supply voltage, a capacitor
of 1.0µF to 10µF from VCC to ground is recommended.
Alternatively, a low pass filter, shown in the typical application
circuit, can be used to eliminate high frequency oscillations as
well as help suppress transient spikes.
Start-Up Cycle
When the voltage on the ON pin rises above its threshold of
1.24V, the MIC2085/86 first checks that its supply (VCC) is
above the UVLO threshold. If so, the device is enabled and
an internal 2µA current source begins charging capacitor
C
to 1.24V to initiate a start-up sequence (i.e., start-up
POR
delay times out). Once the start-up delay (t
CPOR is pulled immediately to ground and a 15µA current
source begins charging the GATE output to drive the external
MOSFET that switches VIN to V
. The programmed start-
OUT
up delay is calculated using the following equation:
V
tC
STARTPOR
=× ≅× µ
TH
I
CPOR
0.62 C ( F)
POR
where VTH, the POR delay threshold, is 1.24V, and I
the POR timer current, is 2µA. As the GATE voltage continues ramping toward its final value (VCC + VGS) at a defined
slew rate (See
nated Start-Up”
“Load Capacitance”/“Gate Capacitance Domi-
sections), a second CPOR timing cycle
begins if: 1)/FAULT is high and 2)CFILTER is low (i.e., not
an overvoltage, undervoltage lockout, or overcurrent state).
This second timing cycle, t
, starts when the voltage at the
POR
FB pin exceeds its threshold (VFB) indicating that the output
voltage is valid. The time period t
is equivalent to t
POR
and sets the interval for the /POR to go Low-to-High after
“power is good” (See Figure 2 of
“Timing Diagrams”
current regulation is employed to limit the inrush current
transient response during start-up by regulating the load
current at the programmed current limit value (See
Limiting and Dual-Level Circuit Breaker”
section). The following equation is used to determine the nominal current
limit value:
V
I
LIM
TRIPSLOW
==
R
SENSESENSE
48mV
R
START
) elapses,
(1)
CPOR
START
). Active
“Current
(2)
where V
TRIPSLOW
in the electrical table and R
is the current limit slow trip threshold found
is the selected value that
SENSE
will set the desired current limit. There are two basic start-up
modes for the MIC2085/86: 1)Start-up dominated by load
capacitance and 2)start-up dominated by total gate capacitance. The magnitude of the inrush current delivered to the
load will determine the dominant mode. If the inrush current
is greater than the programmed current limit (I
LIM
capacitance is dominant. Otherwise, gate capacitance is
dominant. The expected inrush current may be calculated
using the following equation:
C
LOAD
C
GATE
GATE
15 A
is the total GATE capacitance
where I
INRUSH I
GATE
≅× ≅µ×
GATE
is the GATE pin pull-up current, C
load capacitance, and C
(C
of the external MOSFET and any external capacitor
ISS
C
C
LOAD
GATE
connected from the MIC2085/86 GATE pin to ground).
Load Capacitance Dominated Start-Up
In this case, the load capacitance, C
, is large enough to
LOAD
cause the inrush current to exceed the programmed current
limit but is less than the fast-trip threshold (or the fast-trip
threshold is disabled, ‘M’ option). During start-up under this
condition, the load current is regulated at the programmed
current limit value (I
) and held constant until the output
LIM
voltage rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
following equation:
I
Output Voltage Slew Rate, dV/dt
where I
quently, the value of C
is the programmed current limit value. Conse-
LIM
must be selected to ensure that
FILTER
the overcurrent response time, t
OUT
OCSLOW
LIM
=
C
LOAD
, exceeds the time
needed for the output to reach its final value. For example,
given a MOSFET with an input capacitance C
4700pF, C
is 2200µF, and I
LOAD
is set to 6A with a 12V
LIMIT
ISS
input, then the load capacitance dominates as determined by
the calculated INRUSH > I
,
. Therefore, the output voltage
LIM
slew rate determined from Equation 4 is:
Output Voltage Slew Rate, dV/dt
and the resulting t
OCSLOW
approximately 4.5ms. (See
Overcurrent Timer Delays”
GATE Capacitance Dominated Start-Up
OUT
needed to achieve a 12V output is
“Power-On Reset, Start-Up, and
section to calculate t
=
2200 F
6A
µ
In this case, the value of the load capacitance relative to the
GATE capacitance is small enough such that the load current
during start-up never exceeds the current limit threshold as
determined by Equation 3. The minimum value of C
will ensure that the current limit is never exceeded is given by
the equation below:
I
C(min)
GATE
GATE
=×
I
LIM
C
LOAD
), then load
(3)
is the
LOAD
(4)
= C
GATE
V
2.73
=
ms
GATE
.)
that
OCSLOW
(5)
=
M0235-12190314January 2004
MIC2085/2086Micrel
where C
capacitance (C
connected to the GATE pin of the MOSFET. Once C
is the summation of the MOSFET input
GATE
) and the value of the external capacitor
ISS
GATE
is
determined, use the following equation to determine
the output slew rate for gate capacitance dominated start-up.
I
dV/dt (output)
OUT
Table 1 depicts the output slew rate for various values of C
I
GATE
C
GATE
0.001µF15V/ms
0.01µF1.5V/ms
0.1µF0.150V/ms
1µF0.015V/ms
GATE
=
C
GATE
= 15µA
dV
OUT
(6)
GATE
/dt
Table 1. Output Slew Rate Selection for GATE
Capacitance Dominated Start-Up
Current Limiting and Dual-Level Circuit Breaker
Many applications will require that the inrush and steady state
supply current be limited at a specific value in order to protect
critical components within the system. Connecting a sense
resistor between the VCC and SENSE pins sets the nominal
current limit value of the MIC2085/86 and the current limit is
calculated using Equation 2. However, the MIC2085/86 exhibits foldback current limit response. The foldback feature
allows the nominal current limit threshold to vary from 24mV
up to 48mV as the FB pin voltage increases or decreases.
When FB is at 0V, the current limit threshold is 24mV and for
FB ≥ 0.6V, the current limit threshold is the nominal 48mV.
(See Figure 4 for Foldback Current Limit Response characteristic).
The MIC2085/86 also features a dual-level circuit breaker
triggered via 48mV and 95mV current limit thresholds sensed
across the VCC and SENSE pins. The first level of the circuit
breaker functions as follows. Once the voltage sensed across
these two pins exceeds 48mV, the overcurrent timer, its
duration set by capacitor C
, starts to ramp the voltage
FILTER
at CFILTER using a 2µA constant current source. If the
voltage at CFILTER reaches the overcurrent timer threshold
(VTH) of 1.24V, then CFILTER immediately returns to ground
as the circuit breaker trips and the GATE output is immediately shut down. For the second level, if the voltage sensed
across VCC and SENSE exceeds 95mV at any time, the
circuit breaker trips and the GATE shuts down immediately,
bypassing the overcurrent timer period. To disable current
limit and circuit breaker operation, tie the SENSE and VCC
pins together and the CFILTER pin to ground.
Output Undervoltage Detection
The MIC2085/86 employ output undervoltage detection by
monitoring the output voltage through a resistive divider
connected at the FB pin. During turn on, while the voltage at
the FB pin is below the threshold (VFB), the /POR pin is
asserted low. Once the FB pin voltage crosses VFB, a 2µA
current source charges capacitor C
voltage reaches 1.24V, the time period t
CPOR pin is pulled to ground and the /POR pin goes HIGH.
.
If the voltage at FB drops below VFB for more than 10µs, the
. Once the CPOR pin
POR
elapses as the
POR
/POR pin resets for at least one timing cycle defined by t
(see Applications Information for an example).
Input Overvoltage Protection
The MIC2085/86 monitors and detects overvoltage conditions in the event of excessive supply transients at the input.
Whenever the overvoltage threshold (VOV) is exceeded at
the OV pin, the GATE is pulled low and the output is shut off.
The GATE will begin ramping one POR timing cycle after the
OV pin voltage drops below its threshold. An external CRWBR
circuit, as shown in the typical application diagram, provides
a time period that an overvoltage condition must exceed in
order to trip the circuit breaker. When the OV pin exceeds the
overvoltage threshold (VOV), the CRWBR timer begins charging the CRWBR capacitor initially with a 45µA current source.
Once the voltage at CRWBR exceeds its threshold (VCR) of
0.47V, the CRWBR current immediately increases to 1.5mA
and the circuit breaker is tripped, necessitating a device reset
by toggling the ON pin LOW to HIGH.
Power-On Reset, Start-Up, and Overcurrent Timer
Delays
The Power-On Reset delay, t
, is the time period for the
POR
/POR pin to go HIGH once the voltage at the FB pin exceeds
the power-good threshold (VTH). A capacitor connected to
CPOR sets the interval, t
start-up delay, t
(see Equation 1).
START
POR
, and t
is equivalent to the
POR
A capacitor connected to CFILTER is used to set the timer
which activates the circuit breaker during overcurrent conditions. When the voltage across the sense resistor exceeds
the slow trip current limit threshold of 48mV, the overcurrent
timer begins to charge for a period, t
C
defaults to 5µs. If t
. If no capacitor is used at CFILTER, then t
FILTER
OCSLOW
elapses, then the circuit breaker
OCSLOW
, determined by
is activated and the GATE output is immediately pulled to
ground. The following equation is used to determine the
overcurrent timer period, t
tC
OCSLOW
=×≅×µ
FILTER
OCSLOW
V
I
TIMER
.
TH
0.062 C( F)
FILTER
where VTH, the CFILTER timer threshold, is 1.24V and
I
, the overcurrent timer current, is 20µA. Tables 2 and
TIMER
3 provide a quick reference for several timer calculations
using select standard value capacitors.
POR
OCSLOW
(7)
January 200415M0235-121903
MIC2085/2086Micrel
C
POR
t
POR
= t
START
0.01µF6ms
0.02µF12ms
0.033µF18.5ms
0.05µF30ms
0.1µF60ms
0.33µF200ms
Table 2. Selected Power-On Reset and
Start-Up Delays
C
FILTER
t
OCSLOW
1800pF100µs
4700pF290µs
8200pF500µs
0.010µF620µs
0.020µF1.2ms
0.033µF2.0ms
0.050µF3.0ms
0.1µF6.2ms
0.33µF20.75ms
Table 3. Selected Overcurrent Timer Delays
Applications Information
Output Undervoltage Detection
For output undervoltage detection, the first consideration is to
establish the output voltage level that indicates “power is
good.” For this example, the output value for which a 12V
supply will signal “good” is 11V. Next, consider the tolerances
of the input supply and FB threshold (VFB). For this example,
the 12V supply varies ±5%, thus the resulting output voltage
may be as low as 11.4V and as high as 12.6V. Additionally,
the FB threshold has ±50mV tolerance and may be as low as
1.19V and as high as 1.29V. Thus, to determine the values of
the resistive divider network (R5 and R6) at the FB pin, shown
in Figure 5, use the following iterative design procedure.
1) Choose R6 so as to limit the current through the
divider to approximately 100µA or less.
V
FB(MAX)
R6
≥
100 A
µ
R6 is chosen as 13.3kΩ ± 1%.
2) Next, determine R5 using the output “good”
voltage of 11V and the following equation:
VV
OUT(Good)
1.29V
≥
100 A
=
FB
≥Ω
µ
R5 R6
+
()
R6
12.9k
.
(8)
Using some basic algebra and simplifying Equation 8 to
isolate R5, yields:
–1
OUT(Good)
(8.1)
= 11V, and R6 is
R5 R6
where V
=
FB(MAX)
V
OUT(Good)
V
FB(MAX)
= 1.29V, V
13.3kΩ. Substituting these values into Equation 8.1 now
yields R5 = 100.11kΩ. A standard 100kΩ ± 1% is selected.
Now, consider the 11.4V minimum output voltage, the lower
tolerance for R6 and higher tolerance for R5, 13.17kΩ and
101kΩ, respectively. With only 11.4V available, the voltage
sensed at the FB pin exceeds V
FB(MAX)
, thus the /POR and
PWRGD (MIC2086) signals will transition from LOW to
HIGH, indicating “power is good” given the worse case
tolerances of this example.
Input Overvoltage Protection
The external CRWBR circuit shown in Figure 5 consists of
capacitor C4, resistor R7, NPN transistor Q2, and SCR Q3.
The capacitor establishes a time duration for an overvoltage
condition to last before the circuit breaker trips. The CRWBR
timer duration is approximated by the following equation:
t
OVCR
()
≅
I
CR
CR
≅×µ0
.01 C4( F)
(9)
C4 V
×
where VCR, the CRWBR pin threshold, is 0.47V and ICR, the
CRWBR pin current, is 45µA during the timer period (see the
CRWBR timer pin description for further description). A
similar design approach as the previous undervoltage detection example is recommended for the overvoltage protection
circuitry, resistors R2 and R3 in Figure 5. For input overvoltage protection, the first consideration is to establish the input
voltage level that indicates an overvoltage triggering a system (output voltage) shut down. For this example, the input
value for which a 12V supply will signal an “output shut down”
is 13.2V (+10%). Similarly, from the previous example:
1) Choose R3 to satisfy 100µA condition.
R3
≥
V
OV(MIN)
100 A
µ
1.19V
≥
100 A
≥Ω
11.9k
µ
.
R3 is chosen as 13.7kΩ ±1%.
2) Thus, following the previous example and
substituting R2 and R3 for R5 and R6, respectively, and 13.2V overvoltage for 11V output
“good”, the same formula yields R2 of 138.3kΩ.
The next highest standard 1% value is 140kΩ.
Now, consider the 12.6V maximum input voltage (V
CC
+5%),
the higher tolerance for R3 and lower tolerance for R2, 13.84k
and 138.60kΩ, respectively. With a 12.6V input, the voltage
sensed at the OV pin is below V
OV(MIN)
, and the MIC2085/86
will not indicate an overvoltage condition until VCC exceeds
at least 13.2V.
M0235-12190316January 2004
MIC2085/2086Micrel
V
IN
12V
C1
1µF
4
9
C3
0.05µF
ON
OV
R2
140kΩ
1%
R3
13.7kΩ
1%
R1
100kΩ
Overvoltage (Input) = 13.3V
Undervoltage (Output) = 11.0V
POR/START-UP Delay = 30ms
*R7 needed when using a sensitive gate SCR.
Additional pins omitted for clarity.
R
SENSE
0.012Ω
2%
12
34
1615
SENSEVCC
MIC2085
CPOR
GND
83
GATE
FB
/POR
/FAULT
CRWBR
IRF7822
14
7
5
6
1
C4
0.01µF
Q1
(SO-8)
0.033µF
R4
10Ω
C2
0.022µF
Downstream
Signals
C5
R5
100kΩ
1%
R6
13.3kΩ
1%
Q2
2N4401
*R7
180Ω
Q3
TCR22-4
C
LOAD
220µF
V
OUT
12V@3A
Figure 5. Undervoltage/Overvoltage Circuit
January 200417M0235-121903
MIC2085/2086Micrel
/
PCB Connection Sense
There are several configuration options for the MIC2085/86’s
ON pin to detect if the PCB has been fully seated in the
backplane before initiating a start-up cycle. In the typical
applications circuit, the MIC2085/86 is mounted on the PCB
with a resistive divider network connected to the ON pin. R2
is connected to a short pin on the PCB edge connector. Until
the connectors mate, the ON pin is held low which keeps the
GATE output charge pump off. Once the connectors mate,
the resistor network is pulled up to the input supply, 12V in this
example, and the ON pin voltage exceeds its threshold (VON)
of 1.24V and the MIC2085/86 initiates a start-up cycle. In
Figure 6, the connection sense consisting of a logic-level
discrete MOSFET and a few resistors allows for interrupt
control from the processor or other signal controller to shut off
the output of the MIC2085/86. R4 keeps the GATE of Q2 at
VIN until the connectors are fully mated. A logic LOW at the
/ON_OFF signal turns Q2 off and allows the ON pin to pull up
above its threshold and initiate a start-up cycle. Applying a
logic HIGH at the /ON_OFF signal will turn Q2 on and short
the ON pin of the MIC2085/86 to ground which turns off the
GATE output charge pump.
V
IN
12V
ON_OFF
GND
Backplane
Connector
PCB Edge
Connector
Short
Long
Pin
Pin
R4
10kΩ
R1
20kΩ
R3
100Ω
PCB Connection Sense
Long
Pin
Undervoltage (Output) = 11.4V
POR/START-UP DELAY = 30ms
*Q2 is TN0201T (SOT-23)
Additional pins omitted for clarity.
*Q2
R2
20kΩ
C1
1µF
R
SENSE
0.008Ω
2%
12
34
1615
4
ON
CPOR
C2
0.05µF
SENSEVCC
MIC2085
GND
83
GATE
FB
/POR
/FAULT
Q1
Si7860DP
(PowerPAK
14
7
5
1
TM
SO-8)
R5
10Ω
C2
0.01µF
R6
127kΩ
1%
R7
16.2kΩ
1%
Downstream
Signals
C
LOAD
220µF
V
OUT
12V@5A
Figure 6. PCB Connection Sense with ON/OFF Control
M0235-12190318January 2004
MIC2085/2086Micrel
Higher UVLO Setting
Once a PCB is inserted into a backplane (power supply), the
internal UVLO circuit of the MIC2085/86 holds the GATE
output charge pump off until VCC exceeds 2.18V. If VCC falls
below 2V, the UVLO circuit pulls the GATE output to ground
and clears the overvoltage and/or current limit faults. For a
higher UVLO threshold, the circuit in Figure 7 can be used to
delay the output MOSFET from switching on until the desired
input voltage is achieved. The circuit allows the charge pump
R1
to remain off until VIN exceeds
R2
×
1.24V+
. The GATE
1
drive output will be shut down when VIN falls below
R1
R2
×
1.14V+
. In the example circuit (Figure 7), the rising
1
UVLO threshold is set at approximately 11V and the falling
UVLO threshold is established as 10.1V. The circuit consists
of an external resistor divider at the ON pin that keeps the
GATE output charge pump off until the voltage at the ON pin
exceeds its threshold (VON) and after the start-up timer
elapses.
In many applications where a switch controller is turned off by
either removing the PCB from the backplane or the ON pin is
reset, capacitive loading will cause the output to retain
voltage unless a ‘bleed’ (low impedance) path is in place in
order to discharge the capacitance. The MIC2086 is equipped
with an internal MOSFET that allows the discharging of any
load capacitance to ground through a 550Ω path. The discharge feature is configured by wiring the DIS pin to the
output (source) of the external MOSFET and becomes active
R
SENSE
0.007
W
V
IN
12V
ONSignal
R147k
C11mF
W
4
ON
5%
12
34
19,2018
SENSE
VCC
MIC2086
(DIS pin output is low) once the ON pin is deasserted. Figure
8(a) illustrates the use of the discharge feature with an
optional resistor (R5) that can be used to provide added
resistance in the output discharge path. For an even faster
discharge response of capacitive loads, the configuration of
Figure 8(b) can be utilized to apply a crowbar to ground
through an external SCR (Q3) that is triggered when the DIS
pin goes low which turns on the PNP transistor (Q2). See the
different
Figure 8. MIC2086 Fast Discharge of Capacitive Load
M0235-12190320January 2004
MIC2085/2086Micrel
Auto-Retry Upon Overcurrent Faults
The MIC2085/86 can be configured for automatic restart after
a fault condition. Placing a diode between the ON and
/FAULT pins, as shown in Figure 9, will enable the autorestart capability of the controller. When an application is
configured for auto-retry, the overcurrent timer should be set
to minimize the duty cycle of the overcurrent response to
prevent thermal runaway of the power MOSFET. See
“MOSFET Transient Thermal Issues”
section for further
detail. A limited duty cycle is achieved when the overcurrent
timer duration (t
timer duration (t
OCSLOW
START
) is much less than the start-up delay
) and is calculated using the following
equation:
t
Auto Retry Duty Cycle
−=×
OCSLOW
t
START
100%
(10)
An InfiniBand™ Application Circuit
The circuit in Figure 10 depicts a single 50W InfiniBand™
module using the MIC2085 controller. An InfiniBand™
backplane distributes bulk power to multiple plug-in modules
that employ DC/DC converters for local supply requirements.
The circuit in Figure 10 distributes 12V from the backplane to
the MIC2182 DC/DC converter that steps down +12V to
+3.3V for local bias. The pass transistor, Q1, isolates the
MIC2182’s input capacitance during module plug-in and
allows the backplane to accommodate additional plug-in
modules without affecting the other modules on the backplane.
The two control input signals are VBxEn_L (active LOW) and
a Local Power Enable (active HIGH). The MIC2085 in the
circuit of Figure 10 performs a number of functions. The gate
output of Q1 is enabled by the two bit input signal VBxEn_L,
Local Power Enable = [0,1]. Also, the MIC2085 limits the drain
current of Q1 to 7A, monitors VB_In for an overvoltage
condition greater than 16V, and enables the MIC2182 DC/DC
converter downstream to supply a local voltage rail. The
uncommitted comparator is used to monitor VB_In for an
undervoltage condition of less than 10V, indicated by a logic
LOW at the comparator output (COMPOUT). COMPOUT
may be used to control a downstream device such as another
DC/DC converter. Additionally, the MIC2085 is configured for
auto-retry upon an overcurrent fault condition by placing a
diode (D1) between the /FAULT and ON pins of the controller.
The MIC2085 and MIC2086 use a low-value sense resistor to
measure the current flowing through the MOSFET switch
(and therefore the load). This sense resistor is nominally
valued at 48mV/I
LOAD(CONT)
. To accommodate worst-case
tolerances for both the sense resistor (allow ±3% over time
and temperature for a resistor with ±1% initial tolerance) and
still supply the maximum required steady-state load current,
a slightly more detailed calculation must be used.
The current limit threshold voltage (the “trip point”) for the
MIC2085/86 may be as low as 40mV, which would equate to
a sense resistor value of 40mV/I
LOAD(CONT)
. Carrying the
numbers through for the case where the value of the sense
resistor is 3% high yields:
R
SENSE(MAX)
=
Once the value of R
40mV
1.03 I
()
()
LOAD(CONT)
has been chosen in this manner,
SENSE
it is good practice to check the maximum I
38.8mV
=
I
LOAD(CONT)
LOAD(CONT)
(11)
which
the circuit may let through in the case of tolerance build-up in
the opposite direction. Here, the worst-case maximum current is found using a 55mV trip voltage and a sense resistor
that is 3% low in value. The resulting equation is:
I
LOAD(CONT,MAX)
=
55mV
0.97 R
()
()
SENSE(NOM)
56.7mV
=
R
SENSE(NOM)
(12)
As an example, if an output must carry a continuous 6A
without nuisance trips occurring, Equation 11 yields:
R
SENSE(MAX)
38.8mV
==Ω
6A
6.5m
.
The next lowest standard value is 6.0mW. At the other set
of tolerance extremes for the output in question:
I
LOAD(CONT,MAX)
56.7mV
=
6.0m
9.45A
=
Ω
,
almost 10A. Knowing this final datum, we can determine
the necessary wattage of the sense resistor, using P = I2R,
where
(0.97)(R
I will be I
SENSE(NOM)
LOAD(CONT, MAX)
).
These numbers yield the following:
P
MAX
, and R will be
= (10A)2 (5.82mΩ)
= 0.582W.
In this example, a 1W sense resistor is sufficient.
MOSFET Selection
Selecting the proper external MOSFET for use with the
MIC2085/86 involves three straightforward tasks:
• Choice of a MOSFET which meets minimum
voltage requirements.
• Selection of a device to handle the maximum
continuous current (steady-state thermal
issues).
• Verify the selected part’s ability to withstand any
peak currents (transient thermal issues).
MOSFET Voltage Requirements
The first voltage requirement for the MOSFET is that the drainsource breakdown voltage of the MOSFET must be greater
than V
. For instance, a 16V input may reasonably be
IN(MAX)
expected to see high-frequency transients as high as 24V.
Therefore, the drain-source breakdown voltage of the MOSFET
must be at least 25V. For ample safety margin and standard
availability, the closest minimum value should be 30V.
M0235-12190322January 2004
MIC2085/2086Micrel
The second breakdown voltage criterion that must be met is
a bit subtler than simple drain-source breakdown voltage. In
MIC2085/86 applications, the gate of the external MOSFET
is driven up to a maximum of 21V by the internal output
MOSFET. At the same time, if the output of the external
MOSFET (its source) is suddenly subjected to a short, the
gate-source voltage will go to (21V – 0V) = 21V. Since most
power MOSFETs generally have a maximum gate-source
breakdown of 20V or less, the use of a Zener clamp is
recommended in applications with VCC ≥ 8V. A Zener diode
with 10V to 12V rating is recommended as shown in Figure
11. At the present time, most power MOSFETs with a 20V
gate-source voltage rating have a 30V drain-source breakdown rating or higher. As a general tip, choose surface-mount
devices with a drain-source rating of 30V or more as a starting
point.
Finally, the external gate drive of the MIC2085/86 requires a
low-voltage logic level MOSFET when operating at voltages
lower than 3V. There are 2.5V logic level MOSFETs available. Please see Table 4,
Vendors”
for suggested manufacturers.
“MOSFET and Sense Resistor
MOSFET Steady-State Thermal Issues
The selection of a MOSFET to meet the maximum continuous
current is a fairly straightforward exercise. First, arm yourself
with the following data:
• The value of I
question (see
LOAD(CONT, MAX.)
“Sense Resistor Selection”
for the output in
).
• The manufacturer’s data sheet for the candidate
MOSFET.
• The maximum ambient temperature in which the
device will be required to operate.
• Any knowledge you can get about the heat
sinking available to the device (e.g., can heat be
dissipated into the ground plane or power plane,
if using a surface-mount part? Is any airflow
available?).
The data sheet will almost always give a value of on resistance given for the MOSFET at a gate-source voltage of 4.5V,
and another value at a gate-source voltage of 10V. As a first
approximation, add the two values together and divide by two
to get the on-resistance of the part with 8V of enhancement.
Call this value RON. Since a heavily enhanced MOSFET acts
as an ohmic (resistive) device, almost all that’s required to
determine steady-state power dissipation is to calculate I2R.
The one addendum to this is that MOSFETs have a slight
increase in RON with increasing die temperature. A good
approximation for this value is 0.5% increase in RON per °C
rise in junction temperature above the point at which RON was
initially specified by the manufacturer. For instance, if the
selected MOSFET has a calculated RON of 10mΩ at a
TJ = 25°C, and the actual junction temperature ends up
at 110°C, a good first cut at the operating value for R
ON
would be:
RON ≅ 10mΩ[1 + (110 - 25)(0.005)] ≅ 14.3mΩ
The final step is to make sure that the heat sinking available
to the MOSFET is capable of dissipating at least as much
power (rated in °C/W) as that with which the MOSFET’s
performance was specified by the manufacturer. Here are a
few practical tips:
1. The heat from a surface-mount device such as
an SO-8 MOSFET flows almost entirely out of
the drain leads. If the drain leads can be soldered down to one square inch or more, the
copper will act as the heat sink for the part. This
copper must be on the same layer of the board
as the MOSFET drain.
Q1
IRF7822
(SO-8)
R3
10Ω
14
C2
0.01µF
7
FB
6
Downstream
5
Signals
Undervoltage (Output) = 11.0V
POR/START-UP Delay = 60ms
*Recommended for MOSFETs with gate-source
breakdown of 20V or less (IRF7822 VGS(MAX) = 12V)
for catastrophic output short circuit protection.
Additional pins omitted for clarity.
*D1
1N5240B
10V
R4
100kΩ
1%
R5
13.3kΩ
1%
C
LOAD
220µF
12V@5A
V
OUT
V
12V
R
SENSE
0.007Ω
IN
C1
1µF
R1
47kΩ
4
R2
33kΩ
0.1µF
2%
12
34
1615
SENSEVCC
ON
MIC2085
CPOR
C3
GND
GATE
/FAULT
/POR
83
Figure 11. Zener Clamped MOSFET GATE
January 200423M0235-121903
MIC2085/2086Micrel
2. Airflow works. Even a few LFM (linear feet per
minute) of air will cool a MOSFET down substantially. If you can, position the MOSFET(s)
near the inlet of a power supply’s fan, or the
outlet of a processor’s cooling fan.
3. The best test of a surface-mount MOSFET for
an application (assuming the above tips show it
to be a likely fit) is an empirical one. Check the
MOSFET's temperature in the actual layout of
the expected final circuit, at full operating
current. The use of a thermocouple on the drain
leads, or infrared pyrometer on the package, will
then give a reasonable idea of the device’s
junction temperature.
MOSFET Transient Thermal Issues
Having chosen a MOSFET that will withstand the imposed
voltage stresses, and the worse case continuous I2R power
dissipation which it will see, it remains only to verify the
MOSFET’s ability to handle short-term overload power dissipation without overheating. A MOSFET can handle a much
higher pulsed power without damage than its continuous
dissipation ratings would imply. The reason for this is that, like
everything else, thermal devices (silicon die, lead frames,
etc.) have thermal inertia.
In terms related directly to the specification and use of power
MOSFETs, this is known as “transient thermal impedance,”
or Z
. Almost all power MOSFET data sheets give a
θ(J-A)
Transient Thermal Impedance Curve. For example, take the
following case: VIN = 12V, t
I
LOAD(CONT. MAX)
is 2.5A, the slow-trip threshold is 48mV
OCSLOW
has been set to 100msec,
nominal, and the fast-trip threshold is 95mV. If the output is
accidentally connected to a 3Ω load, the output current from
the MOSFET will be regulated to 2.5A for 100ms (t
OCSLOW
before the part trips. During that time, the dissipation in the
MOSFET is given by:
P = E x I E
P
MOSFET
= (4.5V x 2.5A) = 11.25W for 100msec.
MOSFET
= [12V-(2.5A)(3Ω)] = 4.5V
At first glance, it would appear that a really hefty MOSFET is
required to withstand this sort of fault condition. This is where
the transient thermal impedance curves become very useful.
Figure 12 shows the curve for the Vishay (Siliconix) Si4410DY,
a commonly used SO-8 power MOSFET.
Taking the simplest case first, we’ll assume that once a fault
event such as the one in question occurs, it will be a long time
– 10 minutes or more – before the fault is isolated and the
channel is reset. In such a case, we can approximate this as
a “single pulse” event, that is to say, there’s no significant duty
cycle. Then, reading up from the X-axis at the point where
“Square Wave Pulse Duration” is equal to 0.1sec (=100msec),
we see that the Z
of this MOSFET to a highly infrequent
θ(J-A)
event of this duration is only 8% of its continuous R
This particular part is specified as having an R
50°C/W for intervals of 10 seconds or less. Thus:
Assume TA = 55°C maximum, 1 square inch of copper at the
drain leads, no airflow.
Recalling from our previous approximation hint, the part has
an R
of (0.0335/2) = 17mΩ at 25°C.
ON
Assume it has been carrying just about 2.5A for some time.
When performing this calculation, be sure to use the highest
anticipated ambient temperature (T
) in which the
A(MAX)
MOSFET will be operating as the starting temperature, and
find the operating junction temperature increase (∆TJ) from
that point. Then, as shown next, the final junction temperature
is found by adding T
and ∆TJ. Since this is not a closed-
A(MAX)
form equation, getting a close approximation may take one or
two iterations, but it’s not a hard calculation to perform, and
tends to converge quickly.
Then the starting (steady-state)TJ is:
TJ≅ T
≅ T
A(MAX)
A(MAX)
x I2 x R
+ ∆T
J
+ [RON + (T
θ(J-A)
– TA)(0.005/°C)(RON)]
A(MAX)
TJ≅ 55°C + [17mΩ + (55°C-25°C)(0.005)(17mΩ)]
)
x (2.5A)2 x (50°C/W)
TJ≅ (55°C + (0.122W)(50°C/W)
≅ 61.1°C
Iterate the calculation once to see if this value is within a few
percent of the expected final value. For this iteration we will
start with TJ equal to the already calculated value of 61.1°C:
So our original approximation of 61.1°C was very close to the
correct value. We will use TJ = 61°C.
Finally, add (11.25W)(50°C/W)(0.08) = 45°C to the steadystate TJ to get T
J(TRANSIENT MAX.)
= 106°C. This is an accept-
able maximum junction temperature for this part.
PCB Layout Considerations
Because of the low values of the sense resistors used with the
MIC2085/86 controllers, special attention to the layout must
be used in order for the device’s circuit breaker function to
operate properly. Specifically, the use of a 4-wire Kelvin
connection to measure the voltage across R
SENSE
is highly
recommended. Kelvin sensing is simply a means of making
sure that any voltage drops in the power traces connecting to
the resistors does not get picked up by the traces themselves.
Additionally, these Kelvin connections should be isolated
from all other signal traces to avoid introducing noise onto
these sensitive nodes. Figure 13 illustrates a recommended,
CurrentFlowtotheLoad
WW
*SENSERESISTOR
(2512)
multi-layer layout for the R
, Power MOSFET, timer(s),
SENSE
overvoltage and feedback network connections. The feedback and overvoltage resistive networks are selected for a
12V application (from Figure 5). Many hot swap applications
will require load currents of several amperes. Therefore, the
power (VCC and Return) trace widths (W) need to be wide
enough to allow the current to flow while the rise in temperature for a given copper plate (e.g., 1 oz. or 2 oz.) is kept to a
maximum of 10°C ~ 25°C. Also, these traces should be as
short as possible in order to minimize the IR drops between
the input and the load. For a starting point, there are many
trace width calculation tools available on the web such as the
following link:
http://www.aracnet.com/cgi-usr/gpatrick/trace.pl
Finally, plated-through vias are utilized to make circuit con-
nections to the power and ground planes. The trace connections with indicated vias should follow the example shown for
the GND pin connection in Figure 13.
Figure 13. Recommended PCB Layout for Sense Resistor, Power MOSFET,
and Feedback/Overvoltage Network
January 200425M0235-121903
MIC2085/2086Micrel
MOSFET and Sense Resistor Vendors
Device types and manufacturer contact information for power
MOSFETs and sense resistors is provided in Table 4. Some
of the recommended MOSFETs include a metal heat sink on
the bottom side of the package. The recommended trace for
MOSFET VendorsKey MOSFET Type(s)*ApplicationsContact Information
“LR” Serieswww.irctt.com/pdf_files/LRC.pdf
(second source to “WSL”)(828) 264-8861
Table 4. MOSFET and Sense Resistor Vendors
M0235-12190326January 2004
MIC2085/2086Micrel
Package Information
PIN 1
0.009 (0.2286)
0.0098 (0.249)
0.0040 (0.102)
SEATING
PLANE
0.025 BSC
(0.635)
0.157 (3.99)
0.150 (3.81)
REF
0.0688 (1.748)
0.0532 (1.351)
0.025 (0.635)
BSC
0.344 (8.74)
0.337 (8.56)
0.012 (0.30)
0.008 (0.20)
0.0098 (0.249)
0.0075 (0.190)
0.196 (4.98)
0.189 (4.80)
16-Pin QSOP (QS)
0.0575 REF
8¡
0.157 (3.99)
0.150 (3.81)
0.012 (0.305)
0.008 (0.203)
0¡
DIMENSIONS:
INCHES (MM)
0.050 (1.27)
0.016 (0.40)
0.244 (6.20)
0.229 (5.82)
0.244 (6.20)
0.229 (5.82)
45¡
8¡
0¡
Rev. 04
0.009 (0.229)
0.007 (0.178)
0.068 (1.73)
0.053 (1.35)
7¡ BSC
0.010 (0.254)
0.004 (0.102)
0.050 (1.27)
0.016 (0.40)
20-Pin QSOP (QS)
Rev. 04
Note:
1. All Dimensions are in Inches (mm) excluding mold flash.
2. Lead coplanarity should be 0.004" max.
3. Max misalignment between top and bottom.
4. The lead width, B to be determined at 0.0075" from lead tip.
January 200427M0235-121903
MIC2085/2086Micrel
MICREL, INC. 1849 FORTUNE DRIVESAN JOSE, CA 95131USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
M0235-12190328January 2004
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel for any damages resulting from such use or sale.