MICREL LMC7101BIM5, LMC7101AIM5 Datasheet

LMC7101 Micrel

LMC7101

Low-Power Operational Amplifier

General Description

The LMC7101 is a high-performance, low-power, operational
amplifier which is pin-for-pin compatible with the National
Semiconductor LMC7101. It features rail-to-rail input and
output performance in Micrel’s IttyBitty™ SOT-23-5 package.

The LMC7101 is a 500kHz gain bandwidth amplifier de­signed to operate from 2.7V to 12V single-ended power
supplies with guaranteed performance at supply voltages of

2.7V, 3V, 5V, and 12V.
This op amp’s input common-mode range includes ground

and extends 300mV beyond the supply rails. For example,
the common-mode range is –0.3V to +5.3V with a 5V supply.

Ordering Information

Part Number Marking Grade Temperature Range Package

LMC7101AIM5 A12A Prime –40°C to +85°C SOT-23-5
LMC7101BIM5 A12 Standard –40°C to +85°C SOT-23-5

Features

• Small footprint SOT-23-5 package

• Guaranteed 2.7V, 3V, 5V, and 12V performance

• 500kHz gain-bandwidth

• 0.01% total harmonic distortion at 10kHz (5V, 2kΩ)

• 0.5mA typical supply current at 5V

Applications

• Mobile communications, cellular phones, pagers

• Battery-powered instrumentation

• PCMCIA, USB

• Portable computers and PDAs

Pin Configuration

IN+

OUTV+

13

2

Part
Identification

A12A

45

IN–

V–

Pin Description

Pin Number Pin Name Pin Function

1 OUT Amplifier Output
2 V+ Positive Supply
3 IN+ Noninverting Input
4 IN– Inverting Input
5 V– Negative Supply: Negative supply for split supply application or ground for

Functional Configuration

single supply application.

IN+

45

IN–

OUTV+

13

2

V–

SOT-23-5 (M5)

Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 [phone] • fax + 1 [phone] • http://www.micrel.com

September 1999 1 LMC7101

LMC7101 Micrel

Absolute Maximum Ratings (Note 1)

Supply Voltage (VV+ – VV–)...........................................15V

Differential Input Voltage (V
I/O Pin Voltage (VIN, V

OUT

.............................................V

Junction Temperature (TJ) ...................................... +150°C

Storage Temperature ...............................–65°C to +150°C

– V

IN+

), Note 2

) ...........±(VV+ – VV–)

IN–

+ 0.3V to V

V+

V–

– 0.3V

Operating Ratings (Note 1)

Supply Voltage (VV+ – VV–).............................. 2.7V to 12V

Ambient Temperature (TA)......................... –40°C to +85°C

Junction Temperature (TJ) ....................... –40°C to +125°C

Max. Junction Temperature (T

Package Thermal Resistance (θJA), Note 4..........325°C/W

Max. Power Dissipation............................................ Note 3

), Note 3 .........+125°C

J(max)

Lead Temperature (soldering, 10 sec.) .....................260°C

ESD, Note 5.................................................................. 2kV

Electrical Characteristics (2.7V)

V+ = +2.7V, V– = 0V, VCM = V

Symbol Parameter Condition Typ Min Max Min Max Units

V

OS

TCV

OS

I

B

I

OS

R

IN

CMRR Common-Mode Rejection Ratio 0V ≤ VCM ≤ 2.7V, Note 6 70 50 50 dB
V

CM

PSRR Power Supply Rejection Ratio V+ = 1.35V to 1.65V, V– = 60 50 45 dB

C

IN

V

O

I

S

SR Slew Rate 0.4 V/µs
GBW Gain-Bandwidth Product 0.5 MHz

Input Offset Voltage 0.11 6 9 mV
Input Offset Voltage Average Drift 1.0 µV/°C
Input Bias Current 1.0 64 64 pA
Input Offset Current 0.5 32 32 pA
Input Resistance >1 TΩ

Input Common-Mode Voltage input low, CMRR ≥ 50dB –0.3 0.0 0.0 V

Common-Mode Input Capacitance 3 pF
Output Swing output high, RL = 10k 2.699 2.64 2.64 V

Supply Current V

= V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted

OUT

LMC7101A LMC7101B

input high, CMRR ≥ 50dB 3.0 2.7 2.7 V

–1.35V to –1.65V, VCM = 0

output low, RL = 10k 0.001 0.06 0.06 V
output high, RL = 2k 2.692 2.6 2.6 V
output low, RL = 2k 0.008 0.1 0.1 V

= V+/2 0.5 0.81 0.81 mA

OUT

0.95 0.95 mA

Electrical Characteristics (3.0V)

V+ = +3.0V, V– = 0V, VCM = V

Symbol Parameter Condition Typ Min Max Min Max Units

V

OS

TCV
I

B

I

OS

R

IN

OS

Input Offset Voltage 0.11 4 7 mV

Input Offset Voltage Average Drift 1.0 µV/°C
Input Bias Current 1.0 64 64 pA
Input Offset Current 0.5 32 32 pA
Input Resistance >1 TΩ

LMC7101 2 September 1999

= V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted

OUT

LMC7101A LMC7101B

69mV

LMC7101 Micrel

LMC7101A LMC7101B

Symbol Parameter Condition Typ Min Max Min Max Units

CMRR Common-Mode Rejection Ratio 0V ≤ VCM ≤ 3.0V, Note 6 74 60 60 dB
V

CM

Input Common-Mode Voltage input low, CMRR ≥ 50dB –0.3 0 0 V

input high, CMRR ≥ 50dB 3.3 3.0 3.0 V

PSRR Power Supply Rejection Ratio V+ = 1.5V to 6.0V, V– = 80 68 60 dB

–1.5V to –6.0V, VCM = 0
C
V

IN
OUT

Common-Mode Input Capacitance 3 pF
Output Swing output high, RL = 2k 2.992 2.9 2.9 V

output low, RL = 2k 0.008 0.1 0.1 V

output high, RL = 600Ω 2.973 2.85 2.85 V

output low, RL = 600Ω 0.027 0.15 0.15 V
I

S

Supply Current 0.5 0.81 0.81 mA

0.95 0.95 mA

Electrical Characteristics—DC (5V)

V+ = +5.0V, V– = 0V, VCM = 1.5V, V

Symbol Parameter Condition Typ Min Max Min Max Units

V

OS

TCV
I

B

I

OS

R

IN

OS

Input Offset Voltage 0.11 3 7 mV

Input Offset Voltage Average Drift 1.0 µV/°C
Input Bias Current 1.0 64 64 pA
Input Offset Current 0.5 32 32 pA
Input Resistance >1 TΩ

CMRR Common-Mode Rejection Ratio 0V ≤ V

V

CM

Input Common-Mode Voltage input low, CMRR ≥ 50dB –0.3 –0.20 –0.20 V

+PSRR Positive Power Supply V+ = 5V to 12V, 82 70 65 dB

Rejection Ratio V– = 0V, V

–PSRR Negative Power Supply V+ = 0V, V– = –5V to –12V, 82 70 65 dB

Rejection Ratio V
C
V

I

IN
OUT

SC

Common-Mode Input Capacitance 3 pF

Output Swing output high, RL = 2k 4.989 4.9 4.9 V

Output Short Circuit Current sourcing (V

Note 7 sinking (V
I

S

Supply Current V

= V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted

OUT

LMC7101A LMC7101B

59mV

≤ 5V, Note 6 82 60 60 dB

CM

55 55 dB

0.00 0.00 V

input high, CMRR ≥ 50dB 5.3 5.20 5.20 V

5.00 5.00 V

= 1.5V 65 62 dB

OUT

= –1.5V 65 62 dB

OUT

4.85 4.85 V

output low, R

output high, R

output low, R

= 2k 0.011 0.1 0.1 V

L

= 600Ω 4.963 4.9 4.9 V

L

= 600Ω 0.037 0.1 0.1 V

L

4.8 4.8 V

0.15 0.15 V

0.2 0.2 V

= 0V) or 200 120 120 mA

OUT

= 5V) 80 80 mA

OUT

= V+/2 0.5 0.85 0.85 mA

OUT

1.0 1.0 mA

September 1999 3 LMC7101

LMC7101 Micrel

Electrical Characteristics—DC (12V)

V+ = +12V, V– = 0V, VCM = 1.5V, V

Symbol Parameter Condition Typ Min Max Min Max Units

V

OS

TCV
I

B

I

OS

R

IN

OS

Input Offset Voltage 0.11 6 9 mV
Input Offset Voltage Average Drift 1.0 µV/°C
Input Bias Current 1.0 64 64 pA
Input Offset Current 0.5 32 32 pA
Input Resistance >1 TΩ

CMRR Common-Mode Rejection Ratio 0V ≤ V

V

CM

Input Common-Mode Voltage input low, V+ = 12V, –0.3 –0.20 –0.20 V

+PSRR Positive Power Supply V+ = 5V to 12V, 82 70 65 dB

Rejection Ratio V– = 0V, V

–PSRR Negative Power Supply V+ = 0V, V– = –5V to 82 70 65 dB

Rejection Ratio –12V, V

A

C
V

I

I

V

IN
OUT

SC

S

Large Signal Voltage Gain sourcing or sinking, 340 80 80 V/mV

Common-Mode Input Capacitance 3 pF
Output Swing output high, V+ = 12V, 11.98 11.9 11.9 V

Output Short Circuit Current sourcing (V

Supply Current V

= V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted

OUT

LMC7101A LMC7101B

≤ 12V, Note 6 82 65 65 dB

CM

60 60 dB

CMRR ≥ 50dB 0.00 0.00 V
input high, V+ = 12V, 12.3 12.2 12.2 V

CMRR ≥ 50dB 12.0 12.0 V

= 1.5V 65 62 dB

OUT

= –1.5V 65 62 dB

OUT

RL = 2k, Note 9 40 40 V/mV
sourcing or sinking, 300 15 15 V/mV

RL = 600Ω, Note 9 10 10 V/mV

RL = 2k 11.87 11.87 V
output low, V+ = 12V, 0.02 0.10 0.10 V

RL = 2k, 0.13 0.13 V
output high, V+ = 12V, 11.93 11.73 11.73 V

RL = 600Ω 11.65 11.65 V
output low, V+ = 12V, 0.07 0.27 0.27 V

RL = 600Ω 0.35 0.35 V

= 0V) or 300 200 200 mA

OUT

sinking (V

Notes 7, 8

= V+/2 0.8 1.5 1.5 mA

OUT

= 12V), 120 120 mA

OUT

1.71 1.71 mA

LMC7101 4 September 1999

LMC7101 Micrel

Electrical Characteristics—AC (5V)

V+ = 5V, V– = 0V, VCM = 1.5V, V

Symbol Parameter Condition Typ Min Max Min Max Units

THD Total Harmonic Distortion f = 10kHz, A

SR Slew Rate 0.3 V/µs
GBW Gain-Bandwidth Product 0.5 MHz

= V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted

OUT

LMC7101A LMC7101B

= –2, 0.01 %

RL = 2kΩ, V

V

OUT

= 4.0 V

PP

Electrical Characteristics—AC (12V)

V+ = 12V, V– = 0V, VCM = 1.5V, V

Symbol Parameter Condition Typ Min Max Min Max Units

THD Total Harmonic Distortion f = 10kHz, A

SR Slew Rate V+ = 12V, Note 10 0.3 0.19 0.19 V/µs

GBW Gain-Bandwidth Product 0.5 MHz

φ

m

G

m

e

n

Phase Margin 45 °

Gain Margin 10 dB

Input-Referred Voltage Noise f = 1kHz, VCM = 1V 37

= V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted

OUT

LMC7101A LMC7101B

= –2, 0.01 %

RL = 2k, V

V

OUT

= 8.5 V

PP

0.15 0.15 V/µs

nV/ Hz

i

n

General Notes: Devices are ESD protected; however, handling precautions are recommended. All limits guaranteed by testing on statistical analysis.
Note 1. Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when

Note 2. I/O Pin Voltage is any external voltage to which an input or output is referenced.
Note 3. The maximum allowable power dissipation is a function of the maximum junction temperature, T

Note 4. Thermal resistance, θJA, applies to a part soldered on a printed-circuit board.
Note 5. Human body model, 1.5k in series with 100pF.
Note 6. Common-mode performance tends to follow the typical value. Minimum value limits reflect performance only near the supply rails.
Note 7. Continuous short circuit may exceed absolute maximum TJ under some conditions.
Note 8. Shorting OUT to V+ when V+ > 12V may damage the device.
Note 9. RL connected to 5.0V. Sourcing: 5V ≤ V
Note 10. Device connected as a voltage follower with a 12V step input. The value is the positive or negative slew rate, whichever is slower.

Input-Referred Current Noise f = 1kHz 1.5

operating the device outside its recommended operating ratings.

; the junction-to-ambient thermal
resistance, θJA; and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using:
PD = (T

– TA) ÷ θJA. Exceeding the maximum allowable power dissipation will result in excessive die temperature.

J(max)

≤ 12V. Sinking: 2.5V ≤ V

OUT

OUT

≤ 5V.

J(max)

fA/ Hz

September 1999 5 LMC7101

LMC7101 Micrel

Typical Characteristics

Supply Current

1000

SUPPLY CURRENT (µA)

vs. Supply Voltage

800

600

400

200

0

024681012

–40°C

SUPPLY VOLTAGE (V)

+PSRR

120

100

80

60

40

+PSRR (dB)

20

1x10

vs. Frequency

5V

12V

2.7V

TA = 25°C

0

1

1x1021x1031x1041x10

FREQUENCY (Hz)

25°C

85°C

Input Current vs.

Junction Temperature

10000

1000

100

10

INPUT CURRENT (pA)

1

-40 0 40 80 120 160

JUNCTION TEMPERATURE (°C)

100

80

60

40

-PSRR (dB)

20

0

-20

1

1x10

CMRR

140
120
100

80
60

CMRR (dB)

40
20

5

0

1x10

vs. Frequency

12V

2.7V

5V

TA = 25°C

1

1x1021x1031x1041x10

FREQUENCY (Hz)

1000

TA = 25°C

100

10

1

0.1

CURRENT SINK / SOURCE (mA)

5

0.01

0.001 0.01 0.1 1 10

−PSRR

vs. Frequency

12V

5V

TA = 25°C

1x1021x1031x1041x10

FREQUENCY (Hz)

2.7V

Sink / Source Currents

vs. Output Voltage

OUTPUT VOLTAGE (V)

5

Falling Slew Rate vs.

vs. Supply Voltage

0.8

0.7

0.6

0.5

0.4

0.3

0.2

SLEW RATE (V/µs)

0.1
0

024681012

-40°C
+25°C

+85°C

SUPPLY VOLTAGE (V)

Rising Slew Rate vs.

vs. Supply Voltage

0.8

0.7

0.6

0.5

0.4

0.3

0.2

SLEW RATE (V/µs)

0.1
0

024681012

-40°C

+25°C

+85°C

SUPPLY VOLTAGE (V)

Phase Margin

vs. Capacitive Load

100

80

60

3V

40

2.7V

PHASE MARGIN (°)

TA = 25°C

20

AV = 1

0
100 1000

200 300 500

LOAD CAPACITANCE (pF)

12V

5V

Offset Voltage

vs. Supply Voltage

800

600

85°C

25°C

400

-40°C

200

∆ OFFSET VOLTAGE (µV)

0

024681012

SUPPLY VOLTAGE (V)

LMC7101 6 September 1999

LMC7101 Micrel

-20

0

20

40

60

80

100

-60

-30

0

30

60

90

120

1x10

2

1x1031x1041x1051x10

6

OFFSET VOLTAGE (µV)

PHASE (°)

COMMON-MODE VOLTAGE (V)

0

20

40

60

80

1x10

2

1x1031x1041x10

5

GAIN (dB)

FREQUENCY (Hz)

12V Open-Loop

Frequency Response

1M

600Ω

2k

TA = 25°C

2.7V Open-Loop

Frequency Response

100

80

60

RL = 2k

40

GAIN (dB)

TA = 25°C

20

0

2

1x10

FREQUENCY (Hz)

2.7V Open-Loop Gain

100

75

50

25

TA = 25°C

GAIN (dB)

RL = 1MΩ

0

-25

2

1x10

1x1031x1041x1051x10

FREQUENCY (Hz)

RL = 1M

1x1031x1041x10

and Phase

100pF (°)

500pF (°)

500pF

(dB)

100pF (dB)

135

90

45

0

-45

-90

5V Open-Loop

Frequency Response

80

60

40

GAIN (dB)

20

TA = 25°C

0

5

1x10

2

1x1031x1041x10

FREQUENCY (Hz)

5V Open-Loop

Gain and Phase

PHASE (°)

6

TA = 25°C
R

= 1MΩ

L

100pF (dB)
500pF (dB)
1000pF (dB)

600Ω

100pF (°)

500pF (°)

1000pF (°)

1MΩ

2k

5

12V Open-Loop Gain

120

TA = 25°C

100

R

80
60
40

GAIN (dB)

20

0

-20

2

1x10

and Phase

= 1MΩ

L

100pF (dB)
500pF (dB)
1000pF (dB)

1x1031x1041x1051x10

FREQUENCY (Hz)

100pF (°)

500pF (°)

1000pF (°)

150
120
90
60
30
0

-30

-60

PHASE (°)

6

September 1999 7 LMC7101

LMC7101 Micrel

Functional Characteristics

INPUT

OUTPUT

Inverting Small-Signal

Pulse Response

Noninverting Small-Signal

Pulse Response

Inverting Large-Signal

Pulse Response

INPUT

OUTPUT

Noninverting Large-Signal

Pulse Response

OUTPUT INPUT

OUTPUT INPUT

Input Voltage Noise vs. Frequency

LMC7101 8 September 1999

LMC7101 Micrel

Application Information

Input Common-Mode Voltage

Some amplifiers exhibit undesirable or unpredictable perfor­mance when the inputs are driven beyond the common-mode
voltage range, for example, phase inversion of the output
signal. The LMC7101 tolerates input overdrive by at least
200mV beyond either rail without producing phase inversion.

If the absolute maximum input voltage (700mV beyond either
rail) is exceeded, the input current should be limited to ±5mA
maximum to prevent reducing reliability. A 10kΩ series input
resistor, used as a current limiter, will protect the input
structure from voltages as large as 50V above the supply or
below ground. See Figure 1.

V

R

V

IN

IN

10kΩ

Figure 1. Input Current-Limit Protection

Output Voltage Swing

Sink and source output resistances of the LMC7101 are
equal. Maximum output voltage swing is determined by the
load and the approximate output resistance. The output
resistance is:

V

R

OUT

V

is the voltage dropped within the amplifier output

DROP

stage. V

DROP

=

I

and I

DROP

LOAD

LOAD

can be determined from the V
(output swing) portion of the appropriate Electrical Character­istics table. I
minus V+/2 and divided by R

is equal to the typical output high voltage

LOAD

. For example, using the

LOAD

Electrical Characteristics DC (5V) table, the typical output
high voltage using a 2kΩ load (connected to V+/2) is 4.989V,
which produces an I

4 989 2 5

1 245





of

LOAD

..

V – V
2

k

Ω



mA




OUT

=

1 245.

.mA

.

V

0 011

R

OUT

.

==≈Ω

0 001245

.

9

88

A

.

Driving Capacitive Loads

Driving a capacitive load introduces phase-lag into the output
signal, and this in turn reduces op-amp system phase margin.
The application that is least forgiving of reduced phase
margin is a unity gain amplifier. The LMC7101 can typically
drive a 100pF capacitive load connected directly to the output
when configured as a unity-gain amplifier.

Using Large-Value Feedback Resistors

A large-value feedback resistor (> 500kΩ) can reduce the
phase margin of a system. This occurs when the feedback
resistor acts in conjunction with input capacitance to create
phase lag in the fedback signal. Input capacitance is usually
a combination of input circuit components and other parasitic
capacitance, such as amplifier input capacitance and stray
printed circuit board capacitance.

Figure 2 illustrates a method of compensating phase lag
caused by using a large-value feedback resistor. Feedback
capacitor CFB introduces sufficient phase lead to overcome
the phase lag caused by feedback resistor RFB and input
capacitance CIN. The value of CFB is determined by first
estimating CIN and then applying the following formula:

R C R C

×≤ ×

IN IN FB FB

C

FB

R

FB

R

V

O

IN

IN

C

IN

Figure 2. Cancelling Feedback Phase Lag

Since a significant percentage of CIN may be caused by board
layout, it is important to note that the correct value of CFB may
change when changing from a breadboard to the final circuit
layout.

V

OUT

Voltage drop in the amplifier output stage is:

V

= 5.0V – 4.989V

DROP

V

= 0.011V

DROP

Because of output stage symmetry, the corresponding typical
output low voltage (0.011V) also equals V

DROP

. Then:

September 1999 9 LMC7101

LMC7101 Micrel

V

OUT

0V to V+

V+

V

IN

0V to 2V

2

5

1

3

4

LMC7101

R

S

10Ω

1

⁄2W

Load

V

S

0.5V to Q1 V

CEO(sus)

I

OUT

Q1
2N3904

V

CEO

= 40V

I

C(max)

= 200mA

{

Change Q1 and R

S

for higher current
and/or different gain.

I

V
R

100mA/V as shown

OUT

IN

S

==

C

Typical Circuits

Some single-supply, rail-to-rail applications for which the
LMC7101 is well suited are shown in the circuit diagrams of
Figures 3 through 7.

V+

2

0V to

V

IN

V+
A

3

4

V

LMC7101

5

1

V

OUT

0V to V+

R2

900k

R1
100k

Figure 3a. Noninverting Amplifier

Figure 5. Voltage-Controlled Current Sink

100

V+

(V)

OUT

V

0

0 100

A = 1 +

V

VIN (V)

R2

R

10

1

≈

C1

0.001µF

R4

100k

V+

2

4

3

LMC7101

5

1

V

OUT
V+
0V

R3
100k

R2

330k

V+

R4

330k

R4

100k

2

LMC7101

5

1

C

A

=− = =−

V

OUT

V

OUT

0V

R

L

R2R1330k

33k

Figure 3b. Noninverting Amplifier Behavior

V+

V

IN

0V to V+

3

4

2

LMC7101

1

5

0V to V+

V

OUT

V

OUT

= V

Figure 4. Voltage Follower

R2

V+

100k

Figure 6. Square Wave Oscillator

IN

R1

V+

33k

4

3

R3

330k

IN

C1
1µF

Figure 7. AC-Coupled Inverting Amplifier

LMC7101 10 September 1999

10

LMC7101 Micrel

Package Information

1.90 (0.075) REF

0.95 (0.037) REF

3.02 (0.119)

2.80 (0.110)

0.50 (0.020)

0.35 (0.014)

1.75 (0.069)

1.50 (0.059)

1.30 (0.051)

0.90 (0.035)

0.15 (0.006)

0.00 (0.000)

3.00 (0.118)

2.60 (0.102)

SOT-23-5 (M5)

10°

0°

DIMENSIONS:

MM (INCH)

0.20 (0.008)

0.09 (0.004)

0.60 (0.024)

0.10 (0.004)

September 1999 11 LMC7101

LMC7101 Micrel

MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 [phone] FAX + 1 [phone] WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.

© 1999 Micrel Incorporated

LMC7101 12 September 1999