Mesa 7I76 User Manual

7I76 STEP/DIR PLUS I/O DAUGHTERCARD
V1.22
iii
Table of Contents
GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
VIN POWER SOURCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
CABLE 5V POWER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
SETUP/OPERATE MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
ENCODER INPUT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
CONNECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7I76 CONNECTOR LOCATIONS AND DEFAULT JUMPER POSITIONS . . . . 3
HOST INTERFACE CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
TB2 STEP AND DIR CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
TB3 STEP/DIR, ENCODER AND RS-422 CONNECTOR . . . . . . . . . . . . . . . . . 6
TB4 SPINDLE CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
FIELD INPUT/OUTPUT CONNECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
TB6 PINOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
TB5 PINOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
FIELD POWER CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
HOST INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STEP/DIR INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
RS-422 INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
ENCODER INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SPINDLE INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SPINDLE ISOLATED OUTPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STATUS LEDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
iv
Table of Contents
OPERATION
FIELD I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
FIELD AND VIN POWER SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
FIELD OUTPUT CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
WHY SOURCING OUTPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
SHORT CIRCUIT PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
OVERTEMPERATURE PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . 13
MAXIMUM PER CHIP CURRENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
VOLTAGE CLAMPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
FIELD INPUT CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
WHY SINKING INPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
ANALOG INPUTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
FIELD VOLTAGE MONITORING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
WATCHDOG AND FAULTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FIELD I/O PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
NON-VOLATILE FIELD I/O PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . 16
OPERATE MODE BAUD RATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
WATCHDOG TIMEOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
RPD, WPD, AND UFLBP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SOFTWARE PROCESS DATA MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
v
Table of Contents
REFERENCE INFORMATION
SSLBP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
REGISTER MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PROCESS INTERFACE REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . 19
COMMAND REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
COMMAND REGISTER WRITE IGNORE . . . . . . . . . . . . . . . . . . . . . . 20
DATA REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
LOCAL READ OPERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
LOCAL WRITE OPERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
LOCAL PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
NORMAL START . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
STOP ALL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STOP INDIVIDUAL CHANNELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DOIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
PER CHANNEL INTERFACE DATA REGISTERS . . . . . . . . . . . . . . . . 25
PER CHANNEL CONTROL AND STATUS REGISTERS . . . . . . . . . . 25
REMOTE MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
INTERFACE AND CS REGISTER CONTENTS AT START . . . . . . . . . 25
CS REGISTER AFTER START . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
CS REGISTER AFTER DOIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PROCESS DATA DISCOVERY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PROCESS TABLE OF CONTENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PROCESS DATA DESCRIPTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PROCESS DATA DESCRIPTOR FIELDS . . . . . . . . . . . . . . . . . . . . . . 29
RECORD_TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
DATA_LENGTH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
DATA_TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
DATA_DIRECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
PARAMETER_MIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
PARAMETER_MAX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
UNIT_STRING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
NAME_STRING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
NUMERIC PROCESS DATA SCALING . . . . . . . . . . . . . . . . . . . . . . . . 31
MODE DESCRIPTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
MODE TYPES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PROCESS ELEMENT PACKING AND UNPACKING . . . . . . . . . . . . . 32
7I76 SPECIFIC PROCESS DATA EXAMPLE . . . . . . . . . . . . . . . . . . . 33
NORMAL MODE OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
SETUP START . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
SETUP MODE OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
REMOTE READ EXAMPLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
REMOTE WRITE EXAMPLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
DISCOVERY SEQUENCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
vi
Table of Contents
REFERENCE INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
LBP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
LBP DATA READ/WRITEWCOMMAND . . . . . . . . . . . . . . . . . . . . . . . 41
EXAMPLE COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
LOCAL LBP COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
LOCAL LBP READ COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
LOCAL LBP WRITE COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
RPC COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
EXAMPLE RPC COMMAND LIST . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
SPECIAL RPCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
FRAMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
SSERIAL REMOTE RPCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
DRAWINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
7I76 1
GENERAL
DESCRIPTION
The 7I76 is daughtercard/breakout board for use with MESA's 25 pin I/O FPGA
cards like the 5I25. The 7I76 is designed for interfacing up to 5 Axis of step &dir step motor or servo motor drives and also provides a spindle encoder interface, isolated analog spindle speed control and 48 isolated I/O points for general purpose field I/O use.
All step and direction outputs are buffered 5V signals that can drive 24 mA. All
outputs support differential mode to reduce susceptibility to noise. An isolated analog spindle voltage with direction and enable outputs is provided for spindle control as is a single spindle encoder channel with TTL or differential inputs.
48 points of isolated field I/O are provided for general control use including limit
switch and control panel inputs, coolant enable and tool changer control outputs. Isolated I/O includes 32 sinking inputs and 16 sourcing outputs. Inputs can sense 5V to 32V signals and the outputs can switch 5V through 32V signals. Maximum output load is 300 mA. Outputs are short circuit protected. Field I/O is powered by an isolated 8-32V field power source.
One RS-422 interface is provided for I/O expansion via a serial I/O daughtercard.
All field wiring is terminated in pluggable 3.5 mm screw terminal blocks.
7I76 2
HARDWARE CONFIGURATION
GENERAL
Hardware setup jumper positions assume that the 7I76 card is oriented in an upright
position, that is, with the host interface DB25 connector pointing towards the left.
VIN POWER SOURCE
The isolated field I/O on the 7I76 runs from a switching power supply that can be
powered by field power or a separate supply (VIN) with ground common with field power. Normally the 7I76's VIN will be powered with field power. An on card jumper, W1 allows VIN to be connected to field power. If you wish to use a single power supply for the 7I76s field outputs and field logic power, W1 should be placed in the left hand position. This connects field power to VIN. If you wish to use a separate supply for VIN, W1 Should be placed in the right hand position.
CABLE 5V POWER
The 7I76 can get its 5V encoder, step/dir and serial interface power from the host
interface card if desired. W2 determines if the 7I76 gets this 5V power from the host FPGA card. If W2 is in the left hand position, host cable power is used. If W2 is in the right hand position, 5V power must be supplied to the 7I76 via TB3. This option must be set to match the cable power option of the host FPGA card. If the FPGA card supplies 5V, W2 must be in the left hand position. If the FPGA card does not supply 5V, W2 must be in the right hand position. Never apply external 5V power to the 7I76's TB3 connector when W2
is in the left hand position or you may damage the 7I76, FPGA card, PC, or connecting cable.
SETUP/OPERATE MODE
The 7I76 can run in setup mode or operate mode. In setup mode, the serial
interface baud rate is fixed at 115.2K baud. In the operate mode, the baud rate is set to
2.5M baud (default). Setup mode enables a normal PC to communicate with the 7I76 for setup purposes. W3 controls the setup/operate mode selection.T W3 must be in the "operate" mode for normal operation.
W3 MODE BAUD RATE LEFT Operate mode 2.5M baud (default, can be changed) RIGHT Setup Mode 115.2K baud (fixed)
ENCODER INPUT MODE
The 7I76s high speed encoder input can be programmed for differential or single
ended mode operation. W4, W5 and W6 set the encoder input mode. When W4,W5,and W6 are in the right hand position, the encoder input is mode is differential. When W4,W5, and W6 are in the left hand position, the encoder input mode is single ended or "TTL".
7I76 3
CONNECTORS
7I76 CONNECTOR LOCATIONS AND DEFAULT JUMPER POSITIONS
7I76 4
CONNECTORS
P1 HOST INTERFACE CONNECTOR
P1 is the DB25F connector on the 7I76 that connects to the FPGA card. Actual pin
functions depend on FPGA configuration but signal directions must be observed.
DB25 PIN GPIO FUNCT DIR DB25 PIN GPIO FUNC DIR
1 IO0 DIR0 OUT 14 IO1 STEP0 OUT 2 IO2 DIR1 OUT 15 IO3 STEP1 OUT 3 IO4 DIR2 OUT 16 IO5 STEP2 OUT 4 IO6 DIR3 OUT 17 IO7 STEP3 OUT 5 IO8 DIR4 OUT 18 GND 6 IO9 STEP4 OUT 19 GND 7 IO10 SS0TX OUT 20 GND 8 IO11 SS0RX IN 21 GND 9 IO12 SS1TX OUT 22 GND or 5V 10 IO13 SS1RX IN 23 GND or 5V 11 IO14 ENCI IN 24 GND or 5V 12 IO15 ENCB IN 25 GND or 5V 13 IO16 ENCA IN Notes
1. If jumper W2 is is the left hand position, pins 22 through 25 are 5V, if W2 is in the right hand position, Pins 22 through 25 are GND.
2. GPIO pins are for first FPGA connector, next connector series begins at GPIO17
3. Signal directions are relative to FPGA card, that is, an ‘OUT’ signal is an output from the FPGA card that drives the 7I76. Conversely an ‘IN’ signal is a FPGA input that is driven by the 7I76.
7I76 5
CONNECTORS
TB2 STEP AND DIR CONNECTOR
TB2 is the 7I76s main step and direction output connector. Both polarities of step
and direction signals are provided. Each channel on the interface uses 6 pins. TB2 is a 3.5 MM pluggable terminal block with supplied removable screw terminal plugs.
TB2 CONNECTOR PINOUT TB2 PIN SIGNAL TB2 PIN SIGNAL
1 GND 13 GND 2 STEP0- 14 STEP2­3 STEP0+ 15 STEP2+ 4 DIR0- 16 DIR2­5 DIR0+ 17 DIR2+ 6 +5VP 18 +5VP 7 GND 19 GND 8 STEP1- 20 STEP3­9 STEP1+ 21 STEP3+ 10 DIR1- 22 DIR3­11 DIR1+ 23 DIR3+ 12 +5VP 24 +5VP Note: 5VP pins are PTC short circuit protected 5V output pins for field wiring.
7I76 6
CONNECTORS
TB3 STEP/DIR, ENCODER AND RS-422 CONNECTOR
TB3 has a mix of signals including step/dir channel 4, an encoder interface, a RS-
422 interface, and 5V power supply terminals TB3 is a 24 terminal 3.5 MM pluggable terminal block with supplied removable screw terminal plugs.
TB3 CONNECTOR PINOUT TB3 PIN SIGNAL TB3 PIN SIGNAL
1 GND 13 IDX+ 2 STEP4- 14 IDX­3 STEP4+ 15 GND 4 DIR4- 16 RS-422 RX+ 5 DIR4+ 17 RS-422 RX­6 +5VP 18 RS-422 TX+ 7 ENCA+ 19 RS-422 TX­8 ENCA- 20 +5VP 9 GND 21 +5V 5V supply power 10 ENCB+ 22 +5V 5V supply power 11 ENCB- 23 GND 12 +5VP 24 GND Note: 5VP pins are PTC short circuit protected 5V output pins for field wiring.
7I76 7
CONNECTORS
TB4 SPINDLE CONNECTOR
TB4 is the spindle drive interface with isolated analog output and control signals for
a spindle interface.TB4 is a 8 terminal 3.5 MM pluggable terminal block with supplied removable screw terminal plugs.
TB4 PINOUT TB4 PIN SIGNAL
1 SPINDLE­2 SPINDLE OUT 3 SPINDLE+ 4 NC 5 SPINDLE ENA­6 SPINDLE ENA+ 7 SPINDLE DIR­8 SPINDLE DIR+
7I76 8
CONNECTORS
FIELD INPUT/OUTPUT CONNECTORS
Terminal blocks TB6 and TB5 are the 7I76s field input and output terminals. Inputs
0 through 15 and outputs 0 through 7 are terminated at TB6. Inputs 16 through 31 and outputs 8 through 15 are terminated at TB5. TB6 and TB5 are 3.5 MM pluggable terminal block with supplied removable screw terminal plugs. Pin one is at the bottom edge of the 7I76 card.
TB6 CONNECTOR PINOUT TB6 PIN I/O TB6 PIN I/O
1 INPUT0 13 INPUT12 2 INPUT1 14 INPUT13 3 INPUT2 15 INPUT14 4 INPUT3 16 INPUT15 5 INPUT4 17 OUTPUT0 6 INPUT5 18 OUTPUT1 7 INPUT6 19 OUTPUT2 8 INPUT7 20 OUTPUT3 9 INPUT8 21 OUTPUT4 10 INPUT9 22 OUTPUT5 11 INPUT10 23 OUTPUT6 12 INPUT11 24 OUTPUT7
7I76 9
CONNECTORS
FIELD INPUT/OUTPUT CONNECTORS
TB5 CONNECTOR PINOUT TB5 PIN OUTPUT TB5 PIN OUTPUT
1 INPUT16 13 INPUT28 2 INPUT17 14 INPUT29 3 INPUT18 15 INPUT30 4 INPUT19 16 INPUT31 5 INPUT20 17 OUTPUT8 6 INPUT21 18 OUTPUT9 7 INPUT22 19 OUTPUT10 8 INPUT23 20 OUTPUT11 9 INPUT24 21 OUTPUT12 10 INPUT25 22 OUTPUT13 11 INPUT26 23 OUTPUT14 12 INPUT27 24 OUTPUT15
7I76 10
CONNECTORS
FIELD POWER CONNECTOR
TB1 is the 7I76s field power connector. TB1 pinout is as follows:
TB1 PIN SIGNAL FUNCTION
1 VFIELD FIELD POWER 8-32V (Bottom pin) 2 VFIELD FIELD POWER 8-32V 3 VFIELD FIELD POWER 8-32V 4 VFIELD FIELD POWER 8-32V 5 VIN LOGIC POWER 8-32V 6 NC 7 NC 8 GROUND VIN, VFIELD, COMMON (Top pin)
Note: When W1 is in the default left hand position, VIN is connected to VFIELD, so only
VFIELD need be supplied to the 7I76 to power its field IO.
7I76 11
OPERATION
HOST INTERFACE
The 7I76 is intended to operate with a FPGA card with parallel port pinout like the
Mesa 5I25 or 6I25. The FPGA card supports the step/dir, encoder, and smart serial interface used by the field I/O and spindle interface and expansion RS-422 port. The FPGA card can also supply 5V power to the 7I76.
STEP/DIR INTERFACE
The 7I76 provides five channels of step/dir interface with buffered 5V differential
signal pairs. Each differential pair consists of two complementary 5V outputs. The differential signals allows reliable signal transmission in noisy environments and can directly interface with RS-422 line receivers. Step motor drives with single ended inputs connect to just one of the STEP and DIR signal outputs, that is either the STEP+/DIR+ or STEP-/DIR- signals, with the unused signals left unconnected at the 7I76. The input common signal on drives with single ended inputs connects to the 7I76s GND or 5VP pins depending on the drive type.
RS-422 INTERFACE
The 7I76 has one RS-422 interface available on TB3. This interface is intended for
I/O expansion with Mesa SSERIAL devices. The easiest way to make a cable for interfacing the 7I76 to these devices is to take a standard CAT5 or CAT6 cable, cut it in half, and wire the individual wires to the 7I76 screw terminals. The following chart gives the CAT5 to 7I76 screw terminal connections (EIA/TIA 568B colors shown):
TB3 PIN SIGNAL DIRECTION CAT5 PINS CAT5 568B COLOR 15 GND FROM 7I76 4,5 BLUE, BLUE / WHITE 16 RX+ TO 7I76 6 GREEN 17 RX- TO 7I76 3 GREEN / WHITE 18 TX+ FROM 7I76 2 ORANGE 19 TX- FROM 7I76 1 ORANGE / WHITE 20 +5V FROM 7I76 7,8 BROWN / WHITE,BROWN
Note: The 6 pin terminal block requires the +5V (brown and brown/white) and ground (blue and blue/white) pairs to be terminated in single screw terminal positions.
7I76 12
OPERATION
ENCODER INTERFACE
The 7I76 provide a one channel encoder interface with index. This is intended as
a spindle encoder but can be used for other purposes. The encoder input can be programmed for differential or single ended encoders. The encoder interface also provides short circuit protected 5V power to the encoder. When used with single ended encoders, the ENCA+, ENCB+ and IDX+ signals are wired to the encoder and the ENCA-,ENCB-, and IDX- terminal left unconnected.
SPINDLE INTERFACE
The 7I76 provides one analog output for spindle control. The analog output is a
isolated potentiometer replacement type device. It functions like a potentiometer with SPINDLE + being one end of the potentiometer, SPINDLEOUT being the wiper and SPINDLE- being the other end. The voltage on SPINDLEOUT can be set to any voltage between SPINDLE- and SPINDLE+. Polarity and voltage range must always be observed for proper operation. The voltage supplied between SPINDLE+ and SPINDLE- must be between 5VDC an 15VDC with SPINDLE + always being more positive than SPINDLE-.
Because the analog output is isolated, bipolar output is possible, for example with
SPINDLE+ connected to 5V and SPINDLE- connected to -5V, a +-5V analog output range is created. In this case the spindle output must be offset so that 50% of full scale is output when a 0V output is required. Note that if bipolar output is used, the output will be forced to SPINDLE- at startup or when SPINENA is false.
SPINDLE ISOLATED OUTPUTS
The 7I76 provides 2 isolated outputs for use for spindle direction control, and
spindle enable. These outputs are OPTO coupler Darlington transistors. They are all isolated from one another so can be used for pull up or pull-down individually. They will switch a maximum of 50 mA at 0 to 100 VDC. The SPINENA output is special as it uses the same signal that enables the analog output. When the analog output is enabled, the SPINENA OPTO output is on.
STATUS LEDS
The 7I76 has two yellow status LEDs for power monitoring, CR1 and CR2. CR1 on
the top left side of the 7I76 monitors 5V power. CR2 on the top right side of the 7I76 monitors field power. Both LEDs must be illuminated for normal operation.
Loading...
+ 40 hidden pages