Mesa 6i68 User Manual
6I68
3X2X MOTHERBOARD
MANUAL
Version 1.3
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Table of Contents
GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
HARDWARE CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
EEPROM DISABLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
CONNECTOR POWER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
BUS SWITCH MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
AUTCONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
VIOSELECT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6I68 / MODULE PIN CORRESPONDENCE
CONNECTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
CONNECTOR LOCATIONS AND DEFAULT JUMPER POSITIONS . . . . . . . . 5
I/O CONNECTOR PIN-OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
DIFFERENTIAL PAIRS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
JTAG PINOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
PCIE PINOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
LEDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
I/O LEVELS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STARTUP I/O VOLTAGE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
POWER SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
REFERENCE INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6I68 Manual 1
GENERAL
DESCRIPTION
The MESA 6I68 is a 1 lane PCIE plug-in motherboard for Mesas’ 3X2X series of
FPGA daughtercards. The 6I68 breaks out the high density daughterboard I/O connections
into six 50 pin .1" headers with standard AnythingIO pinouts. The 6I68 also provides up to
4A of 5V power for I/O connectors via an on card switching regulator. Bus switches are
provided on all 144 I/O pins to allow interfacing with 5V I/O.
6I68 Manual 2
HARDWARE CONFIGURATION
GENERAL
Hardware setup jumper positions assume that the 6I68 card is oriented in an upright
position, that is, with the PCI connector facing the user, and the white PCB markings right
side up.
DEFAULT SETUP
EEPROM ENABLED W8 UP
AUTOCONFIG ENABLED W7 UP
RIGHT AND LEFT VIO = 3.3V W4,W5,W9,W10 UP
CONNECTOR POWER = 5V (ALL) W1,W2,W3,W12,W13,W14 LEFT
BUS SWITCH MODE = 3.3V W6,W11 DOWN
These default jumper positions are shown in the default jumper position picture on
page 5.
EEPROM ENABLE
On the 3X20 module, the PCI9056 part of the PEX8311 PCIE-Local bus bridge chip
is configured at power up via a serial EEPROM. If the EEPROM is somehow misÂprogrammed or corrupted, it can be impossible to re-write the EEPROM from the PCI bus.
To avoid this problem, The EEPROM can be temporarily disabled. W8 controls the
EEPROM enable function, When W8 is in the up position (default) the EEPROM is
enabled. When W8 is in the down position, the EEPROM is disabled. To fix a broken
EEPROM setup, you must power up the 6I68 and module card with the EEPROM disabled,
Enable the EEPROM, and re-write the EEPROM.
.
6I68 Manual 3
HARDWARE CONFIGURATION
CONNECTOR POWER
The power connection on the I/O connectors pin 49 can supply either 3.3V or 5V
power. Supplied power should be limited to 400 mA per connector.
When the following jumpers are in the left position, 5V power is supplied to pin 49
of the associated connector. When the jumper is in the right position, 3.3V power is
supplied to to pin 49 of the associated connector.
W12 selects the voltage supplied to P2. (I/O connector for bits 0..23)
W13 selects the voltage supplied to P3. (I/O connector for bits 24..47)
W14 selects the voltage supplied to P4. (I/O connector for bits 48..71)
W3 selects the voltage supplied to P7. (I/O connector for bits 72..95)
W2 selects the voltage supplied to P6. (I/O connector for bits 96.119)
W1 selects the voltage supplied to P5. (I/O connector for bits 120..143)
BUS SWITCH MODE
The 6I68 uses bus switch devices in series with all I/O pins. These devices allow the
3X2X inputs to be 5V tolerant and allow the I/O pins to be pulled up to 5V. The bus switch
input protection function works by disconnecting the FPGA from the IO pins when the IO
pin voltage rises above a preset threshold. This threshold determines the bus switch
operational mode and is selectable for the three left hand I/O connectors and the three right
hand I/O connectors separately. We refer to the modes as 5V mode and 3.3V mode.
When in 5V mode, the inputs and tri-stated outputs may be pulled up to 5V. This
allows driving 5V referred loads such as I/O module racks. The disadvantage of 5V mode
is that the output impedance is higher in the high output state (when the FPGA pins are at
3.3V) as the bus switch is off when the FPGA pin is at 3.3V. When 3.3V mode is selected,
the bus switch is always fully on unless input voltages >4V are applied, at which point the
bus switch disconnects the FPGA from the I/O pin. 3.3V mode is suggested for general
use.
When the bus switch mode jumper is in the UP position, 5V mode is selected, when
DOWN, 3.3V bus switch mode is selected.
W6 Sets bus switch mode for P2,P3,P4, = IO 0..71
W11 Sets bus switch mode for P7,P6,P5 = IO 72..143
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