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PC104-DAC06
User’s Manual
Revision 4
January, 2001
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for more information about Measurement Computing trademarks. Other product and company names
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Table of Contents
1.0 INTRODUCTION
2.0 SOFTWARE INSTALLATION
3.0 HARDWARE INSTALLATION
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4.0 CONTROL & DATA REGISTERS
5.0 SPECIFICATIONS
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23.1 BASE ADDRESS
33.2 SIMULTANEOUS UPDATE JUMPER
43.3 ANALOG OUTPUT RANGE JUMPER
43.4 OUTPUT TRANSFER FUNCTIONS
53.5 CABLING
53.6 SIGNAL CONNECTIONS
63.7 CONNECTOR DIAGRAM
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1.0 INTRODUCTION
The PC104-DAC06 is a six-channel analog output board. The analog outputs are
dual-DAC AD7237s with each output buffered. The PC104-DAC06 is compatible
with the CIO-DAC16 but has only six channels. Software designed for the DAC16
and DDA-06 will operate the analog outputs correctly.
The analog outputs are controlled by writing a digital control word (two bytes) to the
DAC's control register. The control register is double buffered so the DAC's output is
not updated until both bytes (first low byte, then high byte) have been written to the
register.
The analog outputs may also be set for simultaneous update in groups of two, four or
all six. Analog outputs are grouped as 0&1, 2&3, 4&5. By selecting XFER on the
jumper below the DAC, each pair may be set for simultaneous update.
When a DAC pair is set for simultaneous update, writing new digital values to the
DAC's control register does not cause an update of the DAC's voltage output. Upd ate
of the output occurs only after a READ from the board's valid addresses (any address
base + 0 through base + 11).
In this way, the PC104-DAC06 may be set to hold new values until all channels are
loaded, then update any two, four or all six channels simultaneously. This is a very
useful feature for multi-axis motor control.
The PC104-DAC06 has six sets of gain jumpers, one base address switch and three
simultaneous update jumpers.
2.0 SOFTWARE INSTALLATION
The board has a variety of switches and jumpers to set before installing the board in
your computer. By far the simplest way to configure your board is to use the
InstaCal
you all available options, how to configure the various switches and jumpers to match
your application requirements, and will create a configuration file that your
application software (and the Universal Library) will refer to so the software you use
will automatically know the exact configuration of the board.
Please refer to the Software Installation Manual regarding the installation and
operation of InstaCal
TM
program provided as part of your software package. InstaCalTM will show
TM
. The following hard copy information is provided as a matter
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of completeness, and will allow you to set the hardware configuration of the board if
you do not have immediate access to InstaCal
TM
and/or your computer.
3.0 HARDWARE INSTALLATION
Several switch and jumper settings must be made before the PC104-DAC06 is
installed into the computer. There are six jumper blocks for setting the gain of each
channel, a simultaneous update jumper for each pair of channels and a base address
switch.
3.1 BASE ADDRESS
The switches on your base address switch are set at the factory to address 300 hex
(768 decimal) as shown in Figure 3-1. Unless there is already a board in your system
using address 300h (768 decimal), we suggest leaving the switches as they are set at
the factory..
Figure 3-1. Base Address Switches
Certain address are used by the PC, others are free and may be used by the
PC104-DAC06 and other expansion boards.
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Table 3-1. PC I/O Addresses
FUNCTIONHEX
RANGE
070-071
The PC104-DAC06 BASE switch may be set for address in the range of 000-3F0 so it
should not be hard to find a free address area for your PC104-DAC06. Once again, if
you are not using IBM prototype cards or some other board which occupies these
addresses, then 300-31Fh are free to use. Address not specifically listed, such as
390-39Fh, are free.
CMOS RAM & NMI MASK (AT)
RANGE
FUNCTIONHEX
EGA2C0-2CF8237 DMA #1000-00F
EGA2D0-2DF8259 PIC #1020-021
GPIB (AT)2E0-2E78253 TIMER040-043
SERIAL PORT2E8-2EF8255 PPI (XT)060-063
SERIAL PORT2F8-2FF8742 CONTROLLER (AT)060-064
PROTOTYPE CARD300-30F
PROTOTTYPE CARD310-31FDMA PAGE REGISTERS080-08F
HARD DISK (XT)320-32F8259 PIC #2 (AT)0A0-0A1
PARALLEL PRINTER378-37FNMI MASK (XT)0A0-0AF
SDLC380-38F8237 #2 (AT)0C0-0DF
SDLC3A0-3AF80287 NUMERIC CO-P (AT)0F0-0FF
MDA3B0-3BBHARD DISK (AT)1F0-1FF
PARALLEL PRINTER3BC-3BFGAME CONTROL200-20F
EGA3C0-3CFEXPANSION UNIT (XT)210-21F
CGA3D0-3DFBUS MOUSE238-23B
SERIAL PORT3E8-3EFALT BUS MOUSE23C-23F
FLOPPY DISK3F0-3F7PARALLEL PRINTER270-27F
SERIAL PORT3F8-3FFEGA2B0-2BF
3.2 SIMULTANEOUS UPDATE JUMPER
The analog outputs can be jumpered so that new output data is held until two, four, or
six DACs have been loaded with new digital data. Then, as a group, those that are
jumpered for simultaneous outputs will have that new data sent to the voltage outputs.
Simultaneous update occurs whenever any addresses B ASE + 0 through BASE + 11
are read.
The analog output chips are dual DACs. A single jumper sets both DACs on a single
chip to be either simultaneous TRANSFER or individual UPDATE.
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Figure 3-2 shows the jumper block in each configuration. Place the jumper on the two
pins closest to the word XFER for simultaneous transfer.
XFR XFR
Shown for individual
transfers per channel.
SIMULTANEOUS TRANSFER JUMPERS - One per pair of channels.
Shown for simultaneous transfer
of both channels.
Figure 3-2. Simultaneous Transfer Jumpers
Jumper # DAC Controlled
J1 DAC 0 & 1
J2 DAC 2 & 3
J3 DAC 4 & 5
3.3 ANALOG OUTPUT RANGE JUMPER
The analog output voltage range of each channel can be set via a six pin jumper block.
The switches are located on the board near the DACs they control and are labeled S1
through S6. The number corresponds to the DAC under control + 1.
Set the jumpers for an individual channel using Figure 3-3 to orient the jumper block
pin 1, and Table 3-2 below to select the range.
531
S#
642
Position of S# relative
to pin1 for S1-S4
6
4
2
S#
Position of S# relative
to pin 1 for S5 & S6
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3
1
JUMPERS SHOWN +/-5v RANGE
Figure 3-3. Range Jumpers
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Table 3-2. Range Select Jumpers
Jump Pins Range
2-4, 3-5 +/-10V
2-4, 5-6 +/-5V
1-2, 3-5 0 to 10V
1-2, 5-6 0 to 5V
3.4 OUTPUT TRANSFER FUNCTIONS
To program a DAC, you must select the output you desire in volts, then apply a
transfer function to that value. The transfer function for CODE = output is:
The UNIPOLAR transfer function of the DAC is:
FSV / 4096 * CODE = OutV or CODE = OutV / FSV * 4096
For Example:
If the range is 0 to 5V and you desire a 2V output:
CODE = 2/5 * 4096 = 1638
The BIPOLAR transfer function for the DAC is:
FSV/4096 * CODE − .5 * FSV or CODE = (OutV + .5 * FSV) / FSV * 4096
For example:
If the range is set to ±10 and you desire a −7V output:
CODE = (−7V + .5 * 20) / 20 * 4096=614.
3.5 CABLING
Several cabling and screw termination options are available.
C40FF-2 2 foot (and longer) ribbon cable with 40-pin connectors.
CIO-MINI40 Simple, 40-position 4"X4" screw terminal board.
C40-37F-2 2 foot ribbon cable maps 40-pin to 37-pin D connector.
CIO-MINI37 Simple, 40-position 4"X4" screw terminal board.
CIO-TERMINAL Full featured 4"X16" screw terminal board with prototype
and interface circuitry.
3.6 SIGNAL CONNECTIONS
The analog outputs are two-wire hookups; a signal, labeled D/A # OUT on the
connector diagram below, and a Low Level Ground (LLGND). The low level ground
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is an analog ground and is the ground reference which should be used for all analog
hookups.
Possible analog output ranges are:
Bipolar Ranges ±10V ±5V
and
Unipolar Ranges 0 to 10V 0 to 5V
Each of the DAC06 o utputs are individually buffered through an OP-27 operational
amplifier (OP-AMP). The OP-27s are socketted so that if one fails it can be replaced
in the field. The OP-27 for each channel is located adjacent to the calibration
potentiometers for that channel.
At the full rated output swing of ±10V, each channel is capable of sinking or sourcing
±5 mA. That means a load of 2KΩ can be connected to each channel.
If load resistance is raised from 2KΩ up to 10 MegΩ or more, the output load on the
DAC decreases. Any load resistor greater than 2KΩ is acceptable.
As the load resistance decreases, the output load increases. The OP-27 responds by
producing a lower output voltage. If your DAC06 will not produce the output voltage
specified by the code and range combination, check the load with an ohmmeter.
Under normal circumstances you will not damage the OP-27 by connecting the output
to ground. If your connection results in a failure of the OP-27, chances are there was
some potential at the connecting point in additio n to a load at ground or between 0
and 2K ohms. Explore the point with a DVM before reconnecting the DAC06 (and
after replacing the OP-27 of course). Connect the negative lead of the DVM to any
LLGND pin of the DAC06.
3.7 CONNECTOR DIAGRAM
The connector is a male, 40-pin header type connector (Figure 3-4).
The connector accepts female 40 pin connectors, such as those on the C40FF-2, a
two- foot cable with connectors or, for compatibility with the CIO-DAC series, a
BP40-37 adapter (Figure 3-5) may be used along with a C37FF-2 cable.
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If frequent changes to signal connections or signal conditioning are required, p lease
refer to the information on the CIO-TERMINAL, CIO-SPADE50, CIO-MINI40 and
CIO-MINI37 (if using a BP40-37 adapter) screw terminal boards.
-12VDC
+12VDC
–12VDC 19
GND 18
+12VDC 17
NC 16
NC 15
NC 14
NC 13
NC 12
NC 11
NC 10
NC 9
NC 8
NC 7
VOUT 5
VOUT 4
5
4
3
VOUT 3 4
VOUT 2
VOUT 1
VOUT 0 1
6
5
3
2
37 GND
36 +5VDC
35 LLGND
34 LLGND
33 LLGND
32 LLGND
31 LLGND
30 LLGND
29 LLGND
28 LLGND
27 LLGND
26 LLGND
25 LLGND
24 LLGND
23 LLGND
22 LLGND
21 LLGND
20 LLGND
2
1
0
Figure 3-4. Board Connector Figure 3-5 Cable BP40-37 Pin-Out
4.0 CONTROL & DATA REGISTERS
All control and data is read/written with simple I/O read and write signals. No
interrupt or DMA control software is required. Hence, the board's functions are easy
to control directly from BASIC, C or PASCAL.
The PC104-DAC06 has 12 analog output registers. There are two for each channel,
one for the lower eight bits and one for the upper four bits.
The first address, or BASE ADDRESS, is determined by setting a bank of switches on
the board.
A register is easy to read and write to. The register descriptions all follow the format:
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01234567
A0A1A2A3A4A5A6A7
Where the numbers along the top row are the bit positions within the 8-bit byte and
the numbers and symbols in the bottom row are the functions associated with that bit.
To write to or read from a register in decimal or HEX, the bit weights in table 2-1
apply:
Table 2-1. Bit Weights
HEX VALUEDECIMAL VALUEBIT POSITION
110
221
442
883
10164
20325
40646
801287
To write a control word or data to a register, the individual bits must be set to 0 or 1
then combined to form a byte.
The method of programming required to set/read bits from bytes is beyond the scope
of this manual.
In summary form, the registers and their function are listed in Table 2-2. Each
register has eight bits which constitute a byte of data or eight individual bit functions.
Each DAC has two 8-bit registers which are used to control it. The first register
contains the least-significant eight bits of D/A code. Write to it first.
01234567
D11D10D9D8D7D6D5
The second register contains the most significant four bits of D/A code. Write to it
last. A write to this register will update the output of the D/A with all 12 bits of the
D/A code contained in the two registers. If the XFER jumper is set for the DAC, no
update will occur until a read of any one of the DAC registers is executed. Upon a
read, all DACs set for simultaneous transfer (XFER jumper set) will update together.
XXXX
MSB
8
D12
LSB
01234567
D4D3D2D1
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The DAC06 contains 12 registers. Two registers control one D/A output. These
register functions are identical to the CIO-DAC series registers except that there are
only 12 of them.
Table 2-2. Board Registers
READ FUNCTIONWRITE FUNCTIONADDRESS
Initiate simultaneous upD/A 0 Least Significant ByteBASE + 0
Initiate simultaneous upD/A 0 Most Significant NibbleBASE + 1
Initiate simultaneous upD/A 1 Least Significant ByteBASE + 2
Initiate simultaneous upD/A 1 Most Significant NibbleBASE + 3
Initiate simultaneous upD/A 2 Least Significant ByteBASE + 4
Initiate simultaneous upD/A 2 Most Significant NibbleBASE + 5
Initiate simultaneous upD/A 3 Least Significant ByteBASE + 6
Initiate simultaneous upD/A 3 Most Significant NibbleBASE + 7
Initiate simultaneous upD/A 4 Least Significant ByteBASE + 8
Initiate simultaneous upD/A 4 Most Significant NibbleBASE + 9
Initiate simultaneous upD/A 5 Least Significant ByteBASE + 10
Initiate simultaneous upD/A 5 Most Significant NibbleBASE + 11
NoneNoneBASE + 12 to 15
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5.0 SPECIFICATIONS
Power consumption
Icc: +5V quiescent 130 mA typical, 180 mA max
Icc: +12V quiescent 50 mA typical, 75 mA max
Icc: −12V quiescent 30 mA typical, 45 mA max
Analog Output section
D/A converter type AD7237
Resolution 12 bits
Number of channels 6
Ranges ±10V, ±5V, 0 to 10V, 0 to 5V each channel
individually jumper selectable
D/A pacing Software
Data transfer Software polled
Throughput 125 kHz typical (PC-dependent)
Offset error Adjustable to zero
Gain error Adjustable to zero
Integral non-linearity ±0.5 LSB
Differential non-linearity ±0.5 LSB
Monotonicity Guaranteed over temperature range
Gain drift 160 ppm/°C
Zero drift 150 ppm/°C
Current Drive ±5 mA min
Short circuit current ±40 mA
Output resistance 0.1ohms
Slew rate 1.7V/µs
Miscellaneous Double buffered input latches
Update DACs individually or simultaneously
(jumper selectable by DAC pairs)
DAC output state on power-up and reset
undefined
Environmental
Operating temperature range 0 to 70°C
Storage temperature range −40 to 100°C
Humidity 0 to 90% non-condensing
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EC Declaration of Conformity
Measurement Computing Corporation
We,
product:
PC104-DAC06
DescriptionPart Number
to which this declaration relates, meets the essential requirements, is in conformity
with, and CE marking has been applied according to the relevant EC Directives listed
below using the relevant section of the following EC standards and other normative
documents:
, declare under sole responsibility that the
EU EMC Directive 89/336/EEC
compatibility.
EU 55022 Class B
characteristics of information technology equipment.
EN 50082-1
IEC 801-2
and control equipment.
IEC 801-3
measurements and control equipment.
IEC 801-4
equipment.
Carl Haapaoja, Director of Quality Assurance
: Electrostatic discharge requirements for industrial process measurement
: Radiated electromagnetic field requirements for industrial process
: Electrically fast transients for industrial process measurement and control
: Limits and methods of measurements of radio interference
: EC generic immunity requirements.
: Essential requirements relating to electromagnetic
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(508) 946-5100
Fax: (508) 946-9500
info@mccdaq.com
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