Measurement Digital488 User Manual

Digital488
INSTRUCTION MANUAL
IEEE 488 to Digital Interface
IOtech, Inc. • 25971 Cannon Road • Cleveland, Ohio 44146 • (440) 439-4091

Warranty Information

Your IOtech warranty is as stated on the product warranty card. You may contact IOtech by phone, fax machine, or e-mail in regard to warranty-related issues. Phone: (440) 439-4091, fax: (440) 439-4093, e-mail: sales@iotech.com
IOtech, Inc. cannot be held liable for any damages resulting from the use or misuse of this product.
Copyright, Trademark, and Licensing Notice
All IOtech documentation, software, and hardware are copyright with all rights reserved. No part of this product may be copied, reproduced or transmitted by any mechanical, photographic, electronic, or other method without IOtech’s prior written consent. IOtech product names are trademarked; other product names, as applicable, are trademarks of their respective holders. All supplied IOtech software (including miscellaneous support files, drivers, and sample programs) may only be used on one installation. You may make archival backup copies.
FCC Statement
IOtech devices emit radio frequency energy in levels compliant with Federal Communications Commission rules (Part 15) for Class A devices. If necessary, refer to the FCC booklet How To Identify and Resolve Radio-TV Interference Problems (stock # 004-000-00345-4) which is available from the U.S. Government Printing Office, Washington, D.C. 20402.
CE Notice
Many IOtech products carry the CE marker indicating they comply with the safety and emissions standards of the European Community. As applicable, we ship these products with a Declaration of Conformity stating which specifications and operating conditions apply.

Warnings, Cautions, Notes, and Tips

Refer all service to qualified personnel. This caution symbol warns of possible personal injury or equipment damage under noted conditions. Follow all safety standards of professional practice and the recommendations in this manual. Using this equipment i n ways other than described in t his manual can present serious safety hazards or cause equipment damage.
This ESD caution symbol urges proper handling of equipment or components sensitive to damage from electrostatic discharge. Proper handling guidelines include the use of grounded anti-static mats and wrist straps, ESD-protective bags and cartons, and related procedures.
Specifications and Calibration
Specifications are subject to change without notice. Significant changes will be addressed in an addendum or revision to the manual. As applicable, IOtech calibrates its hardware to published specifications. Periodic hardware calibration is not covered under the warranty and must be performed by qualified personnel as specified in this manual. Improper calibration procedures may void the warranty.
Quality Notice
IOtech has maintained ISO 9001 certification since 1996. Prior to shipment, we thoroughly test our products and review our documentation to assure the highest quality in all aspects. In a spirit of continuous improvement, IOtech welcomes your suggestions.
Digital488
and
Digital488OEM
Instruction Manual
110-0920
Revision 4.2
November 1990
IOtech, Inc
.
25971 Cannon Road ● Cleveland, Ohio 44146 ● (440) 439-4 091

Table of Contents

Section1 Introduction Page
1.1 General Description 1.1
1.2 Available Accessories1.2
1.3 Specifications 1.3
1.4 Abbreviations 1.5
Section 2 Getting Started Page
2.1 Inspection 2.1
2.2 Configuration 2.1
2.2.1 IEEE Address Selection 2.2
2.2.2 IEEE Bus Output Terminator Selection 2.3
2.3 Digital Input/Output Ports 2.4
2.3.1 Logic Levels 2.4
2.3.2 Digital I/O Port Pin Outs 2.4
2.3.3 Control Lines 2.6
2.3.3.1 Clear 2.6
2.3.3.2 Data Strobe 2.7
2.3.3.3 External Data Ready 2.7
2.3.3.4 Inhibit 2.8
2.3.3.5 Trigger 2.9
2.3.3.6 Service 2.9
2.4 IEEE 488 Bus Implementation 2.9
2.4.1 My Talk Address (MTA) 2.10
2.4.2 My Listen Address (MLA) 2.11
2.4.3 Device Clear (DCL and SDC) 2.11
2.4.4 Group Execute Trigger (GET) 2.11
2.4.5 Interface Clear (IFC) 2.12
2.4.6 Serial Poll Enable (SPE) 2.12
2.4.7 Serial Poll Disable (SPD) 2.12
2.4.8 Unlisten (UNL) 2.12
2.4.9 Untalk (UNT) 2.12
2.5 Installation 2.13
Section 3 Command Descriptions Page
Introduction Bit Set (An) 3.2 Bit Clear (Bn) 3.3 Bus Input/Output (Gn) 3.4
3.1
Table of Contents
Section 3 Command Descriptions Page
Section 4 IEEE 488 Primer Page
4.1 History 4.1
4.2 General St ructure 4.1
4.3 Send It To My Address 4.4
4.4 Bus Management Lines 4.4
4.4.1 Attention (ATN) 4.4
4.4.2 Interface Clear (IFC) 4.5
4.4.3 Remote Enable (REN) 4.5
4.4.4 End Or Identify (EOI) 4.5
4.4.5 Service Request (SRQ) 4.5
4.5 Handshake Lines 4.6
4.5.1 Data Valid (DAV) 4.6
4.5.2 Not Ready For Data (NRFD) 4.6
4.5.3 Not Data Accepted (NDAC) 4.6
4.6 Data Li nes 4.7
4.7 Multiline Commands 4.7
4.7.1 Go To Local (GTL) 4.7
4.7.2 Listen Address Group (LAG) 4.8
4.7.3 Unlisten (UNL) 4.8
4.7.4 Talk Address Group (TAG) 4.8
4.7.5 Untalk (UNT) 4.8
Configure (Cn) 3.5 Data (D...Z) 3.6 Data Ready (Rn) 3.8 End or Identify (Kn) 3.9 Execute (X) 3.10 Format (Fn) 3.11 Handshake (Hn) 3.18 Inhibit (Qn) 3.19 Invert (In) 3.20 Port (Pn) 3.21 Service Request Mask (Mn) 3.22 Serial Poll Status Byte 3.24 Status (Un) 3.26 Terminator (Yn) 3.29 Test (T0) 3.30
Table of Contents
Section 4 IEEE 488 Primer Page
4.7.6 Local Lockout (LLO) 4.8
4.7.7 Device Clear (DCL) 4.8
4.7.8 Selected Dev i ce Cl ear (SDC) 4.9
4.7.9 Serial Poll Disable (SPD) 4.9
4.7.10 Serial Poll Enable (SPE) 4.9
4.7.11 Group Execute Trigger (GET) 4.9
4.7.12 Take Control (TCT) 4.9
4.7.13 Secondary Command Group (SCG) 4.9
4.7.14 Parallel Poll Configure (PPC) 4.10
4.7.15 Parallel Poll Unconfigure (PPU) 4.10
4.8 More On Service Requests 4.10
4.8.1 Serial Poll 4.11
4.8.2 Parallel Poll 4.11
Section 5 Serv i ce Information Page
5.1 Factory Service 5.1
5.2 Theory of Operation 5.1
5.3 Digital488 Mother Board Component Layout 5.3
5.4 Digital488 I/O Board Component Layout 5.4
5.5 Digital488OEM Component Layout 5.5
5.6 Digital488 Parts List 5.6
5.7 Digital488OEM Parts List 5.8
Appendix A Digital488 Command Summary
Appendix B IEEE Command and Address Messages
Appendix C Digital488OEM Mechanical Dimensions
Section 1 Introduction
Introduction

1.1 General Description Digital488

The Each unit has 40 TTL level digital I/O lines, which are divided into 5 eight-bit ports. Each port is software programmable as input or output. The board level interface with the same capabilities as the this manual refer to both products unless otherwise stated. When the model number
Digital488
capability. A trigger output signal is asserted on the Group Execute Trigger (GET) command. Edge-triggered inputs can generate a Service Request on the bus. Six data formats are software programmable, including ASCII hexadecimal, ASCII character, ASCII binary, binary, high speed binary and ASCII decimal. There are also individual bit set and bit clear commands. Programmable terminators are provided to facilitate interfacing to various controllers.
the proper RAM and ROM operation.
is used in this manual,
Digital488
The
A status mode enables the controller to interrogate the programmed status of
Digital488
at any time. A self-test is initiated at power-on which checks for
is a digital input and output interface to the IEEE 488 bus.
Digital488OEM
Digital488
Digital488OEM
has several features which give it versatile interface
is also implied.
. All descriptions in
is a
When addressed to talk, the a selected 8 bit port. When addressed to listen, the unit will input data and programming information from the controller, and output the data to the appropriate I/O port.
Digital 488
will output data from all forty bits or
1.1
Section 1 Introduction

1.2 Available Accessories

Additional accessories that can be ordered for the
CA-7-1 CA-7-2 CA-7-3 CA-7-4 CA-8-50
6 foot, 50 conductor ribbon cable with a card edge
1.5 foot IEEE 488 Cable 6 foot IEEE 488 Cable 6 foot shielded IEEE 488 Cable 6 foot reverse entry IEEE 488 Cable
Digital488
include:
connector on one end, the other end un-terminated.
CN-6-50 CN-20 CN-22
50 Pin solder tab edge connector.
Right Angle IEEE 488 adapter, male and female IEEE 488 Multi-tap bus strip, four female connectors in parallel
CN-23
IEEE 488 panel mount feed-through connector, male and female
110-0920 Rack488-3 Rack488-4 TR-2 TR-2E
5-1/4" by 19" rack mount for one † 5-1/4" by 19" rack mount for two
110 volt Wall mount power supply for the
220 volt Wall mount power supply for the
TR-5 TR-5E
For use with Digital488 Only
Additional Instruction Manual
Digital488 Digital488
110 volt Wall mount power supply for the 220 volt Wall mount power supply for the
Digital488 Digital488 Digital488OEM Digital488OEM
s
1.2
Section 1 Introduction

1.3 Specifications

Digital488 Specifications Digital I/O
Terminal Installation Category:
Standard: Not Applicable. CE: Category 1.
Transistor-Transistor Logic (TTL) Levels:
Outputs will drive 2 TTL loads.
Connector:
One 50-pin card edge (mating connector supplied).
IEEE 488
&$87,21
The IEEE 488 terminal must only be used to control a non-isolated IEEE 488 system. The common mode voltage (cable shell to earth) must be zero.
Terminal Installation Category:
Standard: Not Applicable. CE: Category 1.
Implementation:
SH1, AH1, T6, TE0, L4, LE0, SR1, RL0, PP0, DC1, DT1, C0, E1.
Terminators:
Selectable CR, LF, LF-CR, and CR-LF with EOI.
Programmable:
IEEE Terminators, EOI, SRQ Mask, Port Data, Active Levels, Handshake Lines, Format and Configuration.
Connector:
Standard IEEE 488 connector with metric studs.
General
Configuration:
Five 8-bit ports, programmable as inputs or outputs. Also included are programmable handshake lines, data latching capability, Clear and Trigger outputs, and a Service Request (SRQ) input.
1.3a
Section 1 Introduction
Terminal Installation Category:
Standard:
Dimensions:
188 mm deep x 140 mm wide x 68 mm high (7.39" x 5.5" x 2.68").
Weight: Operating Environment:
Standard: CE:
RH/°C to 40°C.
Controls:
Power switch (external), and IEEE parameter switches (internal).
Indicators:
LED indicators for IEEE TALK, LISTEN, SRQ, ERROR, and POWER.
Power:
An external power supply is provided with the Digital488: Input is 105-125 VAC, or 210-250 VAC; 50/60 Hz, 10 VA maximum. The external power supply 9 VDC output is to be connected to the Digital488 power input marked: 10 VDC MAX @ 500 mA.
Not Applicable.
1.55 kg. (3.6 lbs).
Indoor, 0° to 50°C; 0 to 70% RH to 35°C. Linearly derate 3% RH/°C from 35 to 50 °C.
Indoor use at altitudes below 2000 meters, 0° to 40°C; 80% maximum RH up to 31°C decreasing linearly 4%
CE:
Category 1 for all terminals.
:$51,1*
Do not use this interface outdoors! The interface is intended for indoor use only! Outdoor conditions could result in equipment failure, bodily injury, or death!
&$87,21
Do not connect AC power line directly to the Digital488. Direct AC connection will damage equipment.
1.3b
Section 1 Introduction
Digital488/OEM Specifications
:$51,1*
Do not use this interface outdoors! The interface is intended for indoor use only! Outdoor conditions could result in equipment failure, bodily injury, or death!
&$87,21
Never disassemble the interface case while it is connected to the AC power line! Internal voltage potentia ls exist which could cause bodily injury or death!
Digital I/O
Transistor-Transistor Logic (TTL) Levels:
Outputs will drive 2 TTL loads.
Connector:
One 50-pin IDC, organized as two rows of 25 pins.
IEEE 488
Implementation:
SH1, AH1, T6, TE0, L4, LE0, SR1, RL0, PP0, DC1, DT1, C0, E1.
Terminators:
Selectable CR, LF, LF-CR, and CR-LF with EOI.
Programmable:
IEEE Terminators, EOI, SRQ Mask, Port Data, Active Levels, Handshake Lines, Format and Configuration.
Connector:
Standard IEEE 488 connector with metric studs.
1.3c
Section 1 Introduction
General
Configuration:
Five 8-bit ports, programmable as inputs or outputs. Also included are programmable handshake lines, data latching capability, Clear and Trigger outputs, and a Service Request (SRQ) input.
Dimensions:
205 mm deep x 115 mm wide x 28 mm high (8" x 4.5" x 1.1").
Weight: Operating Environment:
Controls:
Indicators:
Power:
0.23 kg. (0.5 lbs).
Standard:
IEEE parameter switches.
LED indicators for IEEE TALK, LISTEN, SRQ, ERROR, and POWER.
User suupplied +5 volts ±0.25% at 1 amp. Mating power connector with 8 inch leads provided.
Indoor, 0° to 50°C; 0 to 70% RH to 35°C. Linearly derate 3% RH/°C from 35 to 50 °C.
:$51,1*
Do not use this interface outdoors! The interface is intended for indoor use only! Outdoor conditions could result in equipment failure, bodily injury, or death!
&$87,21
Never disassemble the interface case while it is connected to the AC power line! Internal voltage potentia ls exist which could cause bodily injury or death!
1.3d
Section 1 Introduction

1.4 Abbreviations

The following IEEE 488 abbreviations are used throughout this manual.
addr n IEEE bus address "n"
ATN Attention line
CA Controller Active
CR Car riage Return
data Data String
DCL Device Clear
GET Group Execute Trigger
GTL Go To Local
LA Listener Active
LAG Listen Address Group
LF Line Feed
LLO Local Lock Out
MLA My Listen Address
MTA My Talk Address
PPC Parallel Poll Configure
PPU Parallel Poll Unconfigure
SC System Controller
SDC Selected Device Clear
SPD Serial Poll Disable
SPE Serial Poll E nable
SRQ Service Request
TA Talker Active
TAD Talker Address
TCT Take Control
term Terminator
UNL Unlisten
UNT Untalk
* Unasserted
1.5
Section 2 Getting Started
Getting Started

2.1 Inspection Digital488

The prior to shipment. When you receive the interface, carefully unpack all items from the shipping carton and check for any obvious signs of physical damage which may have occurred during shipment. Report any such damage found to the shipping agent immediately. Remember to retain all shipping mater ials in the event that shipment back to the factory becomes necessary.
Digital488
Every
was carefully inspected, both mechanically and electrically,
is shipped with the following....
Digital488
Digital488OEM
CN-8-50
110-0920
Power Supply
Supplied with Digital488 Only and not the Digital488OEM
Digital I/O Port Mating Connector
TR-2; 115V or
IEEE Digital I/O Converter or Board Level IEEE Digital I/O Converter
Instruction Manual
TR-2E; 220V

2.2 Configuration

Digital488
The
has one internal 8 position switch wh ich determ ines the unit's IEEE address and its default IEEE bus output terminator. The switch is only read when the unit is powered on, and should only be set prior to applying power. The following figure illustrates the f actory default setting for
SW1.
SW1 Factory Default Settings
12345678
0 1
IEEE Address = 18
Terminator = CR-LF
EOI Enabled
OPEN
Switch
Side View
DOT
2.1
Section 2 Getting Started
To modify any of these defaults, follow this simple procedure. Disconnect the power supply from the AC line and from the interface. Disconnect any IEEE or digital I/O cables prior to disassembly.
WARNING Never open the Digital488 case while it is connected to the AC line. Failure to observe the warning may result in equipment failure, personal injury or death.
Remove the four screws located in each corner of the rear panel. Hold the case firmly and pull the rear panel outward, noting the slot location of the main circuit board. Modify those parameters which are appropriate for your installation and reassemble the unit. Slide the main circuit board into the previously noted slot and finish reassembly by tightening the four scr e ws into the rear panel.

2.2.1 IEEE 488 Address Selection

The IEEE 488 bus address is set by
SW1-1
address can be set from 0 through 30 and is read
address is selected by simple binary weighting with
significant bit and
SW1-5
the most significant bit. The factory default is
through
only
SW1-1
SW1-5.
The
at power on. The
being the least
address 18. If address 31 is selected, it defaults to address 30 because the
IEEE 488 standard has reserved address 31.
SW1 View for IEEE Bus Address Selection
12345678
0 1
OPEN
IEEE Address = 18
1 x 16 0 x 8 0 x 4 1 x 2 0 x 1
+
Switch
= 16
= 0 = 0 = 2 = 0
DOT
Side View
2.2
Section 2 Getting Started
2.2.2 IEEE 488 Bus Output Terminator Selection
The terminating characters sent on output by the
determined by
SW1-6
through
SW1-8.
The terminator switches are read
Digital488
are
only at power on, but can be changed by the controller through the
Terminator
command. If power is cycled after receipt of the
Terminator
command, then the unit will once again default to the switch settings. The
factory default settings are Carriage Return - Line Feed with EOI asserted.
Digital488
The
controller. Only the
ignores all terminators received from the bus
Execute
command
(X)
is used to signal the
Digital488
that a command string has been completed.
SW1 View for Terminator Selection
12345678
0 1
OPEN
12345678
0 1
OPEN
Switch
Side View
CR-LF LF-CR
12345678
0 1
OPEN
12345678
0 1
OPEN
CR Only LF Only
12345678
0
12345678
0
DOT
1
OPEN
1
EOI Enabled EOI Disabled
2.3
OPEN
Section 2 Getting Started

2.3 Digital Input/Output Ports

Digital488
The
has 40 data lines which can be programmed in groups of 8 as either input or output. At power on, all 40 bits are in the input mode. Each 8 bit group is one port, beginning with
Port 1
as the least significant 8 bits, and
Port 5
as the most
significant 8 bits.

2.3.1 Logic Levels

The data and handshake output lines will drive two TTL loads. In addition, ports 1 and 2 outputs are 5 Volt CMOS compatible. All input lines are less than 1.5 TTL loads. All inputs are protected against damage due to high static voltages. Normal precautions should be taken to limit the input voltages to -0.3 to +7.0 volts. All I/O lines are referenced to
COMMON
(Pin 50).

2.3.2 Digital I/O Port Pin Outs

The following diagram illustrates the digital I/O edge connector as view
.
Digital488
and the top PC Board edge view of the
from the rear of the
Digital488OEM
Digital I/O
Bits 1 thru 40
Digital488 Rear Panel I/O Connector Pin Out
External Data Ready (I)
210 20 30 40 50
(I)
= Input
(O)
= Output
Inhibit (O)
Data Strobe (O)
Clear (O)
Trigger (O)
Service (I)
2.4
Not Used Common (GND)
4939199129
+5 Volts [ 50 mA Max!] Not Used
Section 2 Getting Started
Digital488OEM I/O Connector Pin Out
External Data Ready (I)
210 20 30 40 50
Digital I/O
Bits 1 thru 40
PC Board Edge
(I)
= Input
(O)
= Output
Pin Description
1 thru 8
DATA PORT1
Pin 1 is bit 1 (LSB), Pin 8 is bit 8 (MSB). Least Significant Port
9 thru 16
DATA PORT2
Pin 9 is bit 1 (LSB), Pin 16 is bit 8 (MSB).
17 thru 24
DATA PORT3
Pin 17 is bit 1 (LSB), Pin 24 is bit 8 (MSB).
25 thru 32
DATA PORT4
Pin 25 is bit 1 (LSB), Pin 32 is bit 8 (MSB).
Inhibit (O)
Data Strobe (O)
Clear (O)
Trigger (O)
Service (I)
(Input or Output).
(Input or Output).
(Input or Output).
(Input or Output).
Not Used Common (GND)
4939199129
+5 Volts [ 50 mA Max!] Not Used
33 thru 40
41
42
43
44
DATA PORT5
(Input or Output). Pin 33 is bit 1 (LSB), Pin 40 is bit 8 (MSB). Most Significant Port
CLEAR DATA STROBE TRIGGER INHIBIT
(Output).
(Output).
(Output).
(Output).
2.5
Section 2 Getting Started
45
46
SERVICE INPUT
(Input).
EXTERNAL DATA READY [EDR]
47,48 Not used.
49
50
+5 Volts I/O COMMON (Gnd).
Do not exceed 50 mA load
(

2.3.3 Control Lines

Five control lines enable handshaking of digital I/O data transfer to the
Digital488
. They are automatically activated with the corresponding I/O activity and can also be independently activated with the command.
2.3.3.1 Clear
The
(Pin 41)
Clear
output is pulse for approximately 50 microseconds after a Device Clear (DCL), Selected Device Clear (SDC), or Interface Clear (IFC) command has been sent on the bus.
Clear
The
line is normally active high. The will program it active low. The pulse the
Clear
line, independent of any I/O operations.
Handshake
Invert
command
(Input).
).
Handshake
command (I8)
(H0)
can
(Hn)
Timing Diagram for Clear Output
DCL, SDC or IFC
Clear
65 µS typ 50 µS typ
2.6
Section 2 Getting Started
2.3.3.2 Data Strobe
Data Strobe
The
microseconds after new data is output on the I/O port. The
Strobe
low by the can pulse the
line is normally active high but may be programmed active
Invert
Data Strobe
(Pin 42)
output is pulse for approximately 50
command (I4). The
line, independent of an I/O operations.
Handshake
command
Data
(H1)
Timing Diagram for Strobe Output
DATA
15 µS min
DATA VALID
50 µS typ†
STROBE
† 15 µS typ in F5 Format
2.3.3.3 External Data Ready [EDR]
External Data Ready [EDR
The
(Pin 46)
] line is an edge sensitive
input which is used to latch input data. It is used in conjunction with
Data Ready
the
command (R1). The
EDR
signal must be at least 1 microsecond wide and must have a rise and fall time of less than one microsecond. The be programmed with the
EDR
line is normally rising-edge sensitive but can
Invert
command (
I32
) to be falling-edge
sensitive. Refer to the following diagram for timing r e lationships.
When using the
read when the
Digital488
will only output data when the
EDR
is not functional in the high speed binary (F5) format.
EDR
Digital488
line with the R1 command, data is not
is addressed to talk as with R0. The
EDR
line transitions.
2.7
Section 2 Getting Started
2.3.3.4 Inhibit
The
(Pin 44)
Inhibit
output is asserted while data on the selected I/O port is being read into the I/O port buffer. This line is normally active high but may be programmed active low by the
Inhibit
The operations with the
line can be programmed independent of any I/O
Inhibit
command (Qn). Refer to the following
Invert
command (I1).
diagram for timing relationships.
Inhibit
The
line is asserted once for each data read operation for all format [Fn] modes except high speed binary [F5]. In this mode, it is asserted for the first data read after the talk. On the last data byte transfer, the data is read again with asserted in anticipation of another data transfer. If
Digital488
Inhibit
is addressed to
Inhibit
is used to sequence external hardware, you should be aware that this line will pulse N+1 times; where N is the number of total (5 byte) data transfers.
Timing Diagram for EDR Input and Inhibit Output
50 µS typ
INHIBIT
DATA
DATA VALID
1 µS min
EDR
10 µS min
50 µS max
50 µS typ
2.8
Section 2 Getting Started
2.3.3.5 Trigger
The
microseconds after a
(Pin 43)
Trigger
output is pulse for approximately 50
GET
(Group Execute Trigger) command is received from the bus controller. The trigger pulse is normally active high, but can be made active low with the
Handshake
command (H2) can independently pulse the
Invert
command (I2). The
Trigger
line,
independent of any bus activity.
Timing Diagram for Trigger Output
GET
Trigger
75 µS typ 50 µS typ
2.3.3.6 Service
The generating a bus command (M1) and defaults to rising-edge sensitive. The command (
(Pin 45)
Service
I64
) can be used to program it to be falling-edge sensitive.
input is an edge sensitive input capable of
Service Request (SRQ).
It is enabled with the
SRQ
Invert

2.4 IEEE 488 Bus Implementation

Digital488
The
implements many of the capabilities defined by the IEEE 488
1978 specification. These are discussed in the following sections. Those bus uniline and multiline commands that the
Remote Enable Go to Local Local Lockout Take Control
(REN)
(GTL)
(LLO)
(TCT)
Digital488
does not support or respond to include:
Parallel Poll Parallel Poll Configure Parallel Poll Unconfigure Parallel Poll Disable
(PP)
(PPC)
(PPU)
(PPD)
2.9
Section 2 Getting Started

2.4.1 My Talk Address

When the
the data from all ports, un-asserts the format as defined by the Fn, Pn and terminators are appended to the output with the exception of the F4 and formats. F4 does not append terminators. The output format of F5 will be described separately. After output in the F0 through F4 formats, the
Digital488
In the R1 mode, it will wait for the selected
reading the data and formatting it for output. If the prior to being addressed to talk, the data read at the time of buffered for output when next addressed to talk. If before the previous generate an output in the F0 through F4 formats, the talk to perform subsequent buffered output of
In either Rn mode, the
without affecting the data ports or output, the presently programmed Rn mode returns.
EDR
(F5). When addressed to talk in this format it asserts from all ports, un-asserts EOI asserted on the fifth byte. When the last data byte is trans ferred, the d ata is read again in anticipation of another data transfer. If sequence external hardware, this line will pulse N+1 times; where N is the number of total (5 byte) data transfers. In this format t he have to be re-addressed to talk to read the ports multiple times.
Digital488
must be re-addressed to talk to perform subsequent reads.
EDR Overrun
cannot be used to capture data in the high speed binary format
(MTA)
is addressed to talk (R0) it asserts
Inhibit
buffered data has been output, the
EDR
error and ignore the
Digital488
and outputs the binary data to the bus with
Inhibit
and outputs the data to the bus in
commands. The output bus
Gn
Digital488
EDR
can send requested status (Un)
. After the requested status is
Inhibit
, reads
Inhibit
transition before
EDR
line has transitioned
EDR
will be
EDR
transitions again
EDR
Digital488
read request. After
EDR
must be re-addressed to
captured data.
, reads the data
Inhibit
is used to
Inhibit
Digital488
does not
F5
will
With all Fn formats, the data is output in a PORT5, PORT4, PORT3, PORT2, PORT1 sequence.
2.10
Section 2 Getting Started

2.4.2 My Listen Address

When the
format, it accepts characters from the active talker and interprets these characters as commands and command parameters. These commands are explained in Section 3.
In the high speed binary format (F5), the command interpreter is
disabled. The Digital I/O ports. Each time it receives five bytes or detects EOI it pulses the
Data Strobe
PORT5, PORT4, PORT3, PORT2, PORT1 sequence.
If only two bytes are received, with EOI asserted on the second byte,
Digital488
the the second and pulse the characters as data, the

2.4.3 Device Clear

In the F0 thru
power on defaults and pulses the microseconds.
In the high speed binary format (F5), it enables the command
interpreter and changes the format to F0. All other parameters remain unchanged. In addition, the when the interface is in F5. This is the only programmable method to exit the
F5
format.
Digital488
Digital488
for approximately 15 microseconds. Data is expected in a
will update PORT5 with the first byte received, PORT4 with
(MLA)
is addressed to listen in the F0 through
treats all bytes received as data to be output to the
Data Strobe
Status (Un
(DCL and SDC)
F4
formats, Device Clear resets the
Clear
. Since the interface treats all received
) command will not be recognized.
Digital488
Clear
output line for approximately 50
output line is not pulsed by DCL or SDC
F4
to

2.4.4 Group Execute Trigger

When the
line for approximately 50 microseconds.
Digital488
(GET)
recognizes a GET, it pulses the
2.11
Trigger
output
Section 2 Getting Started

2.4.5 Interface Clear

IFC places the
Clear
the

2.4.6 Serial Poll Enable

serial poll with its serial poll status byte if addressed to talk. When the serial poll byte is accepted by the controller, any pending
Digital488
serial poll disabled by the controller.

2.4.7 Serial Poll Disable

controller.

2.4.8 Unlisten

2.4.9 Untalk

output line for approximately 50 microseconds.
When Serial Poll Enabled, the
will continue to try to output its serial poll response until it is
Disables the
UNL places the
(UNT)
(UNL)
(IFC)
Digital488
(SPE)
(SPD)
Digital488
Digital488
in the Talker/Listener Idle State and pulses
Digital488
from responding to serial polls by the
in the Listener Idle State.
sets itself to respond to a
SRQ
s are cleared. The
UNT places the
Digital488
in the Talker Idle State.
2.12
Section 2 Getting Started

2.5 Installation

To begin operating the
jack on the interface.
Never install the power supply into the interface while it is connected to AC line power. Failure to observe this caution may result in damage to the Digital488.
The power supply provided with the interface is intended for INDOOR USE ONLY. Failure to observe this warning could result in equipment failure, personal injury or death.
After installing the power supply connector into the interface, turn on the
Digital488
light for approximately one second while the and RAM self check. At the end of this self check all indicators should turn off except
POWER
LEDs remain on, then a ROM error has occurred. If all LEDs continue to flash (except the power LED), then a RAM error has occurred. Try cycling the power to the
Digital488
by depressing the rear panel power switch. All the front panel LEDs should
.
If you obtain the above response then your
to determine that the error is repeatable.
Digital488,
plug the external power supply into the rear
CAUTION
WARNING
Digital488
Digital488
performs an internal ROM
is alive and well. If all
If the LEDs do not flash and the may not be any power supplied to the interface. In this event, check to make sure the AC power is supplied to the power supply, and that the supply is properly installed into the unit. If the problem is unresolved, refer to the manual.
POWER
indicator does not remain lit, there
Service Information
2.13
section of this
Section 3 Command Descriptions
Command Descriptions
Control of the Digital 488 is implemented with 17 bus commands, described here
in detail. Examples are given for many of the commands using a Hewlett-Packard 85 computer in the immediate mode. It is implied that each command is terminated by the 'END LINE' key on the HP-85 in order to execute the command. The Digital488 bus address should be set to 18 for all examples.
Attention!
It is necessary that the EXECUTE command (X) follow all command strings sent to the Digital488. No commands are executed until an X is received by the Digital488.
3.1
Section 3 Command Descriptions
Bit Set An
Bit Set
The argument 'n'. Setting a bit may represent either a +5 volt or 0 volt output, depending on whether an then string, an
Configure
command is sent.
Example:
Invert
Bit Set
Execute
The bit which is being set must have been configured as an output bit by the
command to be valid. The
An
Bit n (1 thru 40) is set to logic one
command programs a logic one output to a bit described by the
command (
outputs +5 volts. If multiple bits are to be set within the same command
command (X) must be included after every
I16)
has been sent. If data is active high (default condition),
Strobe
Bit Set
output line is not pulsed when the
command.
Bit Set
CLEAR 718 OUTPUT 718;"C5X" OUTPUT 718;"A22X" OUTPUT 718;"A23XA24X"
reset the configure all ports as output set bit 22 to a logic one set bits 23 and 24 to a logic one
Digital488
3.2
Section 3 Command Descriptions
Bit Clear Bn
Bit Clear
The argument 'n'. Clearing a bit may represent either a 0 volt or +5 volt output, depending on whether an condition), then used in the same command string, an command.
The bit which is being cleared must have been defined as an output by the
Configure
the
Example:
command in order to be valid. The
Bit Clear
Bn
Bit n (1 thru 40) is cleared to a logic 0
command will clear to a logic zero an output bit described by the
Invert
command (
Bit Clear
command is sent.
I16
) has been sent. If data is active high (default
outputs 0 volts. When multip le
Execute
command (X) must follow each
Strobe
output line is not pulsed when
Bit Clear
commands are
CLEAR 718 OUTPUT 718;"C5X" OUTPUT 718;"A7XA8XA9X" OUTPUT 718;"B7X" OUTPUT 718;"B8XB9X"
reset the configure all ports as output set bits 7, 8, and 9 to +5 volts clear bit 7 to zero volts clear bits 8 and 9 to zero volts
Digital488
3.3
Section 3 Command Descriptions
Bus Input/Output Gn
Bus Output
The or both will be transmitted on the bus when the amount of data sent is dependent on the Pn command.
The G0 default mode causes all input and output port data to be sent to the controller when addressed to talk. The G1 mode causes only data from the ports programmed as inputs to be returned when addressed to talk. The G2 mode causes only data from ports programmed as outputs to be returned when addressed to talk.
command determines whether input port data, output port data
Digital488
is addressed to talk. The
If all ports are programmed as outputs with G1 selected and the addressed to talk, nothing will be transmitted and the bus will hang. The conver se will also cause the bus to hang with all ports programmed as inputs and G2 selected.
G0
G1
G2
Example:
CLEAR 718 OUTPUT 718;"P0C1X" OUTPUT 718;"G1X" ENTER 718; A$ DISP A$
OUTPUT 718;"G2X" ENTER 718; A$ DISP A$
Input and output Only input port data is sent on talk Only output port data is sent on talk
port data is send on talk
reset the port1 as output, ports 2-5 as input select only input ports read data from the input ports display shows dependent on what is connected.
select output ports read data from the output ports display shows 00 (outputs default to 0)
Digital488
FFFFFFFF
Digital488
(data is
is
3.4
Section 3 Command Descriptions
Configure Cn
Ports 1 thru 5 are configured as inputs or outputs with the Each port is eight bits wide. At power-on, all ports are initialized as inputs. The
Configure
programmed as outputs will be set to a logic zero after receiving the command. The actual output level is dependent on the
Example:
CLEAR 718 OUTPUT 718;"C1X"
command is usually the first command to be sent after power on. All ports
Invert
Cn
Mode n (0 thru 5) defines which ports are input and output
Port 5 C0
in in in in in
C1
in in in in out
C2
in in in out out
C3
in in out out out
C4 C5
in = programmed as an input port out = programmed as an output port
4 3 2 1
in out out out out out out out out out
reset the select port 1 as output, ports 2 thru 5 as inputs
Digital488
Configure
command (
command.
Configure
I16).
3.5
Section 3 Command Descriptions
Data Dn....Z
Data
The of bits which can be sent with the programmed as outputs. For formats F0 through F3, if the amount of data sent is less than the the number of bits programmed as outputs, the least-significant bits will con tain the data sent and the most-significant bits will be cleared to lo gic zero. If a sing le port is selected with the
Data Strobe
on the selected ports.
For formats F0 through F3, data sent by the controller is contained within a prefix (D) and a suffix (Z). In format F4, the five bytes immediately following the prefix (D) is interpreted as data and the suffix (Z) is not used. For the high speed binary F5 format, all bytes received are treated as data and the prefix and suffix are not used. Refer to the
Fn
command for additional details.
command outputs up to 40 bits of data to the output ports. The number
Data
command is limited by the number of bits
Port
command, only eight bits may sent with the
output is pulse for approximately 50 microseconds after new data is output
Data
command. The
Dn...Z
(note: in the F4 mode, the Z terminator is not allowed)
Example:
CLEAR 718 OUTPUT 718;"C5P1X" OUTPUT 718;"D55ZX" ENTER 718; A$ DISP A$
OUTPUT 718;"P0X" OUTPUT 718;"D1234567890ZX" ENTER 718;A$ DISP A$
n...
represents the data to be outputted, terminated by Z.
reset the all ports as output, select port 1 send 55 to port 1 read data from port 1 display shows
select all ports send data to all 40 bits read data from the Digital488 display shows
Digital488
55
1234567890
3.6
Section 3 Command Descriptions
OUTPUT 718;"D123ZX" ENTER 718; A$ DISP A$
OUTPUT 718;"P5D21ZX" OUTPUT 718;"P0X" ENTER 718; A$ DISP A$
send 12 bits of data to the least significant bits read data from the Digital488 display shows
set port 5 only select all ports read data from the Digital488 display shows
0000000123
2100000123
3.7
Section 3 Command Descriptions
Data Ready Rn
Data Ready
The conjunction with the can both latch the input data and signal the controller that new data is av ailable.
command enables digital input data to be latched. When used in
Service Request (M2
) command, the
External Data Ready
line
In the default mode (R0) data is read when the the R1 mode, it will wait for the selected reading the data and formatting it for output. If the
EDR
is asserted, the bus will hang up until the the data will remain latched until the interface is addressed to talk and the d ata is read by the controller. If output, the request.
After output in the F0 through F4 formats, the talk to perform subsequent buffered output of to capture data in the
The fall time of less than 1.0 microsecond. The can be changed to falling-edge sensitive with the
R0
R1
Data is latched on an
Example:
CLEAR 718 OUTPUT 718;"R1X"
EDR
transitions again before the previous
Digital488
EDR
will generate an
F5
high speed binary format
signal must be at least 1 microsecond wide and should have a rise and
Data is not latched, and is read whenever the is addressed to talk
External Data Ready (EDR
EDR Overrun
EDR
EDR
EDR
Digital488
Digital488
EDR
pulse occurs. Once
error and ignore the
Digital488
captured data.
line defaults to rising-edge sensitiv e, but
Invert
command (
transition
reset the data is only read after a rising-edge signal is applied to the
is addressed to talk. In
) transition before
is addressed to talk before
EDR
is asserted
EDR
buffered data has been
EDR
must be re-addressed to
EDR
cannot be used
I32
).
Digital488
Digital488
EDR
line
read
3.8
Section 3 Command Descriptions
End or Identify (EOI) Kn
EOI
The is used by a talker to indicate the end of a multiple by te transfer sequ ence. At power ­on, the setting of Switch S1 determines the default change the
EOI
the
K1
In the [F4 and F5] )
line is one of five interface management lines on the IEEE 488 Bus. It
EOI
mode. The controller can
EOI
mode by programming the
line is asserted by the
mode the
.
EOI
function is disabled (except when using the binary modes
Digital488
Digital488
on the last byte of every bus output string.
from the bus. In the
K0
mode,
K0 EOI
K1 EOI
Example:
OUTPUT 718;"K1X"
enabled, assert
disabled, do not assert
EOI
on last byte transferred
EOI
on last byte transferred
disables EOI on last byte
3.9
Section 3 Command Descriptions
Execute X
Commands sent to the instructed to execute these commands. This is done by sending an X, usually as the last character of a command string. Commands sent without an X are stored in the internal buffer until an X is received. Any number of the same command string. Certain commands, such as command in a string if more than one of that command is within the same string.
Example:
CLEAR 718 OUTPUT 718;"F2"
OUTPUT 718;"X"
OUTPUT 718;"A1XA2X"
Digital488
will result in no action until the unit is
Execute
reset the send "F2" to the input buffer instruct the command input buffer two Bit Set (A) commands are within the same string, requiring an X after each command.
commands may be inserted into
Bit Set
require an X after each
Digital488
Digital488
Digital488
command
to execute its
3.10
Section 3 Command Descriptions
Format Fn
Format
The be described. Six data formats are available.
command determines the method by which input and output data will
F0
ASCII Hexadecimal (4 bits per character)
F1
ASCII Character (4 bits per character )
F2
ASCII Binary (1 bit per character)
F3
ASCII Decimal (8 bits per number)
F4 F5
Binary (each byte represents 8 bits) High Speed Binary (each byte represents 8 bits)
F0 Format- ASCII Hexadecimal
In the default character having a value from 0 thru 9 or A thru F. Each ASCII character describes 4 bits of data.
Data received for output to the digital ports must be contained within a prefix (D) and a suffix (Z). If the amount of data sent is less than the number of bits programmed as outputs, the least-significant bits will contain th e data sent and the most-significant bits will be cleared to logic zero. If the data sent is greater than the number of bits programmed for output or selected by the Pn command, the conflict error and ignore the entire command string. The approximately 50 microseconds after new data is output on the selected port(s).
F0
format, the data is described in ASCII hexadecimal, with each
F0 Character Decimal Equiv
00 8 8 11 9 9 22 A 10 33 B 11 44 C 12 55 D 13 66 E 14 77 F 15
F0 Character Decimal Equiv
Digital488
Data Strobe
will generate a
output is pulse for
3.11
Section 3 Command Descriptions
When the from all ports, u nasserts
Gn
appended to the output. After output the perform subsequent reads.
Example:
DIM A$[50] CLEAR 718 OUTPUT 718;"C2G2X" OUTPUT 718;"D4E6BZX" ENTER 718; A$ DISP A$
four least significant bits of each ASCII character representing four bits of data.
Pn
and
In the F1 format, the data is coded and transmitted in ASCII Characters with the
F1 Character Decimal Equiv
Digital488
commands. Leading zeros are not suppressed and the bus terminators are
00 88 11 99 22 :10 33 ;11 44 <12 55 =13 66 >14 77 ?15
is addressed to talk (R0) it asserts
Inhibit
and outputs the number of characters determined by the
Digital488
EDR (R1
) may also be used to capture data in this format.
dimension the length of A$ reset the configure ports 1 & 2 as output output hexadecimal read data from the display shows
F1 Format - ASCII Character
F1 Character Decimal Equiv
must be re-addressed to talk to
Digital488
4E6B
Digital488
4E6B
to ports 1 & 2
Inhibit
, reads the data
Data received for output to the digital ports must be contained within a prefix (D) and a suffix (Z). If the amount of data sent is less than the number of bits programmed as outputs, the least-significant bits will con tain the data sent and the most-significant bits will be cleared to logic zero. If the data sent is greater than the numb er of bits programmed for output or selected by the Pn command, the and ignore the entire command string.
Digital488
3.12
will generate a conflict error
Section 3 Command Descriptions
Data Strobe
The data is output on the selected port(s).
output is pulse for approximately 50 microseconds after new
When the from all ports, u nasserts
Gn
appended to the output. After output the perform subsequent reads.
Example:
OUTPUT 718;"F1X" ENTER 718; A$ DISP A$ OUTPUT 718;"D1??2ZX" ENTER 718; A$ DISP A$
formatted in two 4-bit multiples separated by semicolons.
Pn
and
In the F2 format, the each data bit is described with an ASCII 0 or 1. Each byte is
F2 String Decimal Equiv 0000;0000 0 0000;1001 9 0000;0001 1 0000;1010 10 0000;0010 2 0000;1011 11 0000;0011 3 0000;1100 12 0000;0100 4 0000;1101 13 0000;0101 5 0000;1110 14 0000;0110 6 0000;1111 15 0000;0111 7 1000;0001 129 0000;1000 8 1111;1111 255
Digital488
commands. Leading zeros are not suppressed and the bus terminators are
is addressed to talk (R0) it asserts
Inhibit
and outputs the number of characters determined by the
Digital488
EDR (R1
) may also be used to capture data in this format.
select ASCII Character format read data from the display shows
1??2
send read data from the display shows
F2 Format - ASCII Binary
F2 String Decimal Equiv
to the
Inhibit
, reads the data
must be re-addressed to talk to
Digital488
4>6;
Digital488
Digital488
1??2
3.13
Section 3 Command Descriptions
Data received for output to the digital ports must be contained within a prefix (D) and a suffix (Z) and each 4-bit quantity must be separated by semicolons. Leadin g zeros are not required. If the amount of data sent is less than the number of bits programmed as outputs, the least-significant bits will contain the data sent and the most-significant bits will be cleared to logic zero. If the data sent is g reater than the number of bits programmed for output or selected by the Pn command, the will generate a conflict error and ignore the entire command string. The output is pulse for approximately 50 microseconds after new data is output on the selected port(s).
Digital488
Data Strobe
When the from all ports, un asserts the Gn and are appended to the output. After output the perform subsequent reads.
Example:
OUTPUT 718;"F2X" ENTER 718;A$ DISP A$
OUTPUT 718;"D1111;0;1010;0101ZX" ENTER 718; A$ DISP A$
In the
in ASCII. Each decimal number (0 to 255) to be output must be separated by semicolons.
Digital488
Pn
commands. Leading zeros are not suppressed and the bus terminators
F3
format, the data is described in decimal 8 bit multiples an d transmitted
is addressed to talk (R0) it asserts
Inhibit
and outputs the number of characters determined by
Digital488
EDR (R1
) may also be used to capture data in this format.
select ASCII/binary mode read data from the display shows
read data from the display shows
F3 Format - ASCII Decimal
must be re-addressed to talk to
0001;1111;1111;0001
1111;0000;1010;0101
Inhibit
Digital488
Digital488
, reads the data
3.14
Section 3 Command Descriptions
F3 Number Decimal Equiv
000 0 008 8 001 1 009 9 002 2 010 10 003 3 020 20 004 4 100 100 005 5 200 200 006 6 210 210 007 7 255 255
Data received for output to the digital ports must be contained within a prefix (D) and a suffix (Z). If the amount of data sent is less than the number of bits programmed as outputs, the least-significant bits will contain th e data sent and the most-significant bits will be cleared to logic zero. If the data sent is greater than the number of bits programmed for output or selected by the Pn command, the conflict error and ignore the entire command string. The approximately 50 microseconds after new data is output on the selected port(s).
When the from all ports, u nasserts
Gn
appended to the output. After output the perform subsequent reads.
Example:
and
Pn
Digital488
Inhibit
commands. Leading zeros are not suppressed and the bus terminators are
EDR (R1
F3 Number Decimal Equiv
Digital488
Data Strobe
is addressed to talk (R0) it asserts
and outputs the number of characters determined by the
Digital488
) may also be used to capture data in this format.
must be re-addressed to talk to
will generate a
output is pulse for
Inhibit
, reads the data
OUTPUT 718;"F3X" ENTER 718; A$ DISP A$ OUTPUT 718;D100;200ZX ENTER 718; A$ DISP A$
select decimal mode read data from the
100
240;165
200
&
100;200
3.15
display shows output read data from the display shows
Digital488
Digital488
to the
Digital488
Section 3 Command Descriptions
F4 Format - Binary
In the F4 binary format, no error checking is performed and caution exercised when using this mode to avoid locking the IEEE bus.
When addressed to listen, the bytes of data beginning with PORT5 without the "Z" suffix. If any digital I/O port is configured as an input, the data to that input port will be ignored.
When the from all ports, u nasserts asserted on the last bye. Bus terminators, with the exception of EOI, are the output. After output the subsequent reads.
In the F5 high speed binary format, the command interpreter is disabled. When addressed to listen, the Digital I/O ports. Each time it receives five bytes or detects EOI asserted, it pulses the
Data Strobe
PORT3, PORT2, PORT1 sequence. If only two bytes are received, with EOI asserted on the second byte, the with the second and pulse the characters as data, the Un command will not be recognized.
Digital488
EDR (R1
for approximately 15 microseconds. Data is expected in a PORT5, PORT4,
Digital488
is addressed to talk (R0) it asserts
Inhibit
) may also be used to capture data in this format.
Digital488
Digital488
and outputs 5 bytes beginning with PORT5 with EOI
Digital488
F5 Format - High Speed Binary
treats all bytes received as data to be output to the
will update PORT5 with the first byte received, PORT4
Data Strobe
expects the "D" prefix followed by five
Inhibit
not
must be re-addressed to talk to perform
. Since the interface treats all received
must
be
, reads the data
appended to
To place the the last command sent to the interface this command, such as carriage return or line feed, will be considered data and the output ports will reflect those character values.
When addressed to talk in th is format it asserts ports, unasserts fifth byte. When the last data byte is transferred, the data is read again in anticipation of another data transfer. If N+1 times; where N is the number of total (5 byte) data transfers. In this format the
Digital488
cannot be used to capture data in the
does
Digital488
Inhibit
and outputs the binary data to the bus with EOI asserted on the
Inhibit
not
have to be re-addressed to talk to read the ports multiple times.
in the F5 format, the 3 character string "
without
is used to sequence external hardware, this line will p ulse
F5
high speed binary format.
terminators. Any characters appended to
Inhibit
3.16
, reads the data from all
F5X
" should be
EDR
Section 3 Command Descriptions
The only programmable method to exit the F5 high speed binary format is device
DCL
clear ( interpreter and changes the format to F0. All other parameters remain unchanged. In addition, the
) or Selected Device Clear (
Clear
output line is not pulsed by DCL or SDC when the interf ace is in F5.
SDC
). When received, it enables the command
3.17
Section 3 Command Descriptions
Handshake Hn
Handshake
The independent of any other I/O operations. When the respective handshake line is pulsed for approximately 50 microseconds. It returns to its steady­state condition after pulsing. The any of the handshake lines.
control command enables software control of the handshake lines,
Digital488
Invert
command may be used to change the active state of
receives an Hn command, the
H0
H1
H2
Example:
OUTPUT 718;"H1X"
The The The
Clear
line is pulsed
Strobe Trigger
line is pulsed
line is pulsed
the Strobe line is pulsed
3.18
Section 3 Command Descriptions
Inhibit Qn
Inhibit
The independent of any other I/O activities. The 'set' and 'clear' levels of the determined by the
Q0
Q1
Example:
CLEAR 718 OUTPUT 718;"Q1X"
control command allows software control of the
Invert
command.
Clear the Set the
Inhibit
Inhibit
line (return to unasserted state)
line (place in the asserted state)
reset the set the Inhibit line
Digital488
Inhibit
Inhibit
line,
line are
3.19
Section 3 Command Descriptions
Invert In
Invert
The lines. At power up all handshake and control lines are active high (logic one = + 5 volts). The handshake lines, and of the data lines. If multiple within the same string, then an
Invert
each desired, and send one command with the sum of the desired commands. The commands are ORed together as received. To delete any one command, it is necessary to program the default mode I0, then reprogram the desired commands.
command is used to change the polarity of the handshake and data
Invert
command can selectively change the polarity of each of the
Invert
commands are contained
Execute
command. An alternative is to add the values of each
command (X) should be included between
Invert
command
Invert
I0
I1 Inhibit
I2 Trigger
I4 Data Strobe
I8 Clear
I16 Data
I32 EDR
I64 Service
Example:
CLEAR 718 OUTPUT 718;"I32XI64X"
Note:
OUTPUT 718;"I96X"
All control lines are active high, all data lines are high true
output is active low
is low true
input is falling-edge sensitive
output is active low
output is active low
output is active low
input is falling-edge sensitive
reset the select EDR and Service input as falling-edge sensitive
performs the same function as above
Digital488
3.20
Section 3 Command Descriptions
Port Pn
Port
The the default mode (P0), all ports are selected. The specific eight bit port.
command determines which port is selected for data input/output. In
P1
thru P5 commands select a
It is recommend that the determine which ports will be output when the Data in modes
P0
P1
P2
P3
P4
P5
Example:
CLEAR 718 OUTPUT 718;"P4X"
P1
throuth
All five ports are selected Port 1 is selected Port 2 is selected Port 3 is selected Port 4 is selected Port 5 is selected
Bus Output
P5
will be input or output in groups of eight bits.
command be used with the
reset the select port 4
Digital488
Digital488
PO
mode to
is addressed to talk.
3.21
Section 3 Command Descriptions
Service Request Mask (SRQ) Mn
Service Request (SRQ)
The controller to one of several condition s described below. Multiple be enabled simultaneously by issuing them sepatately or by combining them in one command. If multiple
SRQ
each programmed controller sends a Device Clear (DCL), Selected Device Clear (SDC), or Interface Clear (IFC) command.
generating a
transition. Refer to the of the
Refer to the
EDR
command should be followed by an
SRQ
M0
M1
M2
M4
M8
M16
MO
default mode disables the
Service Request
M1
will generate a
Service
input line.
input line.
M2
will generate a
Invert
SRQ
commands are contained within the same command string,
modes will remain enabled until the M0 command is sent, or the
SRQ is disabled SRQ on SRQ on SRQ on bus error SRQ on Self-Test error SRQ on Ready
command
Service EDR
.
Service Request
Invert
command
Service Request
(I32)
mode is used by the
Execute
input transition
input transition
SRQ
function, preventing the
when the
(I64)
description for programming the polarity
when the
description for programming the polarity of the
Digital488
SRQ
conditions can
command
Digital488
Service
EDR
Input line makes a
input makes a transition.
to alert the
(X).
The
from
M4
will generate a common bus error is sending an invalid command to the attempting to select an 'F6' format when no 'F6' format exists will ge nerate a
Request
when the M4 mode is selected.
Service Request
when a bus error occurs. The most
Digital488
3.22
. For example,
Service
Section 3 Command Descriptions
M8
will generate a Refer to the
execution of a set of commands from the bus controller. This is used by the controller to assure the completion of a set of commands before sending a subsequent set of commands.
Example:
CLEAR 718 OUTPUT 718;"M4X" OUTPUT 718;"F7X"
CLEAR 718 OUTPUT 718;"M1XM4X"
OUTPUT 718;"M5X"
Test
M16
will generate a
command
Service Request
(T0)
description for details on self-tests.
Service Request
reset the select SRQ on Bus error send an invalid bus command.
Note: ERROR and SRQ LEDs should illuminate
reset the select SRQ on Bus error and SRQ on Service input.
This has the same effect as the command above where
when the
when the
Digital488
Digital488
M1X
plus
Digital488
M4X
equals
Digital488
M5X
self-test fails.
has completed the
.
3.23
Section 3 Command Descriptions
Serial Poll Status Byte
Serial Poll Output
The from the controller. Refer to the byte is affected. Below is a description of the significance of each bit in the byte.
byte is sent upon receiving the serial poll command
SRQ
description for details on how the
Serial Poll
Serial Poll
Bit Location Significance DIO1(LSB) 1 Service Input transition DIO2 2 EDR input transition DIO3 4 Bus error DIO4 8 Test error DIO5 16 Ready for more commands DIO6 32 not assigned, always 0 DIO7 64 Service Request bit DIO8 (MSB) 128 not assigned, always 0
Serial Poll Bit Description
DIO1
When enabled by the M1 command,
Input line (active transition state determined by the
DIO1
is cleared after the controller serial polls the
DIO2
DIO3
When enabled by the M2 command, transition state determined by the after the controller serial polls the
DIO3
is set when an invalid command is sent to the command will enable a received. The bit is cleared after the controller sends a and reads the status string from the
(SRQ Bit Value if set to logic 1)
DIO1
is set by a transition on the Service
Digital488.
DIO2
is set on an
Invert
command
Digital488.
Service Request
to occur then an invalid command is
Digital488.
Invert
EDR
(I32)
).
Digital488.
Status
command
transition (active
DIO2
command
(I64)
is cleared
M4
The
(U0X)
).
DIO4
The status of
Digital488.
test fails,
DIO4
DIO4
is determined after the
If the self test passes, the
will be set to a logic 1.
Test
command
DIO4
bit will remain a zero. If the self
3.24
(T0X)
is sent to the
Section 3 Command Descriptions
The M8 command will cause a
DIO4
to controller sends a the
DIO5
DIO6 DIO6 DIO7
DIO8 DIO8
Example:
CLEAR 718 OUTPUT 718;"M4X" OUTPUT 718;"F7X"
SPOLL (718)
The processed by the processing commands which have been received from the controller. When used with the when the before the
When the logic one. This is used by the controller to determine that the
Request
being set if the self test fails. The
Digital488.
DIO5
is not used, and is always a logic zero.
was generated by the
is not used, and is always a logic zero.
Service Request
Status
bit is set after an entire command string has been received and
M16
DIO5
bit is set. An
DIO5
bit can be cleared.
Digital488
command
Digital488.
command, a
generates a
reset the select SRQ on Bus error send an invalid bus command. ERROR and SRQ LEDs should illuminate display should be 84 (64+16+4)
(U0X)
The bit is clear while the
Service Request
Execute
Service Request,
Digital488.
Digital488
to be generated in addition
DIO4
bit is cleared after the
and reads the status string from
Digital488
will also be generated
the
(X)
must be received
DIO7
will be set to a
Service
command
is
64 denotes the READY for more commands. 4 denotes a Bus error.
When serial polled,the SRQ LED will turn off.
Digital488
was the source of the SRQ. 16 denotes the
3.25
Digital488
is
Section 3 Command Descriptions
Status Un
Status
The next addressed to talk. The status of the interfering with normal operation. Any error conditions are cleared after the status string is read by the controller. The bit from the I/O ports
U0
Un
The format of the status byte returned by the is as follows:
*.*C#E#F#G#I###K#M###P#R#Y#
where each # equals the number corresponding to that command. The leading information
Example:
DIM A$[50] CLEAR 718 OUTPUT 718;"U0X" ENTER 718; A$ DISP A$
command (U0) will cause the
Status
command (Un) also enables the controller to read any single
(U1
through
Send the Send the status of bit n (1 thru 40) when next addressed to talk
*.*
Digital488
is the revision level of the
U40).
status when next addressed to talk
dimension A$ reset the send U0 to the read the status byte display =
1.0C0E0F0G0I000K0M000P0R0Y0
Digital488
Digital488
Digital488
Digital488
Digital488
Digital488
to send the status messag e when
may be read at any time without
after receiving a
firmware.
U0
command
The status returned after receiving a depending on the level of the line, and the state of the
CLEAR 718 OUTPUT 718;"U22X" ENTER 718;A$ DISP A$
U1
through
reset the request the status of bit 22 read the status bit display shows a 0 (dependent on the signal applied to the input
U40
Digital488
is an ASCII character '1' or '0',
Invert
3.26
command (
I16).
Section 3 Command Descriptions
Below is a summary of the
C# Configuration C0
All ports are inputs
C1
Port 1 is an output, ports 2 thru 5 are inputs
C2
Ports 1 and 2 are outputs, ports 3 thru 5 are inputs
C3 C4 C5
All ports are outputs
E# Error Message 0 1 2 3 4 5
F# Data Format F0
Hexadecimal
F1
ASCII
F2
Binary
F3
Decimal
F4
Ports 1 thru 3 are outputs, ports 4 and 5 are inputs Ports 1 thru 4 are outputs, port 5 is an input
No error Unrecognized command (ex. W3) Illegal command option (ex. F8) Conflict (attempt to output data to an input port) ROM error RAM error
High Speed Binary
Status (U0
) information.
I### Invert Control Lines I0
All contr o l and data lines are active high
I1 I2 I4 I8 Clear I16 Data I32 EDR I64 Service
Note: the status indication reflects the sum of all received
Inhibit
output is active low
Trigger Data Strobe
output is active low
output is active low
output is active low is active low input is fallling edge sensitive
input is falling edge sensitive
3.27
Invert
commands.
Section 3 Command Descriptions
K# End Or Identify K0 K1
M## Service Request M0 M1 M2 M4 M8 M16
Note: the status indication reflects the sum of all received
P# Selected Port P0
All por ts selected
P1
Port 1 selected
P2 P3
Port 3 selected
P4
Port 4 selected
P5 R# Data Ready
R0
Data is not latched, but is read when Digital 488 is
addressed to talk
R1
Data is latched on
EOI enabled EOI disabled
SRQ is disabled SRQ on SRQ on SRQ on Bus error SRQ on Test error SRQ on Ready
Port 2 selected
Port 5 selected
Service
EDR
input transition
input transition
EDR
transition
Service Request
commands.
T# Test LED T0
Y# Terminator Y0
CR LF
Y1
LF CR
Y2
CR only
Y3
LF only
Perform RAM and ROM test
3.28
Section 3 Command Descriptions
Terminator Yn
The IEEE 488 bus terminator defaults at power-on to the settings on Switch S1 It
also may be programmed for any combination of Carriage Return (CR) and Line Feed (LF).
Y0
The sequence to send LF-CR. Y2 sends CR only and
Example:
CLEAR 718 OUTPUT 718;"Y3X"
mode is the most commonly accepted terminator, CR-LF. Y1 reverses the
Y3
sends LF only.
Y0
CR LF
Y1
LF CR
Y2
CR only
Y3
LF only
select line feed terminator
3.29
Section 3 Command Descriptions
Test T0
Test
The
command is used to verify hardware and LED operation.
T0
The T0 command will cause the test is successful, all LEDs will flash for one-half second. If a test fails, the LED will remain illuminated. Use the self test error.
Example:
CLEAR 718 OUTPUT 718;"T0X"
Perform RAM and ROM test
Digital488
Status
reset the Digital488 send self test command
to initiate a ROM/RAM test. If the
command to determine the cause of the
Error
3.30
Section 4 IEEE 488 Primer
IEEE 488 Primer

4.1 HISTORY

IEEE 488
The Electronic Engineers in 1975 and revised in 1978. The designated
computer interfaces. This placed the burden of system hardware design on the end user. If his application required the products of several different manufacturers, then he might need to design several different hardware and software interfaces. The popularity of the
B
us or and control protocols. The use of the the interface to design of the high level software that is specific to the measurement application.
IEEE 488-1978
Prior to the adoption of this standard, most instrumentation manufacturers offered their own versions of
GPIB
) is due to the total specification of the electrical and mechanical interface as well as the data transfer

4.2 GENERAL STRUCTURE

bus is an instrumentation communication bus adopted by the Institute of Electrical and
Digital488
.
IEEE 488
IEEE 488
interface (sometimes called the General Purpose Interface
standard has moved the responsibility of the user from design of
conforms to this most recent revision
The main purpose of the either be an instrument or a computer. Before any information transfer can take place, it is first necessary to specify which will do the talking (send data) and which devices will be allowed to listen (receive data). The decision of who will talk and who will listen usually falls o n the
Active Controller
System Controller
The speak at a time and the chairman is responsible for recognizing members and allowing them to have their say. On the bus, the device which is recognized to speak is the information transferred is to be clearly understood by all. The act of "giving the floor" to that device is called
Addressing to Talk
he can appoint an acting chairman to take control of the proceedings. For the
Active Controller
.
is similar to a committee chairman. On a well run committee, only one person may
. If the committee chairman can not attend the meeting, or if other matters require his attention,
.
GPIB
is to transfer information between two or more devices. A device can
Active Talker
4.1
System Controller
. There can only be one Talker at a time if the
which is, at power on, the
GPIB
, this device becomes the
Section 4 IEEE 488 Primer
At a committee meeting, everyone present usually listens. This is not the case with the commands all other devices to ignore what is being transmitted. A device is instructed to listen by being
Listener
GPIB
. The
. Devices which are to ignore the data message are instructed to
Active Controller
Addressed to Listen
selects which devices will listen and
. This device is then referred to as an
Unlisten
Active
.
The reason some devices are instructed to college instructor is presenting the day's lesson. Each student is told to raise their hand if the instructor has exceeded their ability to keep up while taking notes. If a hand is raised, the instructor stops his discussion to allow the slower students the time to catch up. In this way, the instructor is certain that each and every student receives all the information he is trying to present. Since there are a lot of students in the classroom, this exchange of information can be very slow. In fact, the rate of information transfer is no faster than the rate at which the slowest note-taker can keep up. The instructor, though, may have a message for one particular student. The instructor tells the rest of the class to ignore this messag e ( one student at a rate which he can understand. This information transfer can then happen much quicker, because it need not wait for the slowest student.
GPIB
The
called
For data transfer on the
a) b) Designate who will c) Designate all the devices who are to
devices to
d) Indicate to all devices that the data transfer can take place.
transfers information in a similar way. This method of data tr ansfer is
handshaking
Unlisten
. More on this later.
IEEE 488
all devices to protect against eavesdroppers.
talk
by
listen
.
Active Controller
, the
addressing
Unlisten
a device to
listen
by
is quite simple. Suppose a
Unlisten
must …
talk
addressing
) and tells it to that
.
those
4.2
Section 4 IEEE 488 Primer
4.3
Section 4 IEEE 488 Primer
4.3 SEND IT TO MY ADDRESS
In the previous discussion, the terms
to Listen
one system. Each of these devices must have a unique address to avoid confusion. In a similar fashion, every building in town has a unique address to prevent one home from receiving another home's mail. Exactly how each device's address is set is specific to the product's manufacturer. Some are set by DIP switches in hardware, others by software. Consult the manufacturer's instructions to determine how to set the address.
Controller
(MTA),
were used. These terms require some clarification.
IEEE 488
The
Addresses are sent with
. These commands include
Talk Address Group
standard permits up to 15 devices to be configured within
universal (multiline
My Listen Address
(TAG), and
Listen Address Group
Addressed to Talk
) commands from the
(MLA),
(LAG).
Addressed
and
Active
My Talk Address

4.4 BUS MANAGEMENT LINES

Five hardware lines on the on these lines are often referred to as active low, i.e. a low voltage represents a logic "1" (asserted), and a high voltage represents a logic "0" (unasserted).
GPIB
are used for bus management. Signals
uniline
(single line) commands. The signals are
4.4.1 Attention (ATN)
ATN
is one of the most important lines for bus management. If Attention is asserted, then the information contained on the data lines is to be in terpreted as a multiline command. If it is not, then that information is to be interpreted as d ata for
Active Listener
the of this line.
s. The
Active Controller
is the only bus device that has control
4.4
Section 4 IEEE 488 Primer
4.4.2 Interface Clear (IFC)
IFC
The bus devices in a known state. Although device configurations vary, the command usually places the devices in the Talk and Listen Idle states (neither
Talker
nor
line is used only by the
Active Listener
).
System Controller
. It is used to place all
IFC
4.4.3 Remote Enable (REN)
When the respond to remote operation. Generally, the any bus programming is attempted. Only the

Remote Enable

System Controller
line.
sends the
REN
command, bus devices will
REN
command should be issued before
System Controller
has control of the
4.4.4 End or Identify (EOI)
EOI
The device that is sending the data asserts
EOI
The some special character such as carriage return.
The simultaneously asserting
line is used to signal the last byte of a multibyte data transfer. The
EOI
during the transfer of the last data byte.
signal is not always necessary as the end of the data may be indicated by
Active Controller
EOI
also uses and
ATN
EOI
to perform a
.
Parallel Poll
by
4.4.5 Service Request (SRQ)
When a device desires the immediate attention of the
SRQ
asserts requested service. This is accomplished with a
. It is then the Controller's responsib ility to determine which device
Serial Poll
Active Controller
Parallel Poll
or a
Active
it
.
4.5
Section 4 IEEE 488 Primer

4.5 HANDSHAKE LINES

GPIB
The got it" sequence. This handshake protocol assures reliable data transfer, at the rate determined by the slowest Listener. One line is controlled by th e Talker, while the other two are shared by all Active Listeners. The handshake lines, like the other
IEEE 488
lines, are active low.
uses three handshake lines in an "I'm ready - Here's the data - I've
4.5.1 Data Valid (DAV)
DAV
The
NDAC
is asserted (active low) which indicates that all Listeners have accepted the previous data byte transferred. The waits until Listeners are ready to accept the information. When the proper state, the on the bus is valid.
NRFD
line is controlled by the
Talker
is unasserted (high) which indicates that all Addressed
Talker
asserts
DAV
( active low) to indicate that the data
Talker
then outputs data on the bus and
NRFD
. The
Talker
and
verifies that
NDAC
are in
4.5.2 Not Ready for Data (NRFD)
This line is used by the are ready to accept new data. The unassert this line (high) which they will do at their own r a te wh en they are r eady for more data. This assures that all devices that are to accept the information are ready to receive it.
Listeners
Talker
must wait for each
to inform the
Talker
Listener
when they
to
4.5.3 Not Data Accepted (NDAC)
NDAC
The indicates to the information. Each device releases will not go high until the slowest Listener has accepted the data byte.
Talker
line is also controlled by the
that each device addressed to listen has accepted the
NDAC
(high) at its own rate, but the
Listeners
. This line
NDAC
4.6
Section 4 IEEE 488 Primer

4.6 DATA LINES

GPIB
The These eight data lines use the convention of binary designation of D0 to D7. The data lines are bidirectional and are active low.
provides eight data lines for a bit parallel/byte serial data tr ansfer.
DIO1
through
DIO8
instead of the

4.7 MULTILINE COMMANDS

Multiline
bus with listen, Untalk and Unlisten.
ATN
(bus) commands are sent by the
asserted. These commands include addressing commands for talk,
4.7.1 Go To Local (GTL)
This command allows the selected devices to be manually controlled.
($01)
Active Controller
4.7
over the data
Section 4 IEEE 488 Primer
4.7.2 Listen Address Group (LAG)
There are 31 (0 to 30) listen addresses associated with this group. The 3 most significant bits of the data bus are set to 001 while the 5 least significant bits are the address of the device being told to listen.
4.7.3 Unlisten (UNL)
This command tells all bus devices to Unlisten. The same as Unaddressed to Listen. ($3F)
4.7.4 Talk Address Group (TAG)
There are 31 (0 to 30) talk addresses associated with this group. The 3 most significant bits of the data bus are set to 010 while the 5 least significant bits are the address of the device being told to talk.
4.7.5 Untalk (UNT)
This command tells bus devices to Untalk. The same as Unaddressed to Talk. ($5F)
4.7.6 Local Lockout (LLO)
Issuing the functions. ($11)
LLO
command prevents manual control of the instrument's
4.7.7 Device Clear (DCL)
This command causes all bus devices to be initialized to a pre-defined or power up state. ($14)
4.8
Section 4 IEEE 488 Primer
4.7.8 Selected Device Clear (SDC)
This causes a single device to be initialized to a pre-defined or power up state. ($04)
4.7.9 Serial Poll Disable (SPD)
SPD
The status byte. ($19)
command disables all devices from sending their Serial Poll
4.7.10 Serial Poll Enable (SPE
A device which is Addressed to Talk will output its Serial Poll status byte after
SPE
is sent and
ATN
)
is unasserted. ($18)
4.7.11 Group Execute Trigger (GET)
This command usually signals a group of devices to begin executing a triggered action. This allows actions of different devices to begin simultaneously. ($08)
4.7.12 Take Control (TCT)
This command passes bus control respon sib ilities from the current
Controller
to another device which has the ability to control. ($09)
4.7.13 Secondary Command Group (SCG)
These are any one of the 32 possible commands (0 to 31) in this group. They must immediately follow a talk or listen address. ($60 to $7F)
4.9
Section 4 IEEE 488 Primer
4.7.14 Parallel Poll Configure (PPC)
This configures devices capable of performing a which data bit they are to assert in response to a
Parallel Poll
Parallel Poll
as to
. ($05)
4.7.15 Parallel Poll Unconfigure (PPU)
This disables all devices from responding to a
Parallel Poll
. ($15)

4.8 MORE ON SERVICE REQUESTS

Most of the commands covered, both uniline and multiline, are the responsibility of the Most of these happen routinely by the interface and are totally transparent to the system programmer. Other commands are used directly by the user to provide optimum system control. Of the uniline commands, test system and the software designer has easy access to this line by most devices. Service Request is the method by which a bus device can signal to the that an event has occurred. It is similar to an interrupt in a microprocesso r based system.
Most intelligent bus peripherals have the ability to assert might assert it when its measurement is comp lete, if its input is overloaded or for any of an assortment of reasons. A power supply might limited. This is a powerful bus feature that removes the burden from the
Controller
says, "Do what I told you to do and let me know when you're done" or "Tell me when something is wrong."
to periodically inquire, "Are you done yet?". Instead, the
Active Controller
to send and the bus devices to recognize.
SRQ
is very important to the
Controller
SRQ
. A DMM
SRQ
if its output has current
System
Controller
SRQ
Since determine which device requested the service without additional information. This information is provided by the multiline commands for
is a single line command, there is no way for the
Serial Poll
4.10
Controller
Parallel Poll
and
to
.
Section 4 IEEE 488 Primer

4.8.1 Serial Poll

Suppose the
let's assume there are several devices which could assert
Controller
sequentially. If any device responds with DIO7 asserted it indicates to the
Controller
bits will indicate why the device wanted service. This
sequence, and any resulting action, is under control of the software designer.
issues an
that it was the device that asserted
Controller
SPE
receives a service request. For this example,
(Serial Poll enable) command to each device
SRQ
. Often times the other
Serial Polling

4.8.2 Parallel Poll

Parallel Poll
The device requested service. It provides the who but not necessarily the why. When bus devices are configured for Parallel Poll, they are assigned one bit on the data bus for their response. By using the Status bit, the logic level of the response can be programmed to allow logical OR/AND conditions on one data line by more than one device. When
Controller
must then analyze the eight bits of data received to determine the source of the request. Once the source is determined, a determine the why.
Of the two polling types, the
to determine the who and why. In addition, most devices support
(under user's software) conducts a
is another way the
Serial Poll
Controller
SRQ
Parallel Poll
Serial Poll
is the most popular due to its ability
can determine which
is asserted, the
SRQ
. The
Controller
. The
might be used to
Serial Poll
only.
4.11
Section 5 Service Information
Service Information

5.1 Factory Service

IOtech
maintains a factory service center in Cleveland, Ohio. If problems are encountered in using the problems can be resolved by discussing the problems with our applications department. If the problem cannot be solved by this method, you will be instructed as to the proper return procedure.

5.2 Theory of Operation

Digital488
you should first telephone the factory. Many
The Heart of the bytes of firmware EPROM [U102 (2764)] and 8K bytes of static RAM [U103 (6264)]. A Versatile Interface Adapter [U104 (65B22)] is used to generate real-time interrupts for the firmware operating system. The front panel annunciators are also driven by U104 through an inverter [U113 (74LS04)].
The IEEE 488 bus interface is accomplished by a TMS9914A [U106] controller with drivers U107 and U108. The digital I/O ports are controlled by 'PIA's [U202-U204 (68B21)]. SW1 is read through one port of U204.
Power is supplied by an external unregulated 9 volt wall mount supply. Regulation to the required +5 volts is provided by U109 [7805]. Decoding of the microprocessor address space is accomplished with a Programmable Logic Array [U110 (16L8)]. The Memory space allocation is...
Address Device
$6000-$7FFF U103 6264 Static RAM $9200-$9204 U202 6821 Digital I/O $9400-$9404 U203 6821 Digital I/O $9800-$9804 U204 6821 Digital I/O $A000-$A007 U106 TMS9914A IEEE Controller $B000-$B00F U104 R65C22 VIA $E000-$FFFF U102 2764 Programmed EPROM
Digital488
is a 6809 microprocessor [U101] supported by 8K
Part Number Function
5.1
Section 5 Service Information

5.6 Digital488 Replaceable Parts List

Schematic Part Number Description
C101-C108 C-5-.1 Ceramic, 25v C110,C113 C-5-.1 Ceramic, 25v C117,C118 C-5-15p Ceramic, 25v C124 C-2-10 Electrolytic, 25v C201-C205 C-5-.1 Ceramic, 25v C123 C-5-1 Ceramic, 25v D101 RF-1 Small Signal Diode D102-D106 DD-2 Red PC Mount J101 CN-2 IEEE 488 Connector R101 R-1-68K 68K½, 1/4w carbon R102 RN-4-4.7K 4.7K½ x 7 SIP R104 RN-2-470 470½ x 5 SIP R105 R-2-39 39½, 1w carbon R201-R202 R-1-1K 1K½, 1/4w carbon R206 R-1-1K 1K½, 1/4w carbon S201 SW-6-8 8 Pole DIP U102 Digital488-600 Programmed EPROM U103 IC-41 6264-15 8K x 8 CMOS SRAM U104 IC-23 65B22 Versitile Interface Adapter U106 IC-3 TMS9914ANL IEEE Controller U107 IC-4 SN75160BN IEEE Driver U108 IC-5 SN75162BN IEEE Driver U110 Digital488-601 Programming Equation - 16L8 PAL U113 IC-33 74LS04 Hex Inverter U109 IC-30 LM7805CT Regulator - +5v U201 IC-1 MC68B09P Microprocessor U202-U204 IC-2 68B21 PIA U205 IC-47 74LS05 U206 IC-32 74LS375 Y101 CR-5 8.0000 MHz Crystal
5.5
Section 5 Service Information

5.7 Digital488OEM Replaceable Parts List

Schematic Part Number Description
C101-C112 C-5-.1 Ceramic, 25v C113 C-5-1 Ceramic, 25v C114,C115 C-5-15p Ceramic, 25v C116 C-2-10 Electrolytic, 25v D101 RF-1 Small Signal Diode D102-D106 DD-2 Red PC Mount J101 CN-2 IEEE 488 Connector J102 CN-5-12 12 x 2 0.1" Header J103 CN-5-25 25 x 2 0.1" Header J104 CN-32-2 2 position Mate-N-Loc Socket R101 R-1-68K 68K½, 1/4w carbon R102 RN-4-4.7K 4.7K½ x 7 SIP R103 RN-2-470 470½ x 5 SIP S101 SW-6-8 8 Pole DIP U101 IC-1 MC68B09P Microprocessor U102 Digital488-600 Programmed EPROM U103 IC-41 6264-15 8K x 8 CMOS SRAM U104 IC-23 6 5 B22 Versitile Interface Adapter U105 Digital488-601 Programming Equation - 16L8 PAL U106 IC-3 TMS9914ANL IEEE Controller U107 IC-4 SN75160BN IEEE Driver U108 IC-5 SN75162BN IEEE Driver U109 IC-33 74LS04 Hex Inverter U110-U112 IC-2 68B21 PIA Y101 CR-5 8 .0000 MHz Crystal
5.6
Appendix A Digital488 Command Summary
Command Code Description
Bit Set An
Set bit n (1 thru 40)
Bit Clear Bn
Bus Output G0
G1 G2
Configure C0
C1 C2 C3 C4 C5
Data Dn..Z
Data Ready R0
R1
EOI K0
K1
Execute X
Format F0
F1 F2 F3 F4 F5
Clear bit n (1 thru 40)
Input and Output port data sent on talk Only Input por t data sent on talk Only Output port data sent on talk
All ports are inputs Port 1 is an output, ports 2 thru 5 are inputs Ports 1 and 2 are outputs, ports 3 thru 5 are inputs Ports 1 thru 3 are outputs, ports 4 and 5 are inputs Ports 1 thru 4 are outputs, port 5 is an input All ports are output s
Data to be outputted is entered after "D" and terminated by "Z"
Data is read when system is addressed to talk Data is latched on EDR transition
EOI enabled EOI disabled
Execute preceeding command string
ASCII Hexadecimal ASCII Character ASCII Binary ASCII Decimal Binary High Speed Binary
Handshake H0
H1 H2
Pulse the Clear line Pulse the Strobe line Pulse the Trigger line
A.1
Appendix A Digital488 Command Summary
Command Code Description
Inhibit Q0
Q1
Clear Inhibit line Set Inhibit line
Invert I0
I1 I2 I4 I8 I16 I32 I64
Port P0
P1 P2 P3 P4 P5
SRQ Mask M0
M1 M2 M4 M8 M16
Status U0
Un
Terminator Y0
Y1 Y2 Y3
All control line output s are active high Inhibit output is active low Trigger output is active low Data Strobe output is active low Clear output is active low Data is low true EDR input is falling-e dg e se ns itive Service input is falling-edge sensitive
All ports selected Port 1 selected Port 2 selected Port 3 selected Port 4 selected Port 5 selected
SRQ is disabled SRQ on Service Input transition SRQ on EDR input transition SRQ on Bus error SRQ on Self-test error SRQ on Ready
Send Status information when next addressed to talk (*.*C#E#F#G#I###K#M###P#R#Y#) Read state of bit n (1 thru 40 )
CR LF LF CR CR only LF only
Test T0
Perform RAM and ROM test
A.2
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