Measurement CIO-DAS16M1 User Manual

CIO-DAS16/M1
User’s Manual
Revision 4 May, 2000
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HM CIO-DAS16_M1.docII
Measurement Computing Corp.
Table of Contents
1. SOFTWARE INSTALLATION.........................................................................................................................................................1
2. HARDWARE INSTALLATION........................................................................................................................................................1
2.1 BASE ADDRESS............................................................................................................................................................................1
2.2 USER-COUNTER CLOCK/CHAINING JUMPERS......................................................................................................................2
2.3 PACER CLOCK SOURCE SELECT JUMPER..............................................................................................................................2
2.4 INSTALLING THE CIO-DAS16/M1 IN THE COMPUTER.........................................................................................................3
2.5 PROGRAMMABLE RANGE AND GAIN SETTING...................................................................................................................3
3. SIGNAL CONNECTIONS..................................................................................................................................................................4
3.1 INTRODUCTION ...........................................................................................................................................................................4
3.2 ANALOG CONNECTOR DIAGRAM............................................................................................................................................4
3.2.1 Analog Inputs............................................................................................................................................................................5
3.2.2 Connecting Analog Inputs.........................................................................................................................................................5
1.1.3 Shielding ...................................................................................................................................................................................5
1.1.4 Grounded Signal Source........................................................................................................................................................... 5
1.1.5 Floating Signal Source..............................................................................................................................................................6
1.1.6 Avoiding Ground Loops............................................................................................................................................................6
1.3 DIGITAL OUTPUTS & INPUTS....................................................................................................................................................7
1.3.1 Digital Output Connector .........................................................................................................................................................7
1.3.2 Counter Clock Jumper..............................................................................................................................................................7
1.3.3 Cabling the Digital Connector..................................................................................................................................................7
4. REGISTER ARCHITECTURE........................................................................................................................................................10
4.1 DATA TRANSFERS.....................................................................................................................................................................10
4.2 FIFO DATA BUFFER...................................................................................................................................................................10
4.3 CHANNEL/GAIN QUEUE...........................................................................................................................................................10
4.4 CHANNEL/GAIN MEMORY CONTENTS REGISTER.............................................................................................................11
4.5 DT-CONNECT..............................................................................................................................................................................12
4.6 CONTROL & DATA REGISTERS...............................................................................................................................................12
4.6.1 A/D Data & Channel Registers...............................................................................................................................................14
4.6.2 Control & Status Bits..............................................................................................................................................................14
4.6.3 Four-Bit Digital I/O Registers................................................................................................................................................15
4.6.4 Clear Interrupt Status Register...............................................................................................................................................16
4.6.5 Interrupt Control, Pacer Source Register...............................................................................................................................16
4.6.6 Channel Gain Queue Address Register...................................................................................................................................17
4.6.7 Channel Gain Queue Data Register........................................................................................................................................18
4.6.8 Total Counter Data & Control Registers................................................................................... .............................................19
4.6.9 Digital I/O and Counter Control & Data Registers ...............................................................................................................20
4.6.10 82C55 Digital I/O Registers..................................................................................................................................................21
4.6.11 COUNTER CHIP (82C54)....................................................................................................................................................23
5. SPECIFICATIONS............................................................................................................................................................................24
6. ELECTRONICS AND INTERFACING..........................................................................................................................................27
6.1 COMMON MODE.........................................................................................................................................................................27
6.2 COMMON MISUNDERSTANDINGS.........................................................................................................................................28
6.3 GROUND
LOOPS.........................................................................................................................................................................28
6.4 PULL UP & PULL DOWN RESISTORS.....................................................................................................................................28
6.5 TTL TO SOLID STATE RELAYS................................................................................................................................................29
6.6 VOLTAGE DIVIDERS.................................................................................................................................................................30
6.7 LOW PASS FILTERS ...................................................................................................................................................................32
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1. SOFTWARE INSTALLATION
The board has a variety of switches and jumpers to set before installing the board in your computer. By far the simplest way to configure your board is to use the InstaCal software package. InstaCal
TM
will show you all available options, how to configure the various switches
TM
program provided as part of your
and jumpers to match your application requirements, and will create a configuration file that your application software (and the Universal Library) will refer to so the software you use will automatically know the exact configuration of the board.
Please refer to the Software Installation Manual regarding the installation and operation of InstaCal The following hard copy information is provided as a matter of completeness, and will allow you to set the hardware configuration of the board if you do not have immediate access to InstaCal
TM
and/or your
TM
.
computer
2. HARDWARE INSTALLATION
The CIO-DAS16/M1 has one bank of base address switches and four jumpers to set before installation of the board in your computer.
2.1 BASE ADDRESS
Unless there is already a board in your system which uses address 300h (768 decimal), leave the switches as they are set at the factory. In the example shown in Figure 2-1, the CIO-DAS16/M1 is set for base address 300h.
Figure 2-1. Base Address Switch
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2.2 USER-COUNTER CLOCK/CHAINING JUMPERS
The CIO-DAS16/M1 has three counters available to the user at the digital connector, P5. (A fourth counter is available at the analog connector, P1.) The three digital-connector counters are associated with registers Base + 404, +405, and +406. User-Counter 0 can be externally clocked by a jumper at JB2. It is adjacent to the digital connector and connects the internal 10 MHz OSC signal to Counter 0 clock input (Figure 2-2). Using two additional jumpers at JB2, the counters can be chained 0 to1, and 1 to 2 to yield counters of 32 or 48 bits. These counters can also be chained externally at the 40-pin digital connector, P5.
JB2
The on-board 10 MHz OSC signal can be connected
C0 (CLK 0) O0 (OUT 0) C1 (CLK 1) O1 (OUT 1) C2 (CLK 2)
Figure 2-2. User-Counter Clock Source and Chaining Jumpers
directly to the clock of CTR 0 by jumping OSC to C0.
The output of CTR 0 (O0) can be chained directly to the clock of CTR 1 (C1).
The output of CTR 1 (O1) can be chained directly to the clock of CTR 2 (C2).
2.3 PACER CLOCK SOURCE SELECT JUMPER
When using the internal clock for pacing, select the desired frequency of the source supplied to the pacer counters by setting the XTAL jumper for either 1 or 10 MHz (Figure 2-3). In most cases, 10MHz is the appropriate choice. Use the 1MHz option only if you are using the CIO-DAS16/M1 with software designed for the DAS16 (which would calculate pacer speed based on a 1MHz sourc to the pacer counters).
1 MHz
10 XTAL
Figure 2-3. Pacing Counter Frequency-Select Jumper
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2.4 INSTALLING THE CIO-DAS16/M1 IN THE COMPUTER
1. Turn the power off.
2. Remove the cover of your computer. Please be careful not to dislodge any of the cables installed on the boards in your computer as you slide the cover off.
3. Locate an empty expansion slot in your computer. If you plan to use the 24 bits of digital or three counters accessible through the rear connector, you should install the board in a slot with an available adjacent slot for the BP40-37 connector-cable-backplate assembly.
4. Push the board firmly down into the expansion bus connector. If it is not seated fully it may fail to work and could short circuit the PC bus power onto a PC bus signal. This could damage the motherboard in your PC or the board.
2.5 PROGRAMMABLE RANGE AND GAIN SETTING
The analog input range is fully programmable. There are no switches to set. The board has a channel/gain queue, that is programmed to align a channel and gain in a programmed channel scan sequence. Channel/Gain queue loading is handled by the Universal Library programming language library and by application programs which support the CIO-DAS16/M1.
Setting the channel gain queue is required prior to making any measurements with the CIO-DAS16/M1 so the concept of a default range value is meaningless.
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3. SIGNAL CONNECTIONS
3.1 INTRODUCTION
There are three connectors on th CIO-DAS16/M1. The 37-pin connector, P1, on the rear mounting plate is primarily for analog signals. It is referred to as the analog connector. The 40-pin header connector, P5, at the front of the board has 24 digital I/O lines. It also has clock, gate, and output signals for three counters associated with registers Base + 404, +405, and +406. It is referred to as the digital connector. The DT-Connect connector (P4) at the top of the board is included primarily for use with the MEGA­FIFO huge sample buffer, which may be required to attain the maximum acquisition rate.
3.2 ANALOG CONNECTOR DIAGRAM
The CIO-DAS16/M1 analog connector is a 37-pin, D-type connector accessible from the rear of the PC on the expansion backplate. The connector accepts female 37-pin D-type connectors, such as the C37FF­2, a 2-foot cable. The Counter 0 signals are associated with the register at Base + C. The CTR 2 OUT signal is the internal PACER sign al (reg is ters at Base + D, +E, and +F.)
Figure 3-1. Analog Connector Pin Out
If frequent changes to signal connections or signal conditioning is required, please refer to the information on the CIO-MINI37, CIO-TERMINAL, or SCB-37 screw terminal board.
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3.2.1 Analog Inputs
The CIO-DAS16/M1 has eight differential analog input channels. Each channel has a signal-high input and a signal-low input. The measurement made by the A/D is the voltage difference between the LOW and HIGH inputs. Differential inputs have a common mode range (see application note). The CIO­DAS16/M1 can have as much as 10V of common mode voltage between LLGND and signal LOW.
CAUTION Measure the voltage between the ground signal at the signal source and the PC. Use a voltmeter and place the red probe on the PC ground and the black probe on the signal ground. If there is more than 10 volts, do not connect the CIO-DAS16/M1 to this signal source because you will not be able to make any reading. If the voltage is over 20V, DO NOT connect this signal because it will damage the board .
3.2.2 Connecting Analog Inputs
Connect analog inputs as shown in Figure 3-2 below. Pay close attention to cabling and grounding of the shield.
NOTE: Failure to cable as recommended will cause less than perfect readings. Perform signal wiring with consideration to the high speeds involved. Even if your A/D pacing rate is not high, the converter is always converting at less than 1µs and the internal MUX switching is done at a similar high speed.
NOTE: Keep high and low wires together. Keep the signal wires for a channel together. Ideally, they should be a twisted pair. This will aid the differential inputs in rejecting EMI or RFI from input signals.
Failure to cable as shown will result in signal noise
.
3.2.3 Shielding
To further protect the input signals from noise, use shielded cable. Shielded twisted-pair cable is readily available. Connect the shield as in the diagrams below or ground loops and signals noise may result.
3.2.4 Grounded Signal Source
A grounded signal source has the low signal referenced to chassis ground. If an instrument has only two poles, HI and LOW, it is probably referenced to chassis ground internally. Check with an Ohmmeter between LOW and the power cord ground prong. If an instrument has three poles, a HI, LOW and GND, you can strap LO to GND as shown here, or use the connection for Floating Signal Source.
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Instrument
Signal High
Signal Low
Tie Low to GND
CIO-DAS16/M1/16
Shielded Cable
Channel # High Channel # Low
GND
GROUNDED SIGNAL SOURCE - Suggested way to connect signal and cable shield. Ground is completed through power ground. Voltage between outlet grounds not to exceed the common mode range.
LLGND
Figure 3-2. Cable Shield Grounding
3.2.5 Floating Signal Source
A floating signal source is defined as the low signal having no reference to earth ground (PC Chassis ground or LLGND). Examples are a battery, an isolated precision power supply or a sensor which is not earth grounded. See Figure 3-3 for a connection diagram.
Shielded Cable
Signal High
Signal Low
CIO-DAS16/M1/16
Channel # High Channel # Low
10K
LLGND
FLOATING SIGNAL SOURCE - Suggested way to connect signals and cable shield. Connection is made to Earth ground through power ground.
Figure 3-3. Floating Signal Source Referenced to Ground
A reference between signal LOW and LLGND must be provided bec ause board inputs are differential. Failure to supply the reference (10K resistor) will result in unrepeatable readings.
3.2.6 Avoiding Ground Loops
Figure 3-4 shows the wrong way to connect a floating signal and create a ground loop. Any current caused by a voltage potential between the grounds will be sufficient to interfere with signal readings
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Instrument
Shielded Cable
Signal High
Signal Low
Ground Loop Created Here
WRONG WAY! - This is the wrong way to connect cable shield.
CIO-DAS16/M1/16
Channel # High Channel # Low
LLGND
Figure 3-4. Wrong Way to Connect a Signal
3.3 DIGITAL OUTPUTS & INPUTS
All the digital outputs and inputs on the CIO-DAS16/M1 are TTL level. TTL is an electronics industry term, short for Transistor Transistor Logic, which describes a standard for digital signals which are either at 0V or 5V (nominal). To control or sense any device other than TTL IC chips, please use appropriate signal conditioning, such as solid state relays or electromechanical relays. See the Measurement Computing catalog for SSR­RACK24 and CIO-ERB24 interface accessories.
3.3.1 Digital Output Connector
A second connector at the rear of the board contains signals from one 82C55 and one 82C54. The 24 bits of digital I/O (82C55) and nine counter/timer signals (from three counters of an 82C54) are available to the user for on/off control, pulse width and frequency measurement and general counting.
The 82C54 is a 10MHz (max) down-counter chip having three 16-bit counters. The input, gate and output signals of the counters are brought out to the connector and on-board clock-select and chaining jumpers. Together, the 24 digital I/O, and the counters use eight I/O addresses. The lower four (Base + 400, through +403 are used for the 82C55 digital I/O and the upper four (Base + 404 through +407) are used for the 82C54 user-counter timer.
3.3.2 Counter Clock Jumper
The board has a row of three jumpers adjacent to P5 that allow the 10 MHz [XTAL] OSCillator signal to be connected to counter 0 input, and the counters to be chained 0 to1, and 1 to 2. In this way, a counter of 32 or 48 bits can be constructed from the three 16-bit counters of the 82C54. The counters can also be chained externally via the 40-pin connector.
3.3.3 Cabling the Digital Connector
The digital/counter connector is a 40-pin header located at the rear of the CIO-DAS16/M1 board. It is pinned out such that when connected to a 37-pin connector via a BP40-37, the 37-pin connector's pin-outs are nearly identical to that of the CIO-DIO24/CTR3 (Figure 3-5). When using the BP40-37, the digital/counter I/O connector is a 37-pin D-type connector accessible from the rear of the PC through the
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expansion backplate. If you need compatibility with this product, we recommend that you purchase the BP40-37 cable when using the digital connector, P5.
If compatibility with the CIO-DIO24/CTR3 is not required, you can make direct connection to a CIO­MINI40 screw terminal board using a C40FF-2 cable.
The signals available are direct connections to an 82C55 digital I/O chip and an 82C54 counter chip. Figure 3-5 is the pin out of a BP40-37 connected to the digital/counter connector.
Figure 3-6 is the pin out of P5.
Figure 3-5. Digital Connector - Pin Out of BP40-37
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