Measurement CIO-DAS08-PGH User Manual

CIO-DAS08-PGH

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CIO-DAS08-PGM

CIO-DAS08-PGL

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ital I/O

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Revision 9

October, 2000

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TABLE OF CONTENTS

1: INTRODUCTION

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1.1 SOFTWARE INSTALLATION

1.2 HARDWARE INSTALLATION

2: SIGNAL CONNECTION

2.1 CONNECTOR DIAGRAM

2.2 DIFFERENTIAL INPUTS

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2.3 DIGITAL OUTPUTS & INPUTS

3: ANALOG CONNECTIONS

3.1 ANALOG INPUTS

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3.2 WIRING CONFIGURATIONS

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4: REGISTER ARCHITECTURE

4.1 CONTROL & DATA REGISTERS

4.2 A/D DATA REGISTER

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4.3 STATUS AND CONTROL REGISTER

4.4 PROGRAMMABLE GAIN REGISTER

4.5 COUNTER LOAD & READ REGISTERS

4.6 COUNTER CONTROL REGISTER

4.7 COUNTER/TIMER

4.8 DIGITAL INPUT

4.9 DIGITAL OUTPUT

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4.10 TRIGGER & INTERRUPT LOGIC

5: SPECIFICATIONS

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1: INTRODUCTION

There are three versions of the CIO-DAS08-PGx board, CIO-DAS08-PGL, CIO-DAS08-PGH and CIO-DAS08-PGM. (The
CIO-DAS08-PGM duplicates MetraByte DAS-8PGA ranges and codes). These versions will be referred to as CIO-DAS08-PGx
throughout this manual except where the differences between the versions require specifying a particular version.

If you have one of these boards and are not sure which one, you can identify the -PGH or -PGL versions by noting the part number
of the amplifier. The amplifier, U6, is located approximately in the center of the board. The part number of the amplifier on the

-PGH version is PGA202. The part number of the amplifier on the -PGL version is PGA203. Call the factory for aid in
identifying the -PGM version.

The CIO-DAS08-PGx boards are an extension of the popular CIO-DAS08 architecture. The boards are identical at the register
level, performance, and connector, with the following exceptions:

1. Gains are programmable as follows:
a. CIO-DAS08-PGM gains are 0.5, 1, 10, 100, and 500.
b. CIO-DAS08-PGH gains are 0.5, 1, 5, 10, 50, 100, 500, and 1000.
c. CIO-DAS08-PGL gains are 0.5, 1, 2, 4, and 8.

2. Analog inputs are differential. (However, provision has been made to add resistors to convert the inputs to
pseudo-single-ended mode.) To maintain compatibility with signal conditioning boards such as the CIO-EXP16, an
optional SIP resistor provides ground reference to the CH# Low inputs.

3. A stable crystal (“XTAL”) oscillator provides the A/D pacer clock pulse. To give compatibility with programs written for
the AD08, a jumper selects either the stable XTAL or the PC Bus clock.

4. A DC/DC converter supplies stable ±15VDC power to the analog circuitry. The board can be ordered without the
DC/DC converter. This reduces the cost but limits the ranges of analog inputs. It is available only on orders of ten or
more units.

5. There is only one connector on the board.

1.1 SOFTWARE INSTALLATION

Before you open your computer and install the board, install and run InstaCal, the installation, calibration and test utility included
with your board. InstaCal will guide you through switch and jumper settings for your board. Detailed information regarding these
settings can be found below. Refer to the Software Installation manual for InstaCal installation instructions.

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1.2 HARDWARE INSTALLATION

1.2.1 Base Address

The base address of the CIO-DAS08-PGx is set by switching a bank of DIP
switches on the board (Figure 1-1). This bank of switches is labeled
ADDRESS and numbered 9 to 3.

Ignore the word ON and the numbers printed on the switch

The switch works by adding up the weights of individual switches to make a
base address. A 'weight' is active when the switch is down. Shown here,
switches 9 and 8 are down, all others are up. Weights 200H and 100H are
active, equaling 300H base address. The board is shipped with this default
address selected. If this address is already in use on your computer, select a
different address. Figure 1-1. Base address Select Switches

Table 1-1 lists the address ranges for the PC computer.

Table 1-1. Base Addresses

FUNCTIONHEX RANGEFUNCTIONHEX RANGE

EGA2C0-2CF8237 DMA #1000-00F
EGA2D0-2DF8259 PIC #1020-021
GPIB (AT)2E0-2E78253 TIMER040-043
SERIAL PORT2E8-2EF8255 PPI (XT)060-063
SERIAL PORT2F8-2FF8742 CONTROLLER (AT)060-064
PROTOTYPE CARD300-30FCMOS RAM & NMI MASK (AT)070-071
PROTOTYPE CARD310-31FDMA PAGE REGISTERS080-08F
HARD DISK (XT)320-32F8259 PIC #2 (AT)0A0-0A1
PARALLEL PRINTER378-37FNMI MASK (XT)0A0-0AF
SDLC380-38F8237 #2 (AT)0C0-0DF
SDLC3A0-3AF80287 NUMERIC CO-P (AT)0F0-0FF
MDA3B0-3BBHARD DISK (AT)1F0-1FF
PARALLEL PRINTER3BC-3BFGAME CONTROL200-20F
EGA3C0-3CFEXPANSION UNIT (XT)210-21F
CGA3D0-3DFBUS MOUSE238-23B
SERIAL PORT3E8-3EFALT BUS MOUSE23C-23F
FLOPPY DISK3F0-3F7PARALLEL PRINTER270-27F
SERIAL PORT3F8-3FFEGA2B0-2BF

1.2.2 Interrupt Level Select

The interrupt jumper need only be set if the software you are using
requires it. If you do set the interrupt jumper, please check your PC's
current configuration for interrupt conflicts, and do not use IR2 in PC/AT
class machines (or higher).

There is a jumper block on the CIO-DAS08-PGx located just above the
PC bus interface (gold pins). The factory default setting is that no
interrupt level is set. The jumper is in the 'X' position (Figure 1-2).

If you need to pace conversions through hardware (either the on - board
pacer or an external clock), move this jumper to one of the other positions
(see table 1-2). Figure 1-2. Interrupt Select Jumper Block

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INTERRUPT JUMPER BLOCK - Jumper in
X position = No IRQ.

234567X

The following table shows some typical interrupt assignments on a PC. The CIO-DAS08-PGx use interrupt levels 2 through 7.
The levels most often available are 5 and 7.

Table 1-2. IRQ Assignments

DESCRIPTIONNAMEDESCRIPTIONNAME

REAL TIME CLOCK (AT)IRQ8PARITYNMI
RE-DIRECTED TO IRQ2IRQ9TIMERIRQ0 (AT)
UNASSIGNEDIRQ10KEYBOARDIRQ1

IRQ2

UNASSIGNEDIRQ11RESERVED (XT)

INT 8-15 (AT)

UNASSIGNEDIRQ12COM OR SDLCIRQ3
80287 NUMERIC CO-PIRQ13COM OR SDLCIRQ4
HARD DISKIRQ14HARD DISK (XT) or LPT (AT)IRQ5
UNASSIGNEDIRQ15FLOPPY DISKIRQ6

LPTIRQ7

NOTE: IRQ8-15 are AT only.

1.2.3 XTAL/PC Bus Clock Jumper

The A/D pacer clock sources for the MetraByte DAS-8PGA differs from the DAS-8.
The source for the DAS-8PGA is fixed at 1 MHz while the source for the DAS-8 gets
its clock pulse from the PC Bus Clock.

1 MHz

CLK
BUS

The CIO-DAS08-PGx pacer clock is selected by jumper to satisfy software written
for either board (Figure 1-3). The default choice for this jumper is the 1 MHz
position. You can alternately select the PC Bus Clock as the source for the A/D pacer
clock.

CLOCK SOURCE JUMPER - For a
standard DAS-8PGA 1 MHz A/D
Pacer Clock, place the jumper on the
two leftmost pins. For a DAS-8 type
A/D Pacer from PC Bus Clk, place the
jumper on the two rightmost pins.

Figure 1-3. Pacer Clock Select Jumper

1.2.4 Wait State

A wait state can be enabled on the CIO-DAS08-PGx by selecting WAIT STATE ON
at the jumper provided on the board. Enabling the wait state causes the personal

O

O

F

N

F

computer's bus transfer rate to slow down for board reads and writes ..

The wait state jumper is provided in case your computer ever has an I/O bus transfer
rate which is too fast for the CIO-DAS08-PGA. If your board were to fail sporadically
in random ways, try selecting the wait state ON.

WAIT STATE JUMPER BLOCK - A
wait state is not selected on this

jumper block. For a wait state,
place the jumper on the two
leftmost pins.

Figure 1-4. Wait State Jumper Block

1.2.5 Installing The CIO-DAS08-PGx In The Computer

1. Turn the power off.

2. Remove the cover of your computer. Please be careful not to dislodge any of the cables installed on the boards in your
computer as you slide the cover off.

3. Locate an empty expansion slot in your computer.

WAIT
STATE

4. Push the board firmly down into the expansion bus connector. If it is not seated fully it may fail to work and could short circuit
the PC bus power onto a PC bus signal. This could damage the motherboard in your PC as well as the board.

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2.1 CONNECTOR DIAGRAM

The analog connector is a 37-pin, D-type connector accessible from the rear of
the PC through the expansion backplate (Figure 2-1).

2: SIGNAL CONNECTION

The connector accepts female 37 D-type connectors, such as those on the
C73FF-2, 2 foot cable with connectors.

If frequent changes to signal connections or signal conditioning is required,
please refer to the information on the CIO-TERMINAL and CIO-MINI37
screw terminal boards, CIO-EXP32, 32 channels analog MUX/AMP. Isolation
amplifiers can be mounted using the ISO-RACK08 and 5B isolation modules.

2.2 DIFFERENTIAL INPUTS

Differential inputs are 3-wire analog hookups consisting of a signal high, signal
low and chassis ground. The benefits of differential inputs are the ability to

CH0 LO 19
CH1 LO 18
CH2 LO 17
CH3 LO 16
CH4 LO 15
CH5 LO 14
CH6 LO 13
CH7 LO 12

LLGND 11

DIGITAL OUT 4 10

DIGITAL OUT 3 9
DIGITAL OUT 2 8

DIGITAL OUT 1 7
COUNTER 2 OUT 6
COUNTER 1 OUT 5

COUNTER 1 IN 4

COUNTER 0 OUT 3

COUNTER 0 IN 2

+15 FROM DC/DC 1

37 CH0 HIGH
36 CH1 HIGH
35 CH2 HIGH
34 CH3 HIGH
33 CH4 HIGH
32 CH5 HIGH
31 CH6 HIGH
30 CH7 HIGH
29 +5 VOLTS
28 DIG GND
27 DIGITAL IN 3
26 DIGITAL IN 2
25 DIGITAL IN 1
24 INTERRUPT INPUT
23 GATE 2
22 GATE 1
21 GATE 0
20 -15V FROM DC/DC

reject noise which affects both signal high and low, and the ability to
compensate for ground loops or potentials between signal low and chassis
ground.

Figure 2-1. Analog Connector

Although differential inputs are often preferable to single ended inputs, there are occasions when the floating nature of a
differential input can confound attempts to make a reading. In those cases, the inputs can be converted to modified differential.

Examine the diagram of the CIO-DAS08-PGx board. Near the 37-pin connector is located a position for an optional Single Inline
Package (SIP) of resistors. Installing the SIP converts the analog inputs from fully differential to modified differential with a
resistive reference to ground. A SIP resistor network is included with the board for this purpose.

NOTE:

When using the CIO-DAS08-PGx with the CIO-EXP16 or CIO-EXP32, the optional SIP resistor must be
installed. The CIO-EXP16 and CIO-EXP32 (and MetraByte EXP16) were designed to interface to a single-ended input.
Failure to install the SIP resistor when the board is used with these expansion boards will result in floating, unstable
readings.

Special instructions and solder are packaged with the SIP resistor. Follow the installation instructions carefully
and use the solder provided. Use of any other solder, or failure to follow instructions can result in a degradation
of the analog input's accuracy and may require out-of-warranty repair

.

2.3 DIGITAL OUTPUTS & INPUTS

All the digital outputs inputs on the CIO-DAS08-PGx are TTL level. TTL is an electronics industry term, short for Transistor
Transistor Logic, with describes a standard for digital signals which are either at 0V or 5V.

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3: ANALOG CONNECTIONS

3.1 ANALOG INPUTS

Prior to jumping into actual connection schemes, you should have at least a basic understanding of Single-Ended/Differential
inputs and system grounding/isolation. If you are already comfortable with these concepts you may wish to skip to the next section
(on wiring configurations).

3.1.1 Single-Ended and Differential Inputs

The CIO-DAS08-PGx provides either 8 differential or 16 single-ended input channels. The concepts of single-ended and
differential inputs are discussed in the following section

Single-Ended Inputs

A single-ended input measures the voltage between the input signal and ground. In this case, in single-ended mode the
CIO-DAS08-PGx measures the voltage between the input channel and LLGND. The single-ended input configuration requires
only one physical connection (wire) per channel and allows the board to monitor more channels than the differential configuration
using the same connector and onboard multiplexer (Figure 3-1). However, since the CIO-DAS08-PGx is measuring the input
voltage relative to its own low level ground, single-ended inputs are more susceptible to both EMI (electro magnetic interference)
and any ground noise at the signal source. The following diagrams show the single-ended input configuration. Note: For
simplicity, the input multiplexer is not shown.

.

Figure 3-1. Single-Ended Input Configuration (Simplified)

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