Measurement CIO-DAC0816 User Manual

Page 1
CIO-DAC08/16
and
CIO-DAC16/16
User’s Manual
Revision 6
April, 2001
Page 2
MEGA-FIFO, the CIO prefix to data acquisition board model numbers, the PCM prefix to data acquisition board model numbers, PCM-DAS08, PCM-D24C3, PCM-DAC02, PCM-COM422, PCM-COM485, PCM-DMM, PCM-DAS16D/12, PCM-DAS16S/12, PCM-DAS16D/16, PCM-DAS16S/16, PCI-DAS6402/16, Universal Library, InstaCal, Harsh Environment Warranty and Measurement Computing Corporation are registered trademarks of Measurement Computing Corporation.
IBM, PC, and PC/AT are trademarks of International Business Machines Corp. Windows is a trademark of Microsoft Corp. All other trademarks are the property of their respective owners.
Information furnished by Measurement Computing Corp. is believed to be accurate and reliable. However, no responsibility is assumed by Measurement Computing Corporation neither for its use; nor for any infringements of patents or other rights of third parties, which may result from its use. No license is granted by implication or otherwise under any patent or copyrights of Measurement Computing Corporation.
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form by any means, electronic, mechanical, by photocopying, recording
or otherwise without the prior written permission of Measurement Computing Corporation.
Notice
Measurement Computing Corporation does not authorize any Measurement Computing Corporation product for use in life support systems and/or devices without the written approval of the President of Measurement Computing Corporation Life support devices/systems are devices or systems which, a) are intended for surgical implantation into the body, or b) support or sustain life and whose failure to perform can be reasonably expected to result in injury. Measurement Computing Corp. products are not designed with the components required, and are not subject to the testing required to ensure a level of reliability suitable for the treatment and diagnosis of people.
(C) Copyright 2001, Measurement Computing Corporation
HM CIO-DAC##_16.lwp
Page 3
Table of Contents
1.0 INTRODUCTION
2.0 SOFTWARE INSTALLATION
3.0 HARDWARE INSTALLATION
4.0 REGISTER ARCHITECTURE
5.0 SPECIFICATIONS
................................................
..............................................
.....................................
....................................
.....................................
1 1 2
23.1 BASE ADDRESS ...............................................
43.2 ANALOG OUTPUT RANGE JUMPERS ............................
43.3 UNIPOLAR/BIPOLAR INITIAL ZERO STATE JUMPER ..............
53.4 SIMULTANEOUS UPDATE JUMPER ..............................
63.5 INSTALLING THE BOARDS IN THE COMPUTER ..................
63.6 CABLING TO THE BOARD ......................................
73.7 SIGNAL CONNECTION .........................................
83.8 CONNECTOR DIAGRAM .......................................
9
94.1 CONTROL & DATA REGISTERS .................................
104.2 OUTPUT TRANSFER FUNCTIONS ..............................
12
Page 4
This page is blank.
Page 5
1.0 INTRODUCTION
The CIO-DAC16/16 is a 16-channel analog output board. The CIO-DAC08/16 is an 8-channel analog output board. The analog outputs are from AD660BNs with each output buffered by an OP-27.
The analog outputs are controlled by writing a digital control word as two bytes to the DAC's control register. The control register is double buffered so the DAC's output is not updated until the second byte (the high byte) has been written.
The analog outputs may also be set for simultaneous update by selecting XFER on jumper J18. This jumper applies to all DACs.
When the DACs are set for simultaneous update, writing new digital values to a DAC's control register does not cause an update of the DAC's voltage output. Update of the output occurs only after a READ from the board's addresses (any address from base + 0 through base + 31, or through base +15 for the DAC08).
2.0 SOFTWARE INSTALLATION
The CIO-DAC##/16 is supplied with InstaCal. InstaCal is an installation, calibration and test package. Use it to guide the installation procedure. InstaCal also creates a configuration file required for programmers who have purchased the Universal Library programming libraries. Refer to the Software Installation Manual for complete instructions. If you decide not to use InstaCal as a guide, the information required for configuring the board is provided in the following section.
1
Page 6
3.0 HARDWARE INSTALLATION
The CIO-DAC16/16 and DAC08/16 each has one bank of range jumpers, a single unipolar/bipolar jumper, one base address switch and a simultaneous update jumper which must be set before installing the board in your computer. The InstaCal program included with both boards shows how these switches are set. Run this program before
you open your computer.
We recommend you perform the software installation described in sections below prior to installing the board in your computer. The
InstaCal
switches and jumpers on the board prior to physically installing the board in your computer.
The CIO-DAC16/16 is setup at the factory with:
BASE ADDRESS 300h (768 decimal) SIMULTANEOUS UPDATE In the UPDATE position. Single channel update. ANALOG OUTPUT ±5V UNI / BIP JUMPER BIP
3.1 BASE ADDRESS
Unless there is already a board in your system which uses address 300h (768 decimal) leave the switches as they are set at the factory. The base address switch for the CIO-DAC16/16 is shown here, set to 300 hex. The CIO-DAC08/16 has one additional switch on the base address switch bank (A4 with a weight of 10 hex).
TM
program provided will show yo u ho w to p rope rly set th e
Figure 3-1. Base Address Switches (Set to 300h)
The address switches may be set for a base address in the range of 000-3E0 (3F0 for the DAC08) so it should not be hard to find a free address area. Once again, if you are not using IBM prototyping cards or some other board which occupies these addresses, then 300-31Fh are free to use. Addresses not specifically listed, such as 390-39F, are free.
Refer to table 3-1 for PC I/O address usage.
2
Page 7
RANGE
070-071
Table 3-1. PC I/O Addresses
FUNCTIONHEX
CMOS RAM & NMI MASK (AT)
FUNCTIONHEX
RANGE
EGA2C0-2CF8237 DMA #1000-00F EGA2D0-2DF8259 PIC #1020-021 GPIB (AT)2E0-2E78253 TIMER040-043 SERIAL PORT2E8-2EF8255 PPI (XT)060-063 SERIAL PORT2F8-2FF8742 CONTROLLER (AT)060-064 PROTOTYPE CARD300-30F PROTOTYPE CARD310-31FDMA PAGE REGISTERS080-08F HARD DISK (XT)320-32F8259 PIC #2 (AT)0A0-0A1 PARALLEL PRINTER378-37FNMI MASK (XT)0A0-0AF SDLC380-38F8237 #2 (AT)0C0-0DF SDLC3A0-3AF80287 NUMERIC CO-P (AT)0F0-0FF MDA3B0-3BBHARD DISK (AT)1F0-1FF PARALLEL PRINTER3BC-3BFGAME CONTROL200-20F EGA3C0-3CFEXPANSION UNIT (XT)210-21F CGA3D0-3DFBUS MOUSE238-23B SERIAL PORT3E8-3EFALT BUS MOUSE23C-23F FLOPPY DISK3F0-3F7PARALLEL PRINTER270-27F SERIAL PORT3F8-3FFEGA2B0-2BF
3
Page 8
3.2 ANALOG OUTPUT RANGE JUMPERS
The analog output voltage range of each channel is set with a jumper. The jumpers are located on the board directly below the calibration potentiometers and are labeled J1 through J8 on the DAC08 and. J1 through J16 on the DAC16.
Set the jumpers for an individual channel as shown in Figure 3-2.
Figure 3-2. Range Jumpers
The available ranges are:
0 to 5V (Unipolar) 0 to 10V (Unipolar) ±5V (Bipolar) ±10V (Bipolar)
3.3 UNIPOLAR/BIPOLAR INITIAL ZERO STATE JUMPER
The CIO-DAC16/16 and DAC08/16 boards have a unipolar/bipolar jumper which selects the unipolar/bipolar initial zero state of the DAC output on either power-up or reset. There is a single jumper for the entire board (Figure 3-3). This jumper is located near the ISA bus connector.
At power-up, the value in the DACs will be set according to Table 3-2.
Table 3-2. DAC Initial States at Power-up
If DAC set for
Bipolar Output
Minus Full Scale0.0000UNI
0.000Mid Scale32768BIP
Jumper
DAC CodeState of UNI/BIP
IF DAC set for
Unipolar Output
4
Page 9
This jumper affects ONLY the power-up / reset condition of the DACs. It is here to insure that when the computer is turned on, or, if the computer is reset, process controls will come up in a known, safe state.
Figure 3-3. Initial State Range Select Jumper Positions
If your application requires that the output of all DACs maintain a zero state initially, you should use simultaneous update mode. This mode allows you to set the value stored in the output registers before the output voltage is updated. If individual update mode is used, the value of all DAC outputs will be updated to whatever value is stored in the output registers at the moment that the first DAC is updated. This value is undefined but typically will be + full scale (register value = FFFFh).
Using the simultaneous mode allows you to set the values of all registers before any of the DACs are updated to the register value.
3.4 SIMULTANEOUS UPDATE JUMPER
This jumper selects either individual DAC update when the MSB register is written (UPDATE) or simultaneous transfer of data to all DAC outputs on a read (XFER). In simultaneous transfer mode, new output data is loaded into the DAC registers, but the DAC outputs do not change until one of the registers have been read. The simultaneous update occurs whenever any of the CIO-DAC16/16 addresses BASE + 0 through BASE + 31 (or addresses BASE + 0 through BASE + 15 for the DAC08) are read (Figure 3-4).
Figure 3-4. Simultaneous Update Jumper
5
Page 10
Note: Use simultaneous update to maintain power-up state (see section on “Initial Zero State Jumper”).
In this way, the CIO-DAC16/16 and DAC08/16 may be set to hold new values until all channels are loaded, then update all sixteen simultaneously. This can be a very useful feature for multi-axis motor control.
3.5 INSTALLING THE BOARDS IN THE COMPUTER
1. Turn the power off.
2. Remove the cover of your computer. Please be careful not to dislodge any of the cables installed on the boards in your computer as you slide the cover off.
3. Locate an empty expansion slot in your computer.
4. Push the board firmly down into the expansion bus connector. If it is not seated fully it may fail to work and could short circuit the PC bus power onto a PC bus signal. This could damage the motherboard or your board.
3.6 CABLING TO THE BOARD
The CIO-DAC16/16 and the DAC08/16 connectors are accessible through the PC/AT expansion bracket. The connector is a standard 37-pin, D-type male connector. A mating female connector, such as the C37FF-2, is available from Measurement Computing.
Several cabling and screw termination options are available.
Table 3-3. Cable Termination Options
DFCON-37
C37FF-2
C37FFS-5
CIO-TERMINAL
D connector, D shell and termination pins to construct your own cable.
Two-foot (and longer) ribbon cable with 37-pin D connectors. Five-foot shielded round cable with molded ends housing 37-pin connectors. Also available in 10-ft. length. Simple, 40-position, 4" x 4" screw terminal board.CIO-MINI37
Full featured 4" x 16" screw terminal board with prototyping and interface circuitry.
6
Page 11
3.7 SIGNAL CONNECTION
The analog outputs of the CIO-DAC16/16 and the DAC08/16 are two-wire hook-ups; a signal, labeled D/A # OUT on the connector diagram after this section, and a Low Level Ground (LLGND). The low level ground is an analog ground and is the ground reference which should be used for all analog hook-ups.
Possible analog output ranges are:
Bipolar Ranges ±10V ±5V and Unipolar Ranges 0 to 10V 0 to 5V
Each of the DAC outputs are individually buffered through an OP-27 operational amplifier (OP-AMP). The OP-27s are socketted so that if one goes bad it can be replaced in the field. The OP-27 for each channel is located just below the calibration potentiometers for that channel.
Each channel is capable of sinking or sourcing ±5 mA. That means a load of 2K Ohms can be connected to each channel at the full rated output swing of +10V.
As the load resistance is raised from 2K up to 10 MegΩ or more, the output load on the DAC decreases. Any resistance greater than 2K is acceptable.
As the load resistance decreases, the output load increases. The OP-27 responds by producing a lower output voltage. If your DAC board will not produce the output voltage specified by the code & range combination, check the load with an ohmmeter.
Under normal circumstances you will not damage the OP-27 by connecting the output to ground. If your connection results in a failure of the OP-27, chances are good that there was some potential at the connecting point in addition to a load at ground or between 0 and 2K ohms. Explore the point with a DVM before reconnecting the CIO-DAC16/16 or DAC08/16 (and after replacing the OP-27 of course). Connect the negative lead of the DVM to any LLGND pin of the CIO-DAC16/16 or DAC08/16.
7
Page 12
3.8 CONNECTOR DIAGRAM
Both the CIO-DAC16/16 and DAC08/16 are 37 pin D type connectors accessible from the rear of the PC through the expansion backplate.
The connector accepts female 37-pin, D-type connectors, such as those on the C37FF-2, a 2-foot cable with connectors.
If frequent changes to signal connections or signal conditioning is required, please refer to the information on the CIO-TERMINAL, CIO-SPADE50 and CIO-MINI37 screw terminal boards in the Measurement Computing catalog.
8
Page 13
4.0 REGISTER ARCHITECTURE
The CIO-DAC16/16 and DAC08/16 are simple boards to understand right down to their lowest level. All control and data is read/written with simple I/O read and write signals. No interrupt or DMA control software is required. Thus, the board's functions are easy to control directly from BASIC, C or PASCAL.
4.1 CONTROL & DATA REGISTERS
The CIO-DAC16/16 has 32 analog output registers, the CIO-DAC08/16 has 16. There are two for each channel, one for the lower eight bits and one for the upper eight bits.
The first address, or BASE ADDRESS, is determined by setting a bank of switches on the board.
A register is easy to read and write to. The register descriptions all follow the format:
01234567
A0A1A2A3A4A5A6A7
Where the numbers along the top row are the bit positions within the 8-bit byte and the numbers and symbols in the bottom row are the functions associated with that bit.
To write to or read from a register in decimal or HEX, the bit weights in Table 4-1 apply:
Table 4-1. Bit Weights
HEX VALUEDECIMAL VALUEBIT POSITION
110 221 442
883 10164 20325 40646 801287
To write a control word or data to a register, the individual bits must be set to 0 or 1 then combined to form a Byte. Data read from registers must be analyzed to determine which bits are on or off. The method of programming required to set/read bits from bytes is beyond the scope of this manual. Refer to a basic book on programming.
9
Page 14
In summary form, the registers and functions are listed in Table 4-2. Each register has eight bits which may constitute a byte of data or eight individual bit functions.
Table 4-2. Register Summary
READ FUNCTIONWRITE FUNCTIONADDRESS
Initiate simultaneous update.D/A 0 Least Significant ByteBASE + 0 Initiate simultaneous update.D/A 0 Most Significant ByteBASE + 1 Initiate simultaneous update.D/A 1 Least Significant ByteBASE + 2 Initiate simultaneous update.D/A 1 Most Significant ByteBASE + 3 Initiate simultaneous update.D/A 2 Least Significant ByteBASE + 4 Initiate simultaneous update.D/A 2 Most Significant ByteBASE + 5 Initiate simultaneous update.D/A 3 Least Significant ByteBASE + 6 Initiate simultaneous update.D/A 3 Most Significant ByteBASE + 7 Initiate simultaneous update.D/A 4 Least Significant ByteBASE + 8 Initiate simultaneous update.D/A 4 Most Significant ByteBASE + 9 Initiate simultaneous update.D/A 5 Least Significant ByteBASE + 10 Initiate simultaneous update.D/A 5 Most Significant ByteBASE + 11 Same.And so on for each DACBASE + #
The DAC16 contains 32 registers (16 register pairs). The DAC08 contains 16 registers. Each register pair controls 1 D/A output.
Each DAC has two 8-bit registers which are used to control it. The first register contains the least significant eight bits of D/A code and should be written first.
01234567
LSBD14D13D12D11D10D9D8
The second register contains the most significant eight bits of D/A code and should be written to last. A write to this register will update the output of the D/A with all 16 bits of the D/A code contained in the two registers. If the simultaneous update jumper is set for XFER, no update will occur until a read of any one of the DAC registers is executed. Upon a read, all DACs will update together.
01234567
D7D6D5D4D3D2D1MSB
4.2 OUTPUT TRANSFER FUNCTIONS
To program a DAC, you must select the output you desire in volts, then apply a transfer function to that value. The transfer function for code = output is:
The UNIPOLAR transfer function of the DAC is:
10
Page 15
FSV / 65,536 * CODE = OutV or CODE = OutV / FSV * 65,536
For Example:
If the range is 0 to 5V CODE = 2/5 * 65,536 and you desire a 2V output. CODE = 26,214
The BIPOLAR transfer function for the DAC is: FSV/65,536 * CODE − 0.5 * FSV or CODE = (OutV + 0.5 * FSV) / FSV * 65,536
For example:
If the range is set to ±10 CODE = (7V + 0.5 * 20) / 20 * 65,536 and you desire a 7V output. CODE = 9,830
11
Page 16
5.0 SPECIFICATIONS
Power Consumption
+5V supply
CIO-DAC16/16 1.8A typical, 2.25 max CIO-DAC08/16 1.3A typical, 1.7A max
Analog Output
Resolution 16 bits Number of channels
CIO-DAC16/16 16 Voltage Output
CIO-DAC08/16 8 Voltage Output D/A type AD660BN Voltage Ranges ±5V, ±10V, 0 to 5V, 0 to 10V, jumper
selectable Offset error Adjustable to zero Gain error Adjustable to zero Differential nonlinearity ±1LSB max Integral nonlinearity ±1LSB max Monotonicity Guaranteed monotonic to 15 bits over
temperature Gain drift (DAC) ±15 ppm/°C max Bipolar offset drift (DAC) ±5 ppm/°C max Unipolar offset drift (DAC) ±3 ppm/°C max Throughput System dependant Slew Rate 2.8 V/µS Typical Settling time (20V step to .0008%) 12µs typ, 19us max Settling time (10V step to .0008%) 6µs typ, 9us max Current Drive ±5 mA min Output resistance (OP-27) 0.1 ohm max Output short-circuit duration 40 mA min Continuous
Miscellaneous Double buffered output latches
Update DACs individually or all DACs
simultaneously (jumper selectable)
Power up and reset, all DAC's cleared to 0
volts (jumper selects bipolar or unipolar
zero)
Environmental
Operating temerature range 0 to 70°C Storage temerature range -40 to 100°C Humidity 0 to 90% non-condensing
12
Page 17
For your notes.
13
Page 18
For your notes.
14
Page 19
EC Declaration of Conformity
We, Measurement Computing Corp., declare under sole responsibility that the product:
CIO-DAC16/16 CIO-DAC08/16
to which this declaration relates, meets the essential requirements, is in conformity with, and CE marking has been applied according to the relevant EC Directives listed below using the relevant section of the following EC standards and other normative documents:
EU EMC Directive 89/336/EEC: Essential requirements relating to electromagnetic compatibility.
EU 55022 Class B: Limits and methods of measurements of radio interference characteristics of information technology equipment.
EN 50082-1: EC generic immunity requirements.
IEC 801-2: Electrostatic discharge requirements for industrial process measurement
and control equipment.
IEC 801-3: Radiated electromagnetic field requirements for industrial process measurements and control equipment.
IEC 801-4: Electrically fast transients for industrial process measurement and control equipment.
16 Channel analog output board 8 Channel analog output board
DescriptionPart Number
Carl Haapaoja, Director of Quality Assurance
Page 20
Measurement Computing Corporation
16 Commerce Boulevard,
Middleboro, MA 02346
(508) 946-5100
Fax: (508) 946-9500
E-mail: info@measurementcomputing.com
www. measurementcomputing.com
Loading...