Measurement CIO-CTRxxHD User Manual

CIO-CTR10HD

&

CIO-CTR20HD

Revision 6

January, 2001

MEGA-FIFO, the CIO prefix to data acquisition board model numbers, the PCM prefix to data
acquisition board model numbers, PCM-DAS08, PCM-D24C3, PCM-DAC02, PCM-COM422,
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(C) Copyright 2001.

Measurement Computing Corporation

HM CIO-CTR##HD.lwp

TABLE OF CONTENTS

1 INTRODUCTION ..................................................

2 SOFTWARE INSTALLATION ......................................

3 HARDWARE INSTALLATION ......................................

4 I/O CONNECTOR & PINOUT .......................................

5 REGISTER MAP ..................................................

HEX

& BASE +401

HEX

................................

6 SPECIFICATIONS .................................................

7 ELECTRONICS AND INTERFACING ..............................

1
1
1

23.1 BASE ADDRESS ...............................................

33.2 INTERRUPT LEVEL SELECT ...................................

33.3 CLOCK SOURCE SELECT ......................................

33.4 INSTALLING THE CIO-CTR##HD IN THE COMPUTER .............

4
5

55.1 CONTROL & DATA REGISTERS ................................

75.2 BASE +400
9

10

107.1 VOLTAGE DIVIDERS .........................................

117.2 LOW PASS FILTERS DE-BOUNCE INPUTS ......................

This page is blank.

1 INTRODUCTION

The CIO-CTR##HD is really a single board with two (or four) CIO-CTR05's on it.
For the balance of this manual we will refer to both boards (-CTR10HD &

-CTR20HD) as the CIO-CTR##HD, and will only use the complete board name in
instances where there are items specific to one board or the other.

The CIO-CTR family is fully supported by the powerful Universal Library package.
Details regarding installation and usage of the Universal Library software can be
found in the Universal Library documentation. Please note that InstaCal (shipped with
the board) creates a configuration file required for programmers who use the
Universal Library programming libraries.

2 SOFTWARE INSTALLATION

The board has a variety of switches and jumpers to set before installing the board in
your computer. By far the simplest way to configure your board is to use the
InstaCal
you all available options, how to configure the various switches and jumpers (as
applicable) to match your application requirements, and will create a configuration
file that your application software (and the Universal Library) will refer to so the
software you use will automatically know the exact configuration of the board.

TM

program provided as part of your software package. InstaCalTM will show

Please refer to the Extended Software Installation Manual regarding the installation

TM

and operation of InstaCal

. The following hard copy information is provided as a

matter of completeness, and will allow you to set the hardware configuration of the

TM

board if you do not have immediate access to InstaCal

and/or your computer.

3 HARDWARE INSTALLATION

We highly recommend that you use the InstaCAL procedure to guide you through
setting up your board. However, the following sections are provided in case you need
to set up your board and you do not have access to the InstaCAL program.

The CIO-CTR##HD has one bank of switches, a base address switch, and one jumper
block which must be set before installing the board in your computer.

1

3.1 BASE ADDRESS

Unless there is already a board
in your system which uses
address 300h (768 Decimal)
then you can leave the
switches as they are set at the
factory.

In the example shown here,
the CIO-CTR##HD is set for
base address 300h (768
Decimal).

Certain address are used by the PC, others are free and can be used by the
CIO-CTR##HD and other expansion boards. We recommend trying BASE = 300h
(768D) first.

FUNCTIONHEX

RANGE

070-071

MASK (AT)

0F0-0FF

(AT)

The CIO-CTRHD BASE switch may be set for address in the range of 000-3F8 so it
should not be hard to find a free address area for your CIO-CTRHD. Once again, if
you are not using IBM prototyping cards or some other board which occupies these

RANGE

EGA2C0-2CF8237 DMA #1000-00F
EGA2D0-2DF8259 PIC #1020-021
GPIB (AT)2E0-2E78253 TIMER040-043
SERIAL PORT2E8-2EF8255 PPI (XT)060-063
SERIAL PORT2F8-2FF8742 CONTROLLER (AT)060-064
PROTOTYPE CARD300-30FCMOS RAM & NMI

PROTOTYPE CARD310-31FDMA PAGE REGISTERS080-08F
HARD DISK (XT)320-31F8259 PIC #2 (AT)0A0-0AF
PARALLEL PRINTER378-37FNMI MASK (XT)0A0-0A1
SDLC380-38F8237 #2 (AT)0C0-0DF
SDLC3A0-3AF80287 NUMERIC CO-P

MDA3B0-3BBHARD DISK (AT)1F0-1FF
PARALLEL PRINTER3BC-3BFGAME CONTROL200-20F
EGA3C0-3CFEXPANSION UNIT (XT)210-21F
SERIAL PORT3E8-3EFALT BUS MOUSE23C-23F
FLOPPY DISK3F0-3F7PARALLEL PRINTER270-27F
SERIAL PORT3F8-3FFEGA2B0-2BF

FUNCTIONHEX

2

addresses, then 300-31F HEX are free to use. Address not specifically listed, such as
390-39F, are usually free.

3.2 INTERRUPT LEVEL SELECT

A single interrupt input at pin 26 allows you to initiate an interrupt service routine
with an external pulse. The interrupt level is selected via software and is one of the
options set in the InstaCal configuration file.

3.3 CLOCK SOURCE SELECT

The source of the pulses supplied to the 9513 for timing operations is programmable
and there are a number of options. These options are shown in the InstaCal INSTALL
screen.

3.4 INSTALLING THE CIO-CTR##HD IN THE COMPUTER

Turn the power off. Remove the cover of your computer. Please be careful not to
dislodge any of the cables installed in your computer as you slide the cover off.

Locate an empty expansion slot in your computer.

Push the board firmly down into the expansion bus connector. If it is not seated fully
it may fail to work and could short circuit the PC bus power onto a PC bus signal.
This could damage the motherboard in your PC as well as the CIO-CTRHD.

The CIO-CTRxxHD connector is a 50 pin header type connector. All the signals from
the 9513 and interrupt are accessible. Pin one is designed by a square solder pad. It is
the pin on the PC Bus end of the connector, and closest to the edge of the card.

Cables C50FF-2 and the CIO-MINI50 allow easy connection to all of the counter
signals through 12-22 AWG screw terminals. The CIO-CTR20HD ha s two of these
connectors, P1 and P2. The signals on each are identical.

3

4 I/O CONNECTOR & PINOUT

The CIO-CTRxxHD use a 50-pin inline connector. The CIO-CTR10HD has only one
connector while the CIO-CTR20HD has two. The connectors are compatible with the
optional C50FF-series cables and CIO-MINI50 screw terminal adapter board. The
pinout of these connectors is shown below.

GND

FOUT

GND

CTR OUT 5

GND

CTR OUT 4

GND

CTR OUT 3

GND

CTR OUT 2

GND

CTR OUT 1

IR INPUT

GND

FOUT

GND

CTR OUT 5

GND

CTR OUT 4

GND

CTR OUT 3

GND

CTR OUT 2

GND

CTR OUT 1

50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10

8
6

4
2

49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11

9
7
5
3
1

+5V
EXT SRC
GATE 5
CLK IN 5
GATE 4
CLK IN 4
GATE 3
CLK IN 3
GATE 2
CLK IN 2
GATE 1
CLK IN 1
+5 V
+5 V
EXT SRC
GATE 5
CLK IN 5
GATE 4
CLK IN 4
GATE 3
CLK IN 3
GATE 2
CLK IN 2
GATE 1
CLK IN 1

CIO-CTRxxHD CONNECTOR

NOTE:

Chip 1 (U1) is accessed at the bottom half of P1 (pins 1 - 22);
Chip 2 (U2) is the top half of P1 (pins 27 - 48);
Chip 3 (U3) is accessed at the bottom half of P2 (pins 1 - 22);
Chip 4 (U4) is the top half of P2 (pins 27 - 48).

4

5 REGISTER MAP

5.1 CONTROL & DATA REGISTERS

The CIO-CTR10HD is composed of two AM9513 counter timer chips, the
CIO-CTR20HD is composed of four. Each 9513 contains five counters of 16 bits
each. Associated with each counter are an input source, a count register, a load
register, a hold register, an output and a gate. The 9513 is extremely flexible and this
flexibility can make it a challenge to program the chip directly.

Unlike an Intel 8254 which has a single source, single gate and unique I/O address for
each counter, the 9513 is fully programmable and any counter may be internally
connected to any gate and receive it's counts from a number of sources. In addition,
each counter does not have a unique I/O address. The 9513 takes only two address
per chip, one of which is a data path to the counter's load and hold registers.

There is no 9513 register information in this manual. Those wishing to know more
about the AM9513 and its programming should request the manual from our technical
support group. As of this writing there is no charge for the manual.

We strongly suggest that you use the Universal Library, rather than resort to
programming the 9513 directly. It is difficult to program and because programming
support is available through the Universal Library, we cannot help with other 9513
programming

The CIO-CTR##HD is an I/O mapped expansion board. The CIO-CTR20HD
occupies eight I/O addresses and the CIO-CTR10HD occupies four addresses.

The first address, or BASE ADDRESS, is determined by setting a bank of switches on
the board.

Most of the functions that this board is capable of performing can be acheived using
the Universal Library. Unless you have a good reason for direct register
manipulation, we suggest you use the Universal Library.

The register descriptions follow the format:

01234567

A0A1A2A3A4A5A6A7

Where the numbers along the top row are the bit positions within the 8-bit byte and
the numbers and symbols in the bottom row are the functions associated with that bit.

5

To write to or read from a register in decimal or HEX, the following weights apply:

HEX VALUEDECIMAL VALUEBIT POSITION

110
221
442

883
10164
20325
40646
801287

In summary form, the registers and their function are listed on the following table.
Within each register are eight bits which may constitute a byte of data or eight
individual bit functions.

Table 5-1. Register Functions

WRITE FUNCTIONREAD FUNCTIONADDRESS

Data for 9513 #1Data from 9513 #1BASE +0
Commands to 9513 #1Status of 9513 #1BASE +1
Data for 9513 #2Data from 9513 #2BASE +2
Commands to 9513 #2Status of 9513 #2BASE +3

No read function.BASE +400h

Additional for CTR20 only

No read function.BASE +401h

Wait State, Interrupt and
Counter Source for 9513 #1
and 9513 #2 (1st ten channels
on P1)

Data for 9513 #3Data from 9513 #3BASE +4
Commands to 9513 #3Status of 9513 #3BASE +5
Data for 9513 #4Data from 9513 #4BASE +6
Commands to 9513 #4Status of 9513 #4BASE +7
Interrupt and Counter Source
for 9513 #3 and 9513 #4 (2nd
ten channels on P2)

9513 #1 (U1) is accessed at the bottom half of P1 (pins 1 - 22);
9513 #2 (U2) is the top half of P1 (pins 27 - 48);
9513 #3 (U3) is accessed at the bottom half of P2 (pins 1 - 22);
9513 #4 (U4) is the top half of P2 (pins 27 - 48).

6

5.2 BASE +400 hex & BASE +401 hex

BASE + 400 controls the wait state for the board and the clock source and interrupt
level for 9513 #1 and 9513 #2

D0D1D2D3D4D5D6D7
L0L1L2CLK00CLK01CLK10CLK11WSEN

BASE +401 controls the clock source and interrupt level for 9513 #3 and 9513 #4

D0D1D2D3D4D5D6D7
L0L1L2CLK00CLK01CLK10CLK11X

Read

- No read function for these registers.

Write

- L0, L1, and L2 select IRQ as follows:

Table 5-2. IRQ Select Codes

IRQL0L1L2

N/A000
N/A100

2010
3110
4001
5101
6011
7111

For BASE +400, CLK0# selects the clock cource for 9513 #1 (the chip designated
“U1”), CLK1# selects the clock source for 9513 #2 (the chip designated “U2”)

For BASE +401, CLK0# selects the clock cource for 9513 #3 (the chip designated
“U3” for the CIO-CTR20HD”), CLK1# selects the clock source for 9513 #4 (the chip
designated “U4” for the CIO-CTR20HD).

Table 5-3. Clock-Select Codes

CLOCK SOURCECLK#0CLK#1

1 MHz00
5 MHz10

External01

N/A11

7

WSEN enables or disables the wait state.

1 = Wait State Enabled

0 = Wait State Disabled

NOTE: Base +400 applies to CTR10HD and the first ten channels
of CTR20 HD (except for the wait state). Base +401 applies to
CTR20HD only and the second ten channels.

8

6 SPECIFICATIONS

Typical for 25°C unless otherwise specified.

POWER CONSUMPTION

+5V

CIO-CTR10HD 475 mA typical, 590 mA max
CIO-CTR20HD 800 mA typical, 1A max

COUNTER SECTION

Counter type 9513
Configuration

CIO-CTR10HD Two 9513 devices. 5 counters per 9513, 16 bits

each

CIO-CTR20HD Four 9513 devices. 5 counters per 9513, 16 bits

each

Clock input frequency 7 Mhz max
X2 Clock input source 1 MHz (10 MHz Xtal divided by 10), 5 MHz (10

MHz Xtal divided by 2) or external; software

selectable
High pulse width (clock input) 70 ns min
Cycle time (clock input) 145 ns min
Gate pulse duration 145 ns min
Input low voltage −0.5V min, 0.8V max
Input high voltage 2.2V min, 5V max
Output low voltage 0.4V max @ 3.2 mA
Output high voltage 2.4V min @ −200 µA

Crystal oscillator clock source 10 MHz
Frequency accuracy

CIO-CTR##HD 100 ppm
CIO-CTR##HD/H50 50 ppm

DIGITAL I/O

Interrupts 2 to 7, software selectable
Interrupt enable Programmable
Interrupt sources External

ENVIRONMENTAL

Operating temperature range 0 to 50°C
Storage temperature range −20 to 70°C
Humidity 0 to 90% non-condensing

9

7 ELECTRONICS AND INTERFACING

7.1 VOLTAGE DIVIDERS

An alternative method of measuring a signal which varies over a range greater than the
input range of a digital input, is to use a voltage d ivider. When correctly designed, it
can drop the voltage of the input signal to a safe level the digital input can accept.

Ohm's law states:

Voltage = Current x Resistance

Kirkoff's law states:

The sum of the voltage drops around a circuit will be equal to the voltage
drop for the entire circuit.

In a voltage divider, the voltage across one resistor in a series circuit is proportional to
the total resistance divided by the one resistor (see formula below).

The object in a voltage divider is to choose two resistors having the proportions of
the maximum voltage of the input signal to the maximum allowed input voltage.

The formula for attenuation is:

Attenuation = R1 + R2

R2

For example, if the signal varies between 0 and 20

2 = 10K + 10K

10K

R1 = (A-1) x R2

Digital inputs often require the use of voltage dividers. For example, if you wish to
measure a digital signal that is at 0 volts when off and 24 volts when on, you cannot
connect that directly to a digital input. The voltage must be dropped to 5 volts max
when on. The attenuation is 24:5 or 4.8.

Using the equation above, if R2 is 1K, R1 = (4.8−1) x 1000 = 3.8K.
Remember that a TTL input is 'on' when the input voltage is greater than 2.5 volts.

volts and you wish to measure that with an analog
input with a full scale range of 0 to 10 volts, the
attenuation (A) is 2:1 or just 2.

For a given attenuation, pick a resistor and call it
R2, the use this formula to calculate R1.

10

NOTE

SIGNAL HIGH

SIGNAL
VOLTS

SIGNAL LOW

R1

Vin

R2

SIMPLE VOLTAGE DIVIDER

V1

V2

Vout

Vin

Vout

=

A/D BOARD
HIGH INPUT

A/D BOARD
LOW INPUT

The resistors, R1 and R2, are going to dissipate power in the divider

2

circuit according to the equation W = I

x R; (Current (I) =
Voltage/Resistance). The higher the value of the resistance (R1 +
R2), the less power dissipated by the divider circuit. Here is a
simple rule:

R1 + R2

R2

For attenuation of <5:1, no resistor should be less than 10K.

For attenuation of > 5:1, no resistor should be less than 1K.

The CIO-TERMINAL has the circuitry on board to create custom voltage dividers.
The CIO-TERMINAL is a 16" by 4" screw terminal board with two 37 pin D type
connectors and 56 screw terminals (12 - 22 AWG). Designed for table top, wall or
rack mounting, the board provides prototype, divider circuit, filter circuit and pull-up
resistor positions which you may complete with the proper value components for your
application.

7.2 LOW PASS FILTERS DE-BOUNCE INPUTS

A low pass filter is placed on the signal wires between a signal and an A/D board. It
prevents frequencies greater than the cut-off frequency from entering the A/D board's
digital inputs.

11

The cut-off frequency is that frequency above which no variation of voltage with
respect to time may enter the circuit. For example, if a low-pass filter had a cut-off
frequency of 30 Hz, interference associated with line voltage (60 Hz) would be mostly
filtered out but a signal of 25 Hz would pass with less attenuation.

Also, in a digital circuit, a low-pass filter is often used to remove contact bounce noise
signals from a switch or a relay contacts. Also, in a digital circuit, a low pass filter
might be used to “de-bounce” (filter) an input from a switch or external relay. (Unless
switch/relay contacts are mercury-whetted, they tend to bounce briefly on closure,
generating a pulsating noise signal. This can easily lead to erro neous counts unless
filtered out.)

A simple low-pass filter can be constructed from one resistor (R) and one capacitor
(C). The cut-off frequency is determined according to the formula:

Fc =

R = 1
. 2π C Fc

1 Where π= 3.14...

2 π R C R = ohms

C = farads
Fc = cut-off frequency in cycles/second

12

For your notes.

13

For your notes.

14

EC Declaration of Conformity

Measurement Computing Corporation

We,

, declare under sole responsibility that the

product:

Counter / Timer BoardCIO-CTR10HD
Counter / Timer BoardCIO-CTR20HD

DescriptionPart Number

to which this declaration relates, meets the essential requirements, is in conformity
with, and CE marking has been applied according to the relevant EC Directives listed
below using the relevant section o f the following EC standards and other no rmative
documents:

EU EMC Directive 89/336/EEC: Essential requirements relating to electromagnetic
compatibility.

EU 55022 Class B: Limits and methods of measurements of radio interference
characteristics of information technology equipment.

EN 50082-1: EC generic immunity requirements.

IEC 801-2: Electrostatic discharge requirements for industrial process measurement

and control equipment.

IEC 801-3: Radiated electromagnetic field requirements for industrial process
measurements and control equipment.

IEC 801-4: Electrically fast transients for industrial process measurement and control
equipment.

Carl Haapaoja, Director of Quality Assurance

Measurement Computing Corporation

16 Commerce Boulevard,

Middleboro, Massachusetts 02346

[phone]

Fax: [phone]

E-mail: [e-mail]

www. measurementcomputing.com