MAXWELL 33C408RTFS30, 33C408RTFS25, 33C408RTFI30, 33C408RTFI25, 33C408RTFI20 Datasheet
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1
Memory
All data sheets are subject to change without notice
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
4 Megabit (512K x 8-Bit)
33C408
©2001 Maxwell Technologies
All rights reserved.
CMOS SRAM
12.13.01 Rev712.20.01 Rev 7
1000561
FEATURES:
•RAD-PAK® Technology radiation-hardened against natural
space radiation
• 524,288 x 8 bit organization
· Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Excellent Single Event Effect
· - SEL
TH
: > 68 MeV/mg/cm
2
· - SEUTH: = 3 MeV/mg/cm
2
- SEU saturated cross section: 6E-9 cm2/bit
• Package:
- 32-Pin R
AD-PAK® flat pack
- 32-Pin Non-R
AD-PAK® flat pack
• Fast access time:
- 20, 25, 30 ns maximum times available
• Single 5V +
10% power supply
• Fully static operation
- No clock or refresh required
• Three state outputs
• TTL compatible inputs and outputs
• Low power:
- Standby: 60 mA (TTL); 10 mA (CMOS)
- Operation: 180 mA (20 ns); 170 mA (25 ns);
160 mA (30 ns)
DESCRIPTION:
Maxwell Technologies’ 33C408 high-density 4 Megabit SRAM
microcircuit features a greater than 100 krad (Si) total dose
tolerance, depending upon space mission. Using Maxwell’s
radiation-hardened R
AD-PAK® packaging technology, the
33C408 realizes a high density, high performance, and low
power consumption. Its fully static design eliminates the need
for external clocks, while the CMOS circuitry reduces power
consumption and provides higher reliability. The 33C408 is
equipped with eight common input/output lines, chip select
and output enable, allowing for greater system flexibility and
eliminating bus contention. The 33C408 features the same
advanced 512K x 8-bit SRAM, high-speed, and low-power
demand as the commercial counterpart.
Maxwell Technologies' patented R
AD-PAK packaging technol-
ogy incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD-PAK provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
Logic Diagram
Memory
2
All data sheets are subject to change without notice
©2001 Maxwell Technologies
All rights reserved.
4 Megabit (512K x 8-Bit) CMOS SRAM
33C408
12.13.01 Rev712.20.01 Rev 7
1000561
TABLE 1. PINOUT DESCRIPTION
PIN SYMBOL DESCRIPTION
12-5, 27, 26, 23, 25, 4,
28, 3, 31, 2, 30, 1
A0-A18 Address Inputs
29 WE
Write Enable
22 CS
Chip Select
24 OE
Output Enable
13-15, 17-21 I/O 1-I/O 8 Data Inputs/Outputs
32 V
CC
Power (+5.0V)
16 V
SS
Ground
TABLE 2. 33C408 ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL MIN MAX UNIT
Voltage on VCC supply relative to V
SS
V
CC
-0.5 7.0 V
Voltage on any pin relative to V
SS
VIN, V
OUT
-0.5 V
CC
+0.5 V
Power Dissipation P
D
-- 1.0 W
Storage Temperature T
S
-65 +150
°
C
Operating Temperature T
A
-55 +125
°
C
TABLE 3. DELTA LIMITS
PARAMETER VARIATION
I
CC1
±10% of stated vaule in Table 6
I
CC2
±10% of stated vaule in Table 6
I
CC3
±10% of stated vaule in Table 6
I
LI
±10% of stated vaule in Table 6
Memory
3
All data sheets are subject to change without notice
©2001 Maxwell Technologies
All rights reserved.
4 Megabit (512K x 8-Bit) CMOS SRAM
33C408
12.13.01 Rev712.20.01 Rev 7
1000561
TABLE 4. 33C408 RECOMMENDED OPERATING CONDITIONS
(VCC = 5.0 + 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE NOTED)
P
ARAMETER SYMBOL MIN MAX UNIT
Supply Voltage V
CC
4.5 5.5 V
Ground V
SS
00V
Input High Voltage
1
1. V
IH
(max) = VCC +2.0V ac (pulse width < 10 ns) for I < 20 mA
V
IH
2.2 VCC+0.5 V
Input Low Voltage
2
2. V
IL
(min) = -2.0V ac(pulse width < 10 ns) for I < 20 mA
V
IL
-0.5 0.8 V
Thermal Impedance
Θ
JC
-- 1.21 °C/W
TABLE 5. 33C408 CAPACITANCE
(f = 1.0 MHZ, dV = 3.0V, TA = 25 °C)
P
ARAMETER SYMBOL
TEST
C
ONDITIONS
MAX UNITS
Input Capacitance
1
CS1 - CS4,
OE
, WE
I/O0-7, I/O8-15, I/O16-23, I/O24-31
1. Guaranteed by design.
C
IN
V
IN
= 0 V
7
28
7
pF
Input / Output Capacitance
1
C
OUT
V
I/O
= 0 V 8 pF
TABLE 6. 33C408 DC ELECTRICAL CHARACTERISTICS
(VCC = 5V + 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE SPECIFIED)
P
ARAMETER SYMBOL CONDITION MIN MAX UNIT
Input Leakage Current I
LI
VIN = VSS to V
CC
-2 2 µA
Output Leakage Current I
LO
CS=VIH or OE=VIH or WE=VIL,
V
OUT
=VSS to V
CC
-2 2 µA
Output Low Voltage V
OL
IOL = 8mA -- 0.4 V
Output High Voltage V
OH
IOH = -4mA 2.4 -- V
Operating Current
-20
-25
-30
I
CC
Min cycle, 100% Duty, CS=VIL, I
OUT
=0mA,
V
IN
= VIH or V
IL
--
--
--
180
170
160
mA
Standby Power Supply Current
I
SB
CS = VIH, Min Cycle -- 60 mA
Input Capacitance
1
C
IN
VIN = 0V, f = 1MHz, TA = 25 °C -- 7 pF
Memory
4
All data sheets are subject to change without notice
©2001 Maxwell Technologies
All rights reserved.
4 Megabit (512K x 8-Bit) CMOS SRAM
33C408
12.13.01 Rev712.20.01 Rev 7
1000561
Output Capacitance
1
C
I/O
V
I/O
= 0V -- 8 pF
1. Guaranteed by design.
TABLE 7. 33C408 AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 + 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE NOTED)
P
ARAMETER MIN TYP MAX UNITS
Input Pulse Level 0.0 -- 3.0 V
Output Timing Measurement Reference Level -- -- 1.5 V
Input Rise/Fall Time -- -- 3.0 ns
Input Timing Measurement Reference Level -- -- 1.5 V
TABLE 8. 33C408 AC CHARACTERISTICS FOR READ CYCLE
(VCC = 5V + 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE SPECIFIED)
P
ARAMETER SYMBOL MIN TYP MAX UNIT
Read Cycle Time
-20
-25
-30
t
RC
20
25
30
--
--
--
--
--
--
ns
Address Access Time
-20
-25
-30
t
AA
--
--
--
--
--
--
20
25
30
ns
Chip Select Access Time
-20
-25
-30
t
CO
--
--
--
--
--
--
20
25
30
ns
Output Enable to Output Valid
-20
-25
-30
t
OE
--
--
--
--
--
--
10
12
14
ns
Chip Enable to Output in Low-Z
-20
-25
-30
t
LZ
--
--
--
3
3
3
--
--
--
ns
Output Enable to Output in Low-Z
-20
-25
-30
t
OLZ
--
--
--
0
0
0
--
--
--
ns
TABLE 6. 33C408 DC ELECTRICAL CHARACTERISTICS
(VCC = 5V + 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE SPECIFIED)
P
ARAMETER SYMBOL CONDITION MIN MAX UNIT
Memory
5
All data sheets are subject to change without notice
©2001 Maxwell Technologies
All rights reserved.
4 Megabit (512K x 8-Bit) CMOS SRAM
33C408
12.13.01 Rev712.20.01 Rev 7
1000561
Chip Deselect to Output in High-Z
-20
-25
-30
t
HZ
--
--
--
5
6
8
--
--
--
ns
Output Disable to Output in High-Z
-20
-25
-30
t
OHZ
--
--
--
5
6
8
--
--
--
ns
Output Hold from Address Change
-20
-25
-30
t
OH
3
5
6
--
--
--
--
--
--
ns
Chip Select to Power Up Time
-20
-25
-30
t
PU
--
--
--
0
0
0
--
--
--
ns
Chip Select to Power Down Time
-20
-25
-30
t
PD
--
--
--
10
15
20
--
--
--
ns
TABLE 9. 33C408 FUNCTIONAL DESCRIPTION
CS WE OE MODE I/O PIN SUPPLY CURRENT
HX
1
1. X = don’t care.
X
1
Not Select High-Z ISB, I
SB1
L H H Output Disable High-Z I
CC
L H L Read D
OUT
I
CC
LLX1Write D
IN
I
CC
TABLE 10. 33C408 AC CHARACTERISTICS FOR WRITE CYCLE
(VCC = 5V + 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE SPECIFIED)
P
ARAMETER SYMBOL MIN TYP MAX UNIT
Write Cycle Time
-20
-25
-30
t
WC
20
25
30
--
--
--
--
--
--
ns
TABLE 8. 33C408 AC CHARACTERISTICS FOR READ CYCLE
(VCC = 5V + 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE SPECIFIED)
P
ARAMETER SYMBOL MIN TYP MAX UNIT
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