MAXWELL 28LV010RT4FS25, 28LV010RT4FS20, 28LV010RT4FI25, 28LV010RT4FI20, 28LV010RT4FE25 Datasheet

28LV010

3.3V 1 Megabit (128K x 8-Bit) EEPROM

FEATURES:

• 3.3V low voltage operation 128K x 8 Bit EEPROM

•R

AD-PAK® radiation-hardened against natural space

radiation

• Total dose hardness:

- > 100 krad (Si), depending upon space mission

• Excellent Single Event Effects:

- SEL

> 84 MeV/mg/cm

TH

- SEUTH > 37 Mev/mg/cm2 (read mode)

-SEU saturated cross section = 3E-6 cm

- SEU

= 11.4 Mev/mg/cm2 (write mode)

TH

-SEU saturated cross section = 5E-3 cm hard errors

• Package:

- 32 Pin R

AD-PAK® flat pack AD-PAK® DIP

- JEDEC-approved byte-wide pinout

• Address Access Time:

- 200, 250 ns maximum access times available

• High endurance:

- 10,000 erase/write (in Page Mode), 10-year data retention

• Page write mode:

- 1 to 128 bytes

• Automatic programming

- 10 ms automatic page/byte write

• Low power dissipation

- 20 mW/MHz active current (typ.)

- 72 µW standby (maximum)

2

(read mode)

2

(write mode) with

V

CC

V

SS

RES

OE

CE

WE

RES

A0

A6

A7

A16

High Voltage

Generator

Control Logic Timing

Address

Buffer and

Latch

Y Decoder

X Decoder

I/O0 I/O7 RDY/Busy

I/O Buffer and

Input Latch

Y Gating

Memory Array

Data Latch

Logic Diagram

DESCRIPTION:

Maxwell Technologies’ 28LV010 high density, 3.3V, 1 Megabit EEPROM microcircuit features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 28LV010 is capable of in-system electrical Byte and Page programmability. It has a 128-Byte Page Programming function to make its erase and write operations faster. It also features Data

Polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 28LV010, hardware data protection is provided with the RES tion to noise protection on the WE

signal and write inhibit on power on and off. Meanwhile, software data protection is implemented using the JEDEC-optional Standard algorithm. The 28LV010 is designed for high reliability in the most demanding space applications.

Maxwell Technologies' patented R

AD-PAK® packaging technol-

ogy incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, R

AD-PAK provides greater than 100

krad (Si) radiation dose tolerance. This product is available with screening up to Class S.

Note:The recommended form of data protection during power on/off is to hold the RES

pin to VSS during power up and power down. This may be accompanied by connecting the RES to the CPU reset line. Failure to provide adequate protection during power on/off may result in lost or modified data.

pin, in addi-

Memory

1000579

(858) 503-3300 - Fax: (858) 503-3301- www.maxwell.com

12.19.01 Rev 3

All data sheets are subject to change without notice

1

3.3V 1 Megabit (128K x 8-Bit) EEPROM

TABLE 1. 28LV010 PINOUT DESCRIPTION

PIN SYMBOL DESCRIPTION

28LV010

12-5, 27, 26, 23, 25,

4, 28, 3, 31, 2

13-15, 17-21 I/O0 - I/O7 Input/Output

24

22

29

32 V

16 V

1 RDY/BUSY

30

A0-A16 Address

OE Output Enable

CE Chip Enable

WE Write Enable

CC

SS

RES Reset

TABLE 2. 28LV010 ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL MIN MAX UNIT

Supply Voltage (Relative to Vss) V

Input Voltage (Relative to Vss) V

Operating Temperature Range T

Storage Temperature Range T

Power Supply

Ground

Ready/Busy

CC

IN

OPR

STG

-0.6 7.0 V

1

-0.5

-55 125 °C

-65 150 °C

7.0 V

Memory

1. VIN min = -3.0 V for pulse width < 50 ns.

ICC1 ±10%

I

2 ±10%

CC

I

3A ±10%

CC

I

3B ±10%

CC

1000579

TABLE 3. DELTA LIMITS

PARAMETER VARIATION

12.19.01 Rev 3

All data sheets are subject to change without notice

2

3.3V 1 Megabit (128K x 8-Bit) EEPROM

TABLE 4. 28LV010 RECOMMENDED OPERATING CONDITIONS

PARAMETER SYMBOL MIN MAX UNIT

28LV010

Supply Voltage V

Input Voltage

RES

_PIN

Operating Temperature Range T

min = -1.0 V for pulse width < 50 ns.

1. V

IL

2. V

min = 2.2 V for VCC = 3.6 V.

IH

TABLE 5. 28LV010 CAPACITANCE

(TA = 25°C, F = 1MHZ)

P

ARAMETER SYMBOL MIN MAX UNIT

OUT

1

= 0V

1

Input Capacitance: VIN = 0V

Output Capacitance: V

1. Guaranteed by design.

TABLE 6. 28LV010 DC ELECTRICAL CHARACTERISTICS

(VCC = 3.3V ± 0.3, TA = -55 TO +125°C UNLESS OTHERWISE SPECIFIED)

3.0 3.6 V

1

-0.3

2

2.0

VCC-0.5

0.8 +0.3

V

CC

V

+1

CC

-55 +125 °C

V

V V V

OPR

CC

IL

IH

H

Memory

C

IN

C

OUT

-- 6 pF

-- 12 pF

P

ARAMETER TEST CONDITIONS SYMBOL MIN MAX UNIT

Input Leakage Current VCC = 3.6V, VIN = 3.6V I

Output Leakage Current V

Standby V

Operating V

Current CE = V

CC

Current I

CC

= 3.6V, V

CC

CE = V

IH

= 0mA, Duty = 100%, Cycle = 1 µs @ VCC = 3.3V

OUT

I

= 0mA, Duty = 100%, Cycle = 250 ns @ VCC =

OUT

= 3.6V/0.4V I

OUT

3.3V

Input Voltage V

Output Voltage I

1. V

min = 2.2V for VCC = 3.6V.

IH

1000579

= 2.1 mA

OL

I

= -400 µA

OH

12.19.01 Rev 3

All data sheets are subject to change without notice

I I

I

V V

CC1

CC2

CC3

V

LI

LO

IL

IH

H

OL

OH

-- 2 µA

--

2.0

VCC-0.5

--

V

x0.8

CC

1

20

1

6

15

0.8

--

0.4

--

µA mA

mA

V

3

3.3V 1 Megabit (128K x 8-Bit) EEPROM

28LV010

TABLE 7. 28LV010 AC CHARACTERISTICS FOR READ OPERATION

(VCC = 3.3V ± 10%, TA = -55 TO +125 °C UNLESS OTHERWISE SPECIFIED)

P

ARAMETER TEST CONDITIONS SYMBOL MIN MAX UNIT

Address Access Time

-200

-250

Chip Enable Access Time

-200

-250

Output Enable Access Time

-200

-250

Output Hold to Address Change

-200

-250

Output Disable to High-Z

-200

-250

Output Disable to High-Z

-200

-250

to Output Delay

RES

-200

-250

2

3

CE = OE = VIL, WE = V

= VIL, WE = V

OE

= VIL, WE = VIH t

CE

= OE = VIL, WE = V

CE

= VIL, WE = VIH

CE CE

= OE = VIL, WE = V

= VIL, WE = VIH

CE CE

= OE = VIL, WE = V

= OE = VIL WE = V

CE

IH

t

ACC

t

CE

OE

t

OH

t

DF

DFR

t

RR

1

ns

--

200 250

ns

--

200 250

ns 0 0

110 120

ns 0 0

0 0

50 50

--

ns

Memory

ns 0 0

300 350

ns 0 0

525 550

1. Test conditions: Input pulse levels - 0.4V to 2.4V; input rise and fall times < 20 ns; output load - 1 TTL gate + 100 pF (including scope and jig); reference levels for measuring timing - 0.8V/1.8V.

2. t

DF

and t

is defined as the time at which the output becomes an open circuit and data is no longer driven.

DFR

3. Guaranteed by design.

1000579

12.19.01 Rev 3

All data sheets are subject to change without notice

4

3.3V 1 Megabit (128K x 8-Bit) EEPROM

TABLE 8. 28LV010 AC ELECTRICAL CHARACTERISTICS FOR ERASE AND WRITE OPERATIONS

(VCC = 3.3V ± 10%, TA = -55 TO +125 °C UNLESS OTHERWISE SPECIFIED)

P

ARAMETER SYMBOL MIN MAX UNIT

28LV010

Address Setup Time

-200

-250

Chip Enable to Write Setup Time (WE

-200

-250

Write Pulse Width (CE

controlled)

-200

-250

Write Pulse Width (WE

controlled)

-200

-250

Address Hold Time

-200

-250

Data Setup Time

-200

-250

Data Hold Time

-200

-250

Chip Enable Hold Time (WE

controlled)

-200

-250

Write Enable to Write Setup Time (CE

-200

-250

controlled)

t

AS

t

CS

t

CW

t

WP

t

AH

t

DS

t

DH

t

CH

t

WS

0 0

200 250

125 150

100 100

10 10

0 0

--

ns

Memory

Write Enable Hold Time (CE

controlled)

-200

-250

Output Enable to Write Setup Tim

-200

-250

Output Enable Hold Time

-200

-250

Write Cycle Time

1,2

-200

-250

1000579

12.19.01 Rev 3

t

WH

t

OES

t

OEH

t

WC

All data sheets are subject to change without notice

0 0

--

15 15

ns

ms

5

3.3V 1 Megabit (128K x 8-Bit) EEPROM

TABLE 8. 28LV010 AC ELECTRICAL CHARACTERISTICS FOR ERASE AND WRITE OPERATIONS

(VCC = 3.3V ± 10%, TA = -55 TO +125 °C UNLESS OTHERWISE SPECIFIED)

P

ARAMETER SYMBOL MIN MAX UNIT

28LV010

Byte Load Cycle

-200

-250

Data Latch Time

2

-200

-250

Byte Load Window

-200

-250

Time to Device Busy

-200

-250

Write Start Time

-200

-250

to Write Setup Time

RES

-200

-250

to RES Setup Time

V

CC

-200

-250

t

BLC

t

DL

2

t

BL

t

DB

DW

t

RP

RES

1 1

--

100 100

100 120

150 150

100 100

1 1

30 30

700 750

--

µs

ns

µs

ns

Memory

µs

must be longer than this value unless polling techniques or RDY/BSY are used. This device automatically completes the

1. t

WC

internal write operation within this value.

2. Guaranteed by design.

TABLE 9. 28LV010 MODE SELECTION

1,2

MODE CE OE WE RES RDY/BUSY I/O

Read V

Standby V

Write V

Deselect V

IL

IH

IL

Write Inhibit X X V

XV

Data

Polling V

IL

Program X X X V

V

IL

V

IH

V

H

High-Z D

X X X High-Z High-Z

V

IH

V

IH

IL

V

IL

V

IL

V

IH

V

H

V

H

High-Z --> V

OL

High-Z High-Z

X-- --

X X -- --

V

IH

V

H

IL

V

OL

Data Out (I/O7)

High-Z High-Z

1. X = Don’t care.

2. Refer to the recommended DC operating conditions.

D

OUT

IN

1000579

12.19.01 Rev 3

All data sheets are subject to change without notice

6