DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
______________________________________________ Maxim Integrated Products 1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
General Description
The DS1858 dual temperature-controlled nonvolatile
(NV) variable resistors with three monitors consists of
two 50kΩ 256-position linear variable resistors, three
analog monitor inputs (MON1, MON2, MON3), and a
direct-to-digital temperature sensor. The device provides an ideal method for setting and temperature-compensating bias voltages and currents in control
applications using minimal circuitry. The variable resistor settings are stored in EEPROM memory and can be
accessed over the 2-wire serial bus.
Applications
Optical Transceivers
Optical Transponders
Instrumentation and Industrial Controls
RF Power Amps
Diagnostic Monitoring
Features
♦ Five Total Monitored Channels (Temperature,
VCC, MON1, MON2, MON3)
♦ Three External Analog Inputs (MON1, MON2,
MON3)
♦ Internal Direct-to-Digital Temperature Sensor
♦ Two 50kΩ, Linear, 256-Position, Nonvolatile
Temperature-Controlled Variable Resistors
♦ Resistor Settings Changeable Every 2°C
♦ Access to Monitoring and ID Information
Configurable with Separate Device Addresses
♦ 2-Wire Serial Interface
♦ Two Buffers with TTL/CMOS-Compatible Inputs
and Open-Drain Outputs
♦ Operates from a 3.3V or 5V Supply
♦ SFF-8472 Compatible
Ordering Information
Rev 0; 1/03
DS1858E-050/T&R -40°C to +95°C
16 TSSOP
(Tape-and-Reel)
DS1858B-050
A
TOP VIEW
B
C
D
1
16-BALL CSBGA (4mm x 4mm)
1.0mm PITCH
16 TSSOP
324
MON3
OUT1IN2
MON1
L0GND
WPEN
L1
H0SDA
OUT2
H1
V
CC
SCLIN1
MON2
DS1858
SDA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SCL
OUT1
IN1
OUT2
IN2
WPEN
GND
V
CC
H1
L1
H0
L0
MON3
MON2
MON1
DS1858
SDA
1
2
3
4
5
6
7
8
16
0.1µF
15
14
13
12
11
10
9
SCL
OUT1
IN1
OUT2
IN2
WPEN
GND
V
CC
H1
L1
H0
L0
MON3
MON2
MON1
GROUND TO
DISABLE WRITE
PROTECT
Tx POWER*
DIAGNOSTIC
INPUTS
0 TO 2.5V FS
TO LASER
MODULATION
CONTROL
TO LASER BIAS
CONTROL
DECOUPLING
CAP
Rx POWER*
Tx BIAS*
*Rx POWER, Tx BIAS, AND Tx POWER CAN BE
ARBITRARILY ASSIGNED TO THE MON INPUTS
V
CC
VCC = 3.3V
4.7kΩ4.7kΩ
Tx-FAULT
LOS
2-WIRE
INTERFACE
Typical Operating Circuit
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
2 _____________________________________________________________________
Supply Voltage V
CC
(Note 1) 3.0 5.5 V
Input Logic 1 (SDA, SCL, WPEN) V
IH
(Note 2)
V
Input Logic 0 (SDA, SCL, WPEN) V
IL
(Note 2) -0.3
V
Resistor Inputs (L0, L1, H0, H1) -0.3
V
Resistor Current I
RES
-3 +3 mA
V
IH
Input logic 1 1.5
Input Logic Levels (IN1, IN2)
V
IL
Input logic 0 0.9
V
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage on VCCRelative to Ground.......................-0.5V to +6.0V
Voltage on Inputs Relative
to Ground* ................................................-0.5V to V
CC
+ 0.5V
Voltage on Resistor Inputs Relative
to Ground* ................................................-0.5V to V
CC
+ 0.5V
Current into Resistors............................................................5mA
Operating Temperature Range ...........................-40°C to +95°C
Programming Temperature Range .........................0°C to +70°C
Storage Temperature Range .............................-55°C to +125°C
Soldering Temperature .......................................See IPC/JEDEC
RECOMMENDED DC OPERATING CONDITIONS
(TA= -40°C to +95°C, unless otherwise noted.)
Supply Current I
CC
(Note 3) 1 2 mA
Input Leakage I
IL
-1 +1 µA
Input Current each I/O Pin 0.4 x V
CC
< V
I/O
< 0.9 x V
CC
µA
V
OL1
3mA sink current 0 0.4
Low-Level Output Voltage (SDA)
V
OL2
6mA sink current 0 0.6
V
Full-Scale Input (MON1, MON2,
MON3)
(Note 4)
V
Full-Scale VCC Monitor (Note 5)
V
I/O Capacitance C
I/O
10 pF
WPEN Pullup R
WPEN
40 65 100 kΩ
V
OL1
3mA sink current 0 0.4 V
OUT1, OUT2 Voltage
V
OL2
6mA sink current 0 0.6 V
Digital Power-On Reset POD
2.2 V
Analog Power-On Reset POA
DC ELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
*Not to exceed 6.0V.
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
_____________________________________________________________________ 3
Thermometer Error T
ERR
-40°C to +95°C
DIGITAL THERMOMETER
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
µV
Supply Resolution ∆V
CC
1.6 mV
Input/Supply Accuracy A
CC
Update Rate for MON1, MON2,
MON3, Temp, or V
CC
t
frame
25 36 ms
ANALOG VOLTAGE MONITORING
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
Position 00h Resistance TA = +25°C 0.7 1.0
kΩ
Position FFh Resistance TA = +25°C 40 50 60 kΩ
Absolute Linearity (Note 6) -2 +2 LSB
Relative Linearity (Note 7) -1 +1 LSB
Temperature Coefficient (Note 8) 50
ANALOG RESISTOR CHARACTERISTICS
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
4 _____________________________________________________________________
Fast mode (Note 9) 0 400
SCL Clock Frequency f
SCL
Standard mode (Note 9) 0 100
kHz
Fast mode (Note 9) 1.3
Bus Free Time Between STOP and
START Condition
t
BUF
Standard mode (Note 9) 4.7
µs
Fast mode (Notes 9, 10) 0.6
Hold Time (Repeated)
START Condition
Standard mode (Notes 9, 10) 4.0
µs
Fast mode (Note 9) 1.3
Low Period of SCL Clock t
LOW
Standard mode (Note 9) 4.7
µs
Fast mode (Note 9) 0.6
High Period of SCL Clock t
HIGH
Standard mode (Note 9) 4.0
µs
Fast mode (Notes 9, 11, 12) 0 0.9
Data Hold Time
Standard mode (Notes 9, 11, 12) 0
µs
Fast mode (Note 9)
ns
Fast mode (Note 9) 0.6
Start Setup Time
Standard mode (Note 9) 4.7
µs
Fast mode (Note 13)
300
Rise Time of Both SDA and SCL
Signals
t
R
Standard mode (Note 13)
300
Fall Time of Both SDA and SCL
Signals
t
F
Standard mode (Note 13)
300
ns
Fast mode 0.6
Setup Time for STOP Condition
Capacitive Load for Each Bus Line
C
B
(Note 13) 400 pF
EEPROM Write Time t
W
(Note 14) 10 ms
AC ELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
Note 1: All voltages are referenced to ground.
Note 2: I/O pins of fast-mode devices must not obstruct the SDA and SCL lines if V
CC
is switched off.
Note 3: SDA and SCL are connected to V
CC
and all other input signals are connected to well-defined logic levels.
Note 4: The maximum voltage the MON inputs will read is approximately 2.5V, even if the voltage on the inputs is greater than 2.5V.
Note 5: This voltage is defining the maximum range of the analog-to-digital converter voltage and not the maximum V
CC
voltage.
Note 6: Absolute linearity is the difference of measured value from expected value at DAC position. The expected value is a
straight line from measured minimum position to measured maximum position.
Note 7: Relative linearity is the deviation of an LSB DAC setting change vs. the expected LSB change. The expected LSB change
is the slope of the straight line from measured minimum position to measured maximum position.
Note 8: See the
Typical Operating Characteristics.
Note 9: A fast-mode device can be used in a standard-mode system, but the requirement t
SU:DAT
> 250ns must then be met. This
is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the
LOW period of the SCL signal, it must output the next data bit to the SDA line t
RMAX
+ t
SU:DAT
= 1000ns + 250ns = 1250ns
before the SCL line is released.
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
_____________________________________________________________________ 5
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum t
HD:DAT
only has to be met if the device does not stretch the LOW period (t
LOW
) of the SCL signal.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the V
IH MIN
of the SCL signal) in order
to bridge the undefined region of the falling edge of SCL.
Note 13: C
B
—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.
Note 14: EEPROM write begins after a STOP condition occurs.
Typical Operating Characteristics
(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
DS1858 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
806040200-20
540
580
620
660
700
500
-40 100
SUPPLY CURRENT vs. VOLTAGE
DS1858 toc02
VOLTAGE (V)
SUPPLY CURRENT (µA)
5.04.54.03.5
450
500
550
600
650
700
400
3.0 5.5
RESISTANCE vs. SETTING
DS1858 toc03
SETTING
RESISTANCE (kΩ)
25020015010050
10
20
30
40
50
60
0
0 300
ACTIVE SUPPLY CURRENT
vs. SCL FREQUENCY
DS1858 toc04
SCL FREQUENCY (kHz)
ACTIVE SUPPLY CURRENT (µA)
300200100
540
580
620
660
700
SDA = 5V
500
0 400
DS1858
Dual Temperature-Controlled Resistors with
Three Monitors
6 _____________________________________________________________________
Typical Operating Characteristics (continued)
(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
RESISTOR 0 INL (LSB)
DS1858 toc05
POSITION
RESISTOR 0 INL (LSB)
225200150 17550 75 100 12525
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
0 250
RESISTOR 1 INL (LSB)
DS1858 toc07
POSITION
RESISTOR 1 INL (LSB)
225200150 17550 75 100 12525
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
0 250
RESISTOR 1 DNL (LSB)
DS1858 toc08
RESISTOR 1 DNL (LSB)
-0.15
-0.05
0.05
0.15
0.25
-0.25
POSITION
225200150 17550 75 100 125250 250
RESISTANCE vs. POWER-UP VOLTAGE
+25°C
DS1858 toc09
POWER-UP VOLTAGE (V)
RESISTANCE (kΩ)
4321
50
100
150
200
250
300
0
05
RESISTOR 0 DNL (LSB)
DS1858 toc06
RESISTOR 0 DNL (LSB)
-0.15
-0.05
0.05
0.15
0.25
-0.25
POSITION
225200150 17550 75 100 125250 250
PPM vs. POSITION
DS1858 toc12
POSITION
ppm/°C
25020050 100 150
-10
40
90
140
190
240
290
340
-60
0 300
+25°C TO +85°C
+25°C TO -40°C
DS1858 toc11
51.90
52.00
52.10
52.20
52.30
52.40
51.80
POSITION FFH RESISTANCE vs. TEMPERATURE
TEMPERATURE (°C)
RESISTANCE (kΩ)
80655035205-10-25-40 95
POSITION 00H RESISTANCE vs. TEMPERATURE
DS1858 toc10
TEMPERATURE (°C)
RESISTANCE (kΩ)
80655035205-10-25
0.96
0.97
0.98
0.99
1.00
0.95
-40 95
Dual Temperature-Controlled Resistors with
Three Monitors
_____________________________________________________________________ 7
Detailed Description
The user can read the registers that monitor the VCC,
MON1, MON2, MON3, and temperature analog signals.
After each signal conversion, a corresponding bit is set
that can be monitored to verify that a conversion has
occurred. The signals also have alarm flags that notify
the user when the signals go above or below the userdefined value. Interrupts can also be set for each signal.
The position values of each resistor can be independently programmed. The user can assign a unique
value to each resistor for every 2°C increment over the
-40°C to +102°C range.
Two buffers are provided to convert logic-level inputs
into open-drain outputs. Typically these buffers are
used to implement transmit (Tx) fault and loss-of-signal
(LOS) functionality. Additionally, OUT1 can be asserted
in the event that one or more of the monitored values
go beyond user-defined limits.
2-Wire Serial Data I/O Pin. This pin is for serial data transfer to and from the device.
2A2SCL 2-Wire Serial Clock Input. The serial clock input is used to clock data into and out of the device.
3C3
Open-Drain Buffer Output
4A1IN1 TTL/CMOS-Compatible Input to Buffer
5B1
Open-Drain Buffer Output
6C2IN2 TTL/CMOS-Compatible Input to Buffer
7C1
WPEN
Write Protect Enable. The device is not write protected if WPEN is connected to ground. This pin has
an internal pullup (R
WPEN
). See Table 6.
8D1
External Analog Input
10 D4
External Analog Input
11 C4
External Analog Input
12 D2 L0
Low-End Resistor 0 Terminal. It is not required that the low-end terminals be connected to a potential
less than the high-end terminals of the corresponding resistor. Voltage applied to any of the resistor
terminals cannot exceed the power-supply voltage, VCC, or go below ground.
13 B3 H0
High-End Resistor 0 Terminal. It is not required that the high-end terminals be connected to a
potential greater than the low-end terminals of the corresponding resistor. Voltage applied to any of
the resistor terminals cannot exceed the power-supply voltage, VCC, or go below ground.
14 B4 L1 Low-End Resistor 1 Terminal
15 A4 H1 High-End Resistor 1 Terminal
16 A3 V
CC
Supply Voltage