General Description
The MAX4888A/MAX4889A high-speed passive switches
route PCI Express®(PCIe) data between two possible
destinations. The MAX4888A is a quad single-pole/double-throw (4 x SPDT) switch ideally suited for switching
two half lanes of PCIe data between two destinations. The
MAX4889A is an octal single-pole/double-throw (8 x
SPDT) switch ideal for switching four half lanes of PCIe
data between four destinations. The MAX4888A/
MAX4889A feature a single digital control input (SEL) to
switch signal paths.
The MAX4888A/MAX4889A are fully specified to operate from a single +3.0V to +3.6V power supply††. The
MAX4888A is available in a 3.5mm x 5.5mm, 28-pin
TQFN package. The MAX4889A is available in a 3.5mm
x 9.0mm, 42-pin TQFN package. Both devices operate
over the -40°C to +85°C temperature range.
Features
♦ Single +3.0V to +3.6V Power-Supply Voltage
♦ Low Same-Pair Skew of 7ps
♦ Low 120µA (Max) Quiescent Current
♦ Supports PCIe Gen I and Gen || Data Rates
♦ Flow-Through Pin Configuration for Ease of
Layout
♦ Industry-Compatible Pinout
♦ Lead-Free Packaging
Applications
Desktop Computers
Servers/Storage Area Networks
Laptops
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
________________________________________________________________
Maxim Integrated Products
1
Pin Configurations
19-0770; Rev 2; 5/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Typical Application Circuit appears at end of data sheet.
††
Contact factory if operating at +2.5V or +1.8V.
PCI Express is a registered trademark of PCI-SIG Corp.
PART TEMP RANGE PIN-PACKAGE CONFIGURATION
MAX4 888AETI+ -40°C to +85°C 28 TQFN-EP* Two Half Lanes
MAX4889AETO+ -40°C to +85°C 42 TQFN-EP* Four Half Lanes
Ordering Information/Selector Guide
+
Denotes lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed paddle.
TOP VIEW
NO2-
NO2+
NO1-
NO1+
V+
GND
NC2-
NC2+
NC1-
NC1+
24 23 22 21 20 19 18 17 16 15
N.C.
14
13
12
11
GND
GND
V+
GND
V+
25
GND
26
V+
*EP
SEL
MAX4888A
N.C.
COM1+
COM1-
27
GND
28
V+
+
12345678910
GND
COM2+
V+
COM2-
TQFN
*CONNECT EXPOSED PADDLE TO GROUND.
NC4+
NC4-
COM3-
NO3+
V+
GND
NC3-
NC3+
V+
NO2-
NO2+
NO1-
NO1+
NC2-
NC2+
NC1-
NC1+
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
39
GND
40
V+
41
GND
V+
*EP
42
+
1234567891011121314151617
COM1+
COM1-
GND
GND
V+
COM2+
COM2-
MAX4889A
V+
SEL
GND
COM3+
TQFN
NO3-
COM4+
NO4+
COM4-
NO4-
21
20
19
18
GND
GND
V+
GND
V+
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V+ = +3.0V to +3.6V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND, unless otherwise noted.)
V+ .............................................................................-0.3V to +4V
SEL, COM__, NO__, NC__ (Note 1) .............-0.3V to (V+ + 0.3V)
| COM__ - NO__ |, | COM__ - NC__ | (Note 1).................0 to +2V
Continuous Current (COM_ to NO__/NC__) .....................±70mA
Peak Current (COM__ to NO__/NC__)
(pulsed at 1ms, 10% duty cycle)..................................±70mA
Continuous Current (SEL).................................................±30mA
Peak Current (SEL)
(pulsed at 1ms, 10% duty cycle)................................±150mA
Continuous Power Dissipation (T
A
= +70°C)
28-Pin TQFN (derate 20.8mW/°C above +70°C) ....1666.7mW
42-Pin TQFN (derate 35.7mW/°C above +70°C) ....2857.1mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Junction Temperature......................................................+150°C
Note 1: Signals on SEL, NO__, NC__ or COM__ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current
to maximum current rating.
ANALOG SW ITCH
Analog-Signal Range
Voltage Between COM and
NO/NC
On-Resistance R
On-Resistance Match Between
Pairs of Same Channel
On-Resistance Match
Between Channels
On-Resistance Flatness R
NO_ or NC_ Off-Leakage
Current
COM_ On-Leakage
Current
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
,
V
COM_
V
NO_, VNC_
| V
COM_
V
NO_
| V
COM_
V
NC_
ON
R
R
FLAT(ON)
I
NO_(OFF)
I
NC_(OFF)
I
COM_(ON)
(V+ - 1.2) V
-
| ,
0 1.8 V
-
|
ON
ON
V+ = +3.0V, I
V
or V
NO_
NC_
V+ = +3.0V, I
V
or V
NO_
NC_
V+ = +3.0V, I
V
or V
NO_
NC_
V+ = +3.0V, I
V
or V
NO_
NC_
V+ = +3.6V, V
or V
V
NO_
NC_
V+ = +3.6V, V
or V
V
NO_
NC_
= 15mA,
COM_
= 0V, +1.8V
= 15mA,
COM_
= 0V (Notes 3, 4)
= 15mA,
COM_
= 0V (Notes 3, 4)
= 15mA
COM_
= 0V, +1.8V (Notes 4, 5)
= 0V, +1.8V,
COM_
= +1.8V, 0V
= 0V, +1.8V,
COM_
= V
or unconnected
COM_
7
0.1 1
0.6 2
0.06 2
-1 +1 μA
-1 +1 μA
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
_______________________________________________________________________________________ 3
Note 2: All units are 100% production tested at TA= +85°C. Limits over the operating temperature range are guaranteed by design
and characterization and are not production tested.
Note 3: ΔR
ON
= R
ON(MAX)
- R
ON(MIN)
.
Note 4: Guaranteed by design. Not production tested.
Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal range.
ELECTRICAL CHARACTERISTICS (continued)
(V+ = +3.0V to +3.6V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 2)
DYNAMIC
Turn-On Time tON V
Turn-Off Time t
Propagation De la y tPD RS = RL = 50, unbalanced, Figure 2 50 ps
Output Skew Between Pairs t
Output Skew Between Same
Pair
On-Los s G
Crosstalk V
Signaling Data Rate BR RS = RL = 50 5.0 Gbps
Off-Isolation V
NO_/NC_ Off-Capacitance
COM_ On-Capacitance C
LOGI C I N PU T
Input-Logic Low VIL 0.5 V
Input-Logic High VIH 1.4 V
Input-Logic H ysteresis V
Input Leakage Current IIN V
POW ER SUPPL Y
Power-Supply Range V+ 1.65 3.60 V
V+ Supply Current I+ V
Input Leakage Current IIN V
ESD PROTECTION
COM_+, COM_- Human Body Model ±6 kV
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
or V
NO_
V
OFF
SK1
t
SK2
LOS
CT1
ISO
C
NO_ /NC_(OFF) Figure 4 1 pF
COM_(ON)
100 mV
HYST
or V
NO_
RS = RL = 50, unbalanced; skew between
any two pairs, Figure 2
RS = RL = 50, unbalanced; skew between
two lines on same pair, Figure 2
RS = RL = 50,
unbalanced,
Figure 3
Crosstalk between
any two pairs,
R
= RL = 50,
S
unbalanced,
Figure 3
Signal = 0dBm,
R
= RL = 50,
S
Figure 3
Figure 4 2 pF
= 0V or V+ -1 +1 μA
SEL
= 0V or V+
SEL
= 0V or V+ -1 +1 μA
SEL
= +1.0V, RL = 50, Figure 1 90 250 ns
NC_
= +1.0V, RL = 50, Figure 1 10 50 ns
NC_
50 ps
10 ps
1MHz < f < 100MHz -0.5
500MHz < f < 1.25GHz -1.4
f = 50MHz -53
f = 1.25GHz -32
f = 10MHz -56
f = 1.25GHz -26
MAX4888A 60
MAX4889A 120
dB
dB
dB
μA
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
4 _______________________________________________________________________________________
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
10.0
9.5
9.0
8.5
8.0
(Ω)
7.5
ON
R
7.0
6.5
6.0
5.5
5.0
-0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1
V+ = +1.8V
V+ = +2.5V
(V)
V
COM_
V+ = +3.3V
ON-RESISTANCE vs. V
COM_
MAX4888A/89A toc01
ON-RESISTANCE vs. V
(V+ = +1.8V)
14
12
10
8
(Ω)
ON
R
6
4
2
0
-0.1 0 0.1 0.2 0.3 0.4 0.5 0.6
V
TA = +25°C
TA = -40°C
(V)
COM_
TA = +85°C
COM_
MAX4888A/89A toc02
(Ω)
ON
R
14
12
10
ON-RESISTANCE vs. V
TA = +25°C
8
6
4
2
0
-0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3
(V+ = +2.5V)
V
(V)
COM_
COM_
TA = +85°C
MAX4888A/89A toc03
TA = -40°C
14
12
10
8
(Ω)
ON
R
6
4
2
0
-0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1
(V+ = +3.3V)
TA = +25°C
V
COM_
ON-RESISTANCE vs. V
COM_
TA = +85°C
MAX4888A/89A toc04
TA = -40°C
(V)
SUPPLY CURRENT vs. TEMPERATURE
80
70
60
50
40
30
SUPPLY CURRENT (μA)
20
10
0
-40 -15 10 35 60 85
TURN-ON/-OFF TIME vs. SUPPLY VOLTAGE
240
220
200
180
160
140
(ns)
120
OFF
/t
100
ON
NC_ tON
t
80
60
NO_ t
40
20
0
1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
(MAX4889A)
V+ = +3.3V
V+ = +2.5V
V+ = +1.8V
TEMPERATURE (°C)
NO_ t
OFF
NC_ t
SUPPLY VOLTAGE (V)
OFF
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
1.2
1.1
MAX4888A/89A toc05
1.0
0.9
0.8
LOGIC THRESHOLD (V)
0.7
0.6
0.5
ON
MAX4888A/89A toc07
V
IH
V
IL
1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
SUPPLY VOLTAGE (V)
MAX4888A/89A toc06
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
EYE DIAGRAM
(V+ = +1.8V, f = 1.25GHz,
PRBS SIGNAL, RS = RL = 50Ω)†
P-P
50ps/div
*PRBS = PSEUDORANDOM BIT SEQUENCE
†
= GEN 1, 2.5Gbps; U1 = 400ps
V
COM_+
50mV/div
V
COM_-
600mV
EYE DIAGRAM
(V+ = +1.8V, f = 2.5GHz,
PRBS SIGNAL, RS = RL = 50Ω)
P-P
V
COM_+
600mV
MAX4888A/89A toc08
††
EYE DIAGRAM
(V+ = +3.3V, f = 1.25GHz,
PRBS SIGNAL, RS = RL = 50Ω)
P-P
50ps/div
*PRBS = PSEUDORANDOM BIT SEQUENCE
†
= GEN 1, 2.5Gbps; U1 = 400ps
EYE DIAGRAM
(V+ = +3.3V, f = 2.5GHz,
PRBS SIGNAL, RS = RL = 50Ω)
P-P
V
COM_+
50mV/div
V
COM_-
V
COM_+
EYE DIAGRAM
(V+ = +2.5V, f = 1.25GHz,
600mV
PRBS SIGNAL, RS = RL = 50Ω)
P-P
50ps/div
*PRBS = PSEUDORANDOM BIT SEQUENCE
†
= GEN 1, 2.5Gbps; U1 = 400ps
EYE DIAGRAM
(V+ = +2.5V, f = 2.5GHz,
600mV
PRBS SIGNAL, RS = RL = 50Ω)
P-P
†
MAX4888A/89A toc09
††
V
COM_+
50mV/div
V
COM_-
V
COM_+
600mV
600mV
†
MAX4888A/89A toc10
††
50mV/div
V
COM_-
25ps/div
*PRBS = PSEUDORANDOM BIT SEQUENCE
††
= GEN 11, 5.0Gbps; U1 = 200ps
MAX4888A/89A toc11
50mV/div
V
COM_-
25ps/div
*PRBS = PSEUDORANDOM BIT SEQUENCE
††
= GEN 11, 5.0Gbps; U1 = 200ps
MAX4888A/89A toc12
50mV/div
V
COM_-
25ps/div
*PRBS = PSEUDORANDOM BIT SEQUENCE
††
= GEN 11, 5.0Gbps; U1 = 200ps
MAX4888A/89A toc12
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
6 _______________________________________________________________________________________
Pin Description
PIN
MAX4 888A MAX4889A
1, 10, 12, 14,
20, 25, 27
2 9 SEL Digital Control Input
3, 9 — N.C. No Connection. Not internally connected.
4 2 COM1+ Analog Switch 1. Common Positive Termina l.
5 3 COM1- Analog Switch 1. Common Negative Terminal.
6 6 COM2+ Analog Switch 2. Common Positive Termina l.
7 7 COM2- Analog Switch 2. Common Negative Terminal.
8, 11, 13, 19,
26, 28
15 31 NO2- Analog Switch 2. Normall y Open Negative Terminal.
16 32 NO2+ Analog Switch 2. Normally Open Positive Terminal.
17 33 NO1- Analog Switch 1. Normall y Open Negative Terminal.
18 34 NO1+ Analog Switch 1. Normally Open Positive Terminal.
21 35 NC2- Analog Switch 2. Normally Closed Negative Terminal.
22 36 NC2+ Analog Switch 2. Normally C lo sed Positive Terminal.
23 37 NC1- Analog Switch 1. Normally Closed Negative Terminal.
24 38 NC1+ Analog Switch 1. Normally C lo sed Positive Terminal.
— 11 COM3+ Analog Switch 3. Common Posit ive Terminal.
— 12 COM3- Analog Switch 3. Common Negative Terminal.
— 15 COM4+ Analog Switch 4. Common Posit ive Terminal.
— 16 COM4- Analog Switch 4. Common Negative Terminal.
— 22 NO4- Analog Switch 4. Normally Open Negative Terminal.
— 23 NO4+ Analog Switch 4. Normal ly Open Posit ive Terminal.
— 24 NO3- Analog Switch 3. Normally Open Negative Terminal.
— 25 NO3+ Analog Switch 3. Normal ly Open Posit ive Terminal.
— 26 NC4- Analog Switch 4. Normally Closed Negative Terminal.
— 27 NC4+ Analog Switch 4. Normally Closed Positive Terminal.
— 28 NC3- Analog Switch 3. Normally Closed Negative Terminal.
— 29 NC3+ Analog Switch 3. Normally Closed Positive Terminal.
— — EP Exposed Paddle. Connect EP to GND.
1, 4, 10, 14, 17,
19, 21, 39, 41
5, 8, 13, 18,
20, 30,
40, 42
NAME FUNCTION
GND Ground
Positive-Supply Voltage Input. Connect V+ to a +3.0V to +3.6V supply voltage.
V+
Bypass V+ to GND with a 0.1μF capacitor placed as close to the device as
possible (See the Board Layout section).
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
_______________________________________________________________________________________ 7
Figure 1. Switching Time
Test Circuits/Timing Diagrams
MAX4888A/MAX4889A
V
N_
LOGIC
INPUT
+3.3V
V+
L
NC_
COM_
R
L
)
ON
NO_
OR NC_
SEL
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
RL + R
VN_ = V
= V
NO_
N_ (
R
OR V
V
LOGIC
INPUT
V
OUT
C
L
SWITCH
OUTPUT
IH
V
IL
0V
V
50%
t
ON
OUT
0.9 x V
0UT
tr < 5ns
tf < 5ns
t
OFF
0.9 x V
OUT
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
8 _______________________________________________________________________________________
Test Circuits/Timing Diagrams (continued)
Figure 2. Propagation Delay and Output Skew
+3.3V
V+
MAX4888A/MAX4889A
NC_+
NC_-
COM
COM
_+
_-
IN+
NO_+ OR
R
S
NO_- OR
R
IN-
S
SEL
+1.5V
V
V
V
OUT+
IN+
0V
+1.5V
IN-
0V
t
PLHX
+1.5V
0V
50%
50%
50%
t
50%
50%
PHLX
50%
OUT+
RISE-TIME PROPAGATION DELAY = t
R
L
R
L
FALL-TIME PROPAGATION DELAY = t
t
=
DIFFERENCE IN PROPAGATION DELAY (RISE-FALL)
SK1
BETWEEN ANY TWO PAIRS
t
= | t
SK2
OUT-
t
INRISE
PLHX
BETWEEN TWO LINES ON THE SAME PAIR
90%
10% 10%
t
OUTRISE
90%
10% 10%
OR t
PLHX
PLHY
OR t
PHLX
PHLY
- t
PHLY
| OR | t
PHLX
t
INFALL
- t
|
PLHY
90%
t
OUTFALL
90%
+1.5V
V
OUT-
50%
50%
0V
t
PHLY
t
PLHY
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
_______________________________________________________________________________________ 9
Detailed Description
The MAX4888A/MAX4889A high-speed passive switches route PCIe data between two possible destinations.
The MAX4888A/MAX4889A are ideal for routing PCIe signals to change the system configuration. For example, in
a graphics application, the MAX4888A/MAX4889A create
two sets of eight lanes from a single 16-lane bus. The
MAX4888A/MAX4889A feature a single digital control
input (SEL) to switch signal paths.
The MAX4888A/MAX4889A are fully specified to operate from a single +3.0V to +3.6V power supply
††
.
Digital Control Input (SEL)
The MAX4888A/MAX4889A provide a single digital control input (SEL) to select the signal path between the
COM__ and NO__/NC__ channels. The truth tables for
the MAX4888A/MAX4889A are depicted in the
Functional Diagrams/Truth Table
section. Drive SEL rail-
to-rail to minimize power consumption.
Analog Signal Levels
The MAX4888A/MAX4889A accept standard PCIe signals to a maximum of V+ - 1.2V. Signals on the COM_+
channels are routed to either the NO_+ or NC_+ channels, and signals on the COM_- channels are routed to
either the NO_- or NC_- channels. The MAX4888A/
MAX4889A are bidirectional switches, allowing COM__,
NO__, and NC__ to be used as either inputs or outputs.
Figure 4. Channel Off-/On-Capacitance
Figure 3. On-Loss, Off-Isolation, and Crosstalk
Test Circuits/Timing Diagrams (continued)
††
Contact factory if operating at +2.5V or +1.8V.
0.1μF
+3.3V
0V OR V+
50Ω
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED BETWEEN ANY TWO PAIRS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
SEL
NC_
V+
COM_
MAX4888A/MAX4889A
NO_
GND
V
NETWORK
ANALYZER
V
IN
V
OUT
50Ω
MEAS REF
50Ω 50Ω
50Ω
OFF-ISOLATION = 20log
ON-LOSS = 20log
CROSSTALK = 20log
OUT
V
IN
V
OUT
V
IN
V
OUT
V
IN
+3.3V
0.1μF
V+
CAPACITANCE
METER
COM_
NC_ or
NO_
MAX4888A/MAX4889A
GND
SEL
OR V
V
IL
IH
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
10 ______________________________________________________________________________________
Functional Diagrams/Truth Table
V+
MAX4888A
COM1+
COM1-
COM2+
COM2-
SEL
SEL
0
1
GND
COM__TO
NC__
ON
OFF
COM__TO
NO__
OFF
ON
NC1+
NC1-
NO1+
NO1-
NC2+
NC2-
NO2+
NO2-
COM1+
COM1-
COM2+
COM2-
COM3+
COM3-
COM4+
COM4-
V+
MAX4889A
NC1+
NC1-
NO1+
NO1-
NC2+
NC2-
NO2+
NO2-
NC3+
NC3-
NO3+
NO3-
NC4+
NC4-
NO4+
SEL
GND
NO4-
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
______________________________________________________________________________________ 11
Applications Information
PCIe Switching
The MAX4888A/MAX4889A primary applications are
aimed at reallocating PCIe lanes (see Figure 5). For
example, in graphics applications, several manufacturers
have found that it is possible to improve performance by
a factor of nearly two by splitting a single 16-lane PCIe
bus into two 8-lane buses. Two of the more prominent
examples are SLI™ (Scaled Link Interface) and
CrossFire™. The MAX4889A permits a computer
motherboard to operate properly with a single 16-lane
graphics card, and can later be updated to dual cards.
The same motherboard can be used with dual cards
where the user sets a jumper or a bit through software
to switch between single- or dual-card operation.
Common mode below 1V operation requirement.
Board Layout
High-speed switches require proper layout and design
procedures for optimum performance. Keep designcontrolled impedance PCB traces as short as possible
or follow impedance layouts per the PCIe specification.
Ensure that power-supply bypass capacitors are
placed as close to the device as possible. Multiple
bypass capacitors are recommended. Connect all
grounds and the exposed pad to large ground planes.
Common mode below 1V operation requirement.
ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electrostatic discharges encountered during handling and
assembly. The COM_+ and COM_- lines have extra
protection against static electricity. Maxim’s engineers
have developed state-of-the-art structures to protect
these pins against ESD of ±6kV without damage. The
ESD structures withstand ±6kV of ESD in all states: normal operation, state output mode, and powered down.
Human Body Model
The MAX4889A COM_+ and COM_- pins are characterized for ±6kV ESD protection using the Human Body
Model (MIL-STD-883, Method 3015). Figure 6 shows
the Human Body Model and Figure 7 shows the current
waveform it generates when discharged into low
impedance. This model consists of a 100pF capacitor
charged to the ESD voltage of interest, which is then
discharged into the device through a resistor.
Figure 5. The MAX4888A/MAX4889A Used as a Single-Lane
Switch
CrossFire is a trademark of ATI Technologies, Inc.
SLI is a trademark of NVIDIA Corporation.
Chip Information
PROCESS: CMOS
Figure 6. Human Body ESD Test Model
Figure 7. Human Body Model Current Waveform
DATA
DIRECTION
HIGH-
VOLTAGE
DC
SOURCE
R
C
1MΩ
CHARGE-CURRENT-
LIMIT RESISTOR
C
s
100pF
R
D
1500Ω
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
ONE LANE
NOTE: ONLY ONE LANE IS SHOWN FOR CLARITY
MAX4888A
MAX4889A
DATA IS ROUTED
TO EITHER
BOARD A OR B
AB
PEAK-TO-PEAK RINGING
I
r
(NOT DRAWN TO SCALE)
AMPERES
IP 100%
90%
36.8%
10%
0
0
t
RL
TIME
t
DL
CURRENT WAVEFORM
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
12 ______________________________________________________________________________________
Typical Application Circuit
PCIe GRAPHICS INTERFACE
GRAPHICS
PCIe BUS
LANE 0 TX
LANE 1 TX
LANE 2 TX
LANE 3 TX
COM1+
COM1-
COM2+
COM2-
COM3+
COM3-
COM4+
COM4-
MAX4889A
SEL
NC1+
NC1-
NC2+
NC2-
NC3+
NC3-
NC4+
NC4-
NO1+
NO1-
NO2+
NO2-
NO3+
NO3-
NO4+
NO4-
CARD 1
GRAPHICS
CARD 2
LANE 0 RX
LANE 1 RX
LANE 2 RX
LANE 3 RX
COM1+
COM1-
COM2+
COM2-
COM3+
COM3-
COM4+
COM4-
MAX4889A
SEL
CHANNEL SELECT
NC1+
NC1-
NC2+
NC2-
NC3+
NC3-
NC4+
NC4-
NO1+
NO1-
NO2+
NO2-
NO3+
NO3-
NO4+
NO4-
CHANNEL SELECT
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
______________________________________________________________________________________ 13
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
28 TQFN-EP T283555-1
21-0184
42 TQFN-EP T423590M-1
21-0181
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
MAX4888A/MAX4889A
5.0Gbps PCI Express Passive Switches
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products. Inc.
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION PAGES CHANGED
0 4/07 Initial release —
2 5/09 Updated voltage range, style edits. 1, 2, 3, 5–9, 13, 14
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