Maxim Integrated MAX2769 User Manual

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Keywords: GPS, receiver, GPS receiver, MAX2769, 2769, 1575MHz, Integrated GPS Receiver, Global Positioning System

USER GUIDE 3910

User's Guide for the MAX2769 GPS Receiver

By: David Weber, Strategic Applications Engineer
Sep 22, 2006

Abstract: This note describes the MAX2769, a low-cost, single-conversion, low - IF GPS receiver chip that offers more flexibility
and performance than its predecessors. Also included is a test procedure for the MAX2769 evaluation kit (EV kit) and some
suggested SPI™ register settings for evaluation purposes.

Introduction

The MAX2769 is a low- cost, single - conversion, low- IF GPS receiver chip that offers more
flexibility and performance than its predecessors. This device covers a wide range of GPS
applications such as mobile handsets, PDAs and embedded PC, and automotive
applications. It represents the most flexible, high-performance, low-power GPS receiver
on the market.

IC Features

Click here for an overview of the wireless
components used in a typical radio
transceiver.

Low DC Power Consumption

Power required is typically 16mA to 23mA at 3V. Using SPI control, the device can be placed in idle mode, in which only the
clock buffer and temperature sensor are active and the current consumption drops to 0.5mA.

Low Associated BOM Cost and Reduced Size

The MAX2769 is a direct down -conversion design with internal filtering that eliminates the need for external filtering
components. An excellent noise figure (NF) of 1.4dB for the cascaded chain (with a 0.8dB typical first-stage NF) allows this
device to be used with a passive antenna. No external LNA is required. Because the design removes intermediate frequency
filtering and preamplification, the MAX2769 requires less board space to implement a receiver.

Flexibility for Applications Involving Active Antennas

A designer can use this device with an active antenna, as in an automotive application. For an active-antenna application, a
second internal path can be selected, which leads to a different LNA (LNA2) with lower gain (13dB vs. 19dB) and a slightly
higher NF (1.1dB vs. 0.8dB). This approach results in a power savings of 16mA to 19mA vs. 23mA to 21mA at 3V in default
mode.

A voltage is provided at pin 3 specifically to bias the active device. This voltage can be turned off through the SPI interface for
passive - antenna applications. If, however, the voltage is enabled, then LNA selection can be done automatically depending on
whether there is an active antenna present. In the LNA-gated mode, the receiver is configured to automatically switch between
the two LNAs contingent on whether a load current in excess of 1.5mA is detected at the antenna bias pin. A user does not
need separate designs for applications using active and passive antennas; the chip automatically selects the appropriate LNA

for any application. If automatic LNA selection is not desired, it can be disabled through the Config1 register <14:13>.

Internal Capacitive Load Trimming for Crystal References

A temperature sensor is included, which can be calibrated externally if desired. While lock-detect status can be obtained at the

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When using the MAX2769 with a crystal reference, no tuning of external load capacitors is required to match devices—a bank
of internal crystal load capacitors can be programmed through the SPI interface to trim the load to yield the correct reference
frequency. The internal bank can be programmed over a range of about 11pF to 17pF (settings plus 9pF of parasitic
capacitance). A single series capacitor is placed between the crystal and the crystal/reference input. If the desired load value is
between 11pF and 17pF, the value of this coupling capacitor can be made large (e.g., 10nF), so as not to affect the
programmed value. For crystals with load capacitances below 11pF, the coupling capacitor can be made small to add in series
with the internal bank, reducing the load seen at the device. Either way, the final frequency trimming can be done internally
through the SPI interface.

Reference and IF Frequency Flexibility

The design accommodates a wide range of reference frequencies between 8MHz and 44MHz with a default setting of

16.328MHz. The IF frequency is adjustable in 63 steps between 0 and 12.5MHz, with a default setting of 4.092MHz. (It is
recommended that the IF frequency be kept at or below 4.092MHz, as additional steps may need to be taken to assure stability
at higher frequencies.) Because of a fractional-N synthesizer that permits small step size while maintaining excellent phase
noise, this flexibility does not compromise performance. No other product on the market has this degree of flexibility.

IF Filter Flexibility

Filtering at IF is important as it limits the noise bandwidth and improves sensitivity while eliminating interference. The
MAX2769's IF filtering is highly flexible. The design uses a complex polyphase Butterworth configuration that can be set to 3rd
or 5th order, and either bandpass or lowpass as the application dictates. The center frequency is also programmable to match
the selected IF. The 3dB bandwidths can be selected as 2.5MHz, 4.2MHz, 8.0MHz, or 18MHz. Users can choose a design that
optimizes performance for their application. (Note: These are two -sided 3dB bandwidths. When the lowpass option is selected,
the bandwidths are cut in half and become 1.25MHz, 2.1MHz, 4.0MHz, and 9MHz. In fact, the highest setting should only be
used in a lowpass configuration.) In the predecessor to this part, a 4.8MHz lowpass filter was required to pass the fixed-IF
frequency data. In this design, a 2.6MHz bandpass design could be employed, thus reducing the noise bandwidth by nearly
3dB and enhancing system sensitivity. Filters (in bandpass mode) are designed to have no more than 1dB droop at F
±1.023MHz.

C

High System Gain with a Wide Range of Level Control

To use the MAX2769 without an active antenna in a low -signal-strength environment, it is imperative that the receiver have
sufficient gain. This device typically has up to 110dB available gain (in analog mode) with 60dB to 65dB of gain adjustment.

Access to the Amplified RF Signal for Coexistence Filtering

While no external filtering is required for stand-alone applications, coexistence with cellular or WiLAN transmissions in close
proximity may require additional filtering to prevent overdriving the GPS receiver front-end. On the MAX2769, the RF signal
has been made accessible between the first LNA stage output and mixer input (pins 2 and 5 respectively). If filtering is not
desired, these ports can be connected through a coupling capacitor. However, filtering introduced at this point has minimal
effect on the excellent sensitivity of the receiver. (For example, for typical device parameters, a SAW filter with 1dB insertion
loss would degrade cascaded NF (and thus GPS sensitivity) by only about 0.15dB.

Flexibility of Output Modes

Most GPS devices provide only a single-output mode. The MAX2769's output can be programmed to be analog, CMOS, or
limited differential logic in unsigned or complimentary binary format with 1- to 3-bit output from the ADC.

Temperature Sensor and Status Monitoring

LD pin, the part can be programmed to instead provide the output signal, the reference clock, or results from a sigma -delta

test. It can also be programmed to provide a short to the active antenna or to be an independent test point for voltage.

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The part is programmed through ten registers across a 3-wire SPI interface. Registers are described in Table 1 . For further
details, please refer to the MAX2769 data sheet.

Table 1. Description of SPI Configuration Registers

Register Address Function Default

CONF1<31:0> 0000 Configures Rx and IF sections, sets antenna bias and LNA autoselect A2919A3
CONF2<31:0> 0001 Configures AGC and output format 055028C
CONF3<31:0> 0010 Configures PGA, and details of AGC, filtering, and data streaming EAFE1DC
PLLCONFIG<31:0> 0011 Sets PLL, VCO, and CLK settings 9EC0008
DIV<31:0> 0100 Sets PLL main and reference division ratios 0C00080
FDIV<31:0> 0101 Sets PLL fractional division ratios 8000070
STRM<31:0> 0110 Configures DSP interface frame streaming 8000000
CLK<31:0> 0111 Sets fractional clock divider values 10061B2
TEST1<31:0> 1000 Sets up test mode 1E0D401
TEST2<31:0> 1001 Sets up test mode 14C0002

For initial characterization in a MAX2769 EV kit, the parameters listed in Table 2 can be measured with the suggested
procedures that follow. The MAX2769 EV kit data sheet should be consulted for more details. Some settings differ from default
values to facilitate testing; users are free to select different settings.

Table 2. Parameters to be Tested in Suggested Procedure

Parameter

Pins at which
measurements are made
on the MAX2769

Connectors at which
measurements are made on the
MAX2769 EV kit

Target value

LNA1 Gain 27–2 J7–J8 19dB
LNA2 Gain 25–2 J6–J8 13dB
System IP3 with

LNA1
System IP3 with

LNA2
LNA1 NF (Default

Mode)

27–18 J7–J2 -26dBm

25–18 J6–J2 -20dBm

27–2 J7–J8 0.8dB

LNA2 NF 25–2 J6–J8 1.5dB
LNA1 P1dB (Output) 27–2 J7–J8 8dBm
LNA2 P1dB (Output) 25–2 J6–J8 10dB
Cascaded System

NF, LNA1
Cascaded System

NF, LNA2
Current

Consumption
(Default Mode,

27–18 J7–J2 1.4dB

25–18 J6–J2 2.7dB

19mA (default mode device only)

11, 13, 14, 19, 23 W19, W20, W11, W12

(36mA at 3V, 140mA at ±5V for entire