General Description
The MAX12557 is a dual 3.3V, 14-bit analog-to-digital
converter (ADC) featuring fully differential wideband
track-and-hold (T/H) inputs, driving internal quantizers.
The MAX12557 is optimized for low power, small size,
and high dynamic performance in intermediate frequency (IF) and baseband sampling applications. This dual
ADC operates from a single 3.3V supply, consuming
only 610mW while delivering a typical 72.5dB signal-tonoise ratio (SNR) performance at a 175MHz input frequency. The T/H input stages accept single-ended or
differential inputs up to 400MHz. In addition to low operating power, the MAX12557 features a 166µW powerdown mode to conserve power during idle periods.
A flexible reference structure allows the MAX12557 to
use the internal 2.048V bandgap reference or accept
an externally applied reference and allows the reference to be shared between the two ADCs. The reference structure allows the full-scale analog input range
to be adjusted from ±0.35V to ±1.15V. The MAX12557
provides a common-mode reference to simplify design
and reduce external component count in differential
analog input circuits.
The MAX12557 supports either a single-ended or differential input clock. User-selectable divide-by-two (DIV2)
and divide-by-four (DIV4) modes allow for design flexibility and help eliminate the negative effects of clock jitter.
Wide variations in the clock duty cycle are compensated
with the ADC’s internal duty-cycle equalizer (DCE).
The MAX12557 features two parallel, 14-bit-wide,
CMOS-compatible outputs. The digital output format is
pin-selectable to be either two’s complement or Gray
code. A separate power-supply input for the digital outputs accepts a 1.7V to 3.6V voltage for flexible interfacing with various logic levels. The MAX12557 is available
in a 10mm x 10mm x 0.8mm, 68-pin thin QFN package
with exposed paddle (EP), and is specified for the
extended (-40°C to +85°C) temperature range.
For a 12-bit, pin-compatible version of this ADC, refer to
the MAX12527 data sheet.
Applications
IF and Baseband Communication Receivers
Cellular, LMDS, Point-to-Point Microwave,
MMDS, HFC, WLAN
I/Q Receivers
Ultrasound and Medical Imaging
Portable Instrumentation
Digital Set-Top Boxes
Low-Power Data Acquisition
Features
♦ Direct IF Sampling Up to 400MHz
♦ Excellent Dynamic Performance
74.1dB/72.5dB SNR at f
IN
= 70MHz/175MHz
83.4dBc/79.5dBc SFDR at f
IN
= 70MHz/175MHz
♦ 3.3V Low-Power Operation
637mW (Differential Clock Mode)
610mW (Single-Ended Clock Mode)
♦ Fully Differential or Single-Ended Analog Input
♦ Adjustable Differential Analog Input Voltage
♦ 750MHz Input Bandwidth
♦ Adjustable, Internal or External, Shared Reference
♦ Differential or Single-Ended Clock
♦ Accepts 25% to 75% Clock Duty Cycle
♦ User-Selectable DIV2 and DIV4 Clock Modes
♦ Power-Down Mode
♦ CMOS Outputs in Two’s Complement or Gray
Code
♦ Out-of-Range and Data-Valid Indicators
♦ Small, 68-Pin Thin QFN Package
♦ 12-Bit Compatible Version Available (MAX12527)
♦ Evaluation Kit Available (Order MAX12557 EV Kit)
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3544; Rev 0; 2/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART
TEMP RANGE
PIN-PACKAGE
MAX12557ETK
68 Thin QFN-EP*
(10mm x 10mm x 0.8mm)
*EP = Exposed paddle.
PART
SAMPLING RATE
(Msps)
RESOLUTION
(Bits)
MAX12557 65 14
MAX12527 65 12
Selector Guide
Pin Configuration appears at end of data sheet.
-40°C to +85°C
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -0.5dBFS (differential), DIFFCLK/
SECLK = OVDD, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f
CLK
= 65MHz, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND ................................................................-0.3V to +3.6V
OV
DD
to GND............-0.3V to the lower of (VDD+ 0.3V) and +3.6V
INAP, INAN to GND ...-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
INBP, INBN to GND ...-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
CLKP, CLKN to
GND ........................-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFIN, REFOUT
to GND ..................-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFAP, REFAN,
COMA to GND ......-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
REFBP, REFBN,
COMB to GND ......-0.3V to the lower of (V
DD
+ 0.3V) and +3.6V
DIFFCLK/SECLK, G/T, PD, SHREF, DIV2,
DIV4 to GND .........-0.3V to the lower of (VDD+ 0.3V) and +3.6V
D0A–D13A, D0B–D13B, DAV,
DORA, DORB to GND..............................-0.3V to (OV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
68-Pin Thin QFN 10mm x 10mm x 0.8mm
(derate 70mW/°C above +70°C) ....................................4000mW
Operating Temperature Range................................-40°C to +85°C
Junction Temperature ...........................................................+150°C
Storage Temperature Range .................................-65°C to +150°C
Lead Temperature (soldering 10s).......................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
Resolution 14 Bits
Integral Nonlinearity INL fIN = 3MHz
LSB
Differential Nonlinearity DNL
f
IN
= 3MHz, no missing codes over
temperature (Note 2)
LSB
Offset Error
%FSR
Gain Error
%FSR
ANALOG INPUT (INAP, INAN, INBP, INBN)
Differential Input Voltage Range V
DIFF
Differential or single-ended inputs
V
Common-Mode Input Voltage
V
Analog Input Resistance R
IN
Each input, Figure 3 3.4 kΩ
C
PAR
Fixed capacitance to ground,
each input, Figure 3
2
Analog Input Capacitance
Switched capacitance,
each input, Figure 3
4.5
pF
CONVERSION RATE
Maximum Clock Frequency f
CLK
65 MHz
Minimum Clock Frequency 5 MHz
Data Latency Figure 5 8
Clock
Cycles
DYNAMIC CHARACTERISTICS (differential inputs)
Small-Signal Noise Floor SSNF Input at -35dBFS
76
dBFS
fIN = 3MHz at -0.5dBFS
75
fIN = 32.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
Signal-to-Noise Ratio SNR
f
IN
= 175MHz at -0.5dBFS
dB
±2.1
-1.0 ±0.6 +1.3
C
SAMPLE
74.5
72.5
70.4 72.5
±0.1 ±0.9
±0.5 ±5.0
±1.024
V
/ 2
DD
74.5
74.1
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -0.5dBFS (differential), DIFFCLK/SECLK = OV
DD
, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f
CLK
= 65MHz, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
fIN = 3MHz at -0.5dBFS (Note 3)
fIN = 32.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
Signal-to-Noise Plus Distortion SINAD
f
IN
= 175MHz at -0.5dBFS
dB
fIN = 3MHz at -0.5dBFS (Note 3)
fIN = 32.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
Spurious-Free Dynamic Range SFDR
f
IN
= 175MHz at -0.5dBFS
dBc
fIN = 3MHz at -0.5dBFS (Note 3)
fIN = 32.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
Total Harmonic Distortion THD
f
IN
= 175MHz at -0.5dBFS
dBc
fIN = 3MHz at -0.5dBFS
fIN = 32.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
Second Harmonic HD2
f
IN
= 175MHz at -0.5dBFS
dBc
fIN = 3MHz at -0.5dBFS -93
fIN = 32.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
Third Harmonic HD3
f
IN
= 175MHz at -0.5dBFS
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
-88
Two-Tone Intermodulation
Distortion (Note 2)
TTIMD
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
3rd-Order Intermodulation
Distortion
IM3
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
dBc
f
IN1
= 68.5MHz at -7dBFS
f
IN2
= 71.5MHz at -7dBFS
89
Two-Tone Spurious-Free
Dynamic Range
f
IN1
= 172.5MHz at -7dBFS
f
IN2
= 177.5MHz at -7dBFS
dBc
Full-Power Bandwidth FPBW Input at -0.2dBFS, -3dB rolloff
MHz
Aperture Delay t
AD
Figure 5 1.2 ns
Aperture Jitter t
AJ
ps
RMS
Output Noise n
OUT
INAP = INAN = COMA
INBP = INBN = COMB
LSB
RMS
SYMBOL
SFDR
TT
MIN TYP MAX
71.8 74.4
73.10
73.4
71.5
75.5 86.6
82.8
83.4
79.5
-84.5 -74.5
-80.7
-81.7
-78.3
-89.5
-84.2
-84.7
-79.5
-85.5
-86.5
-87.2
-82.4
-91.5
-87.6
82.4
750
<0.15
1.02
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -0.5dBFS (differential), DIFFCLK/SECLK = OV
DD
, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f
CLK
= 65MHz, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
Overdrive Recovery Time ±10% beyond full scale 1
Clock
Cycle
INTERCHANNEL CHARACTERISTICS
f
INA
or f
INB
= 70MHz at -0.5dBFS 90
Crosstalk Rejection
f
INA
or f
INB
= 175MHz at -0.5dBFS 85
dB
Gain Matching
dB
Offset Matching
%FSR
INTERNAL REFERENCE (REFOUT)
REFOUT Output Voltage
V
REFOUT Load Regulation -1mA < I
REFOUT
< +1mA 35
mV/mA
REFOUT Temperature Coefficient
TC
REF
ppm/°C
Short to VDD—sinking
REFOUT Short-Circuit Current
Short to GND—sourcing 2.1
mA
BUFFERED REFERENCE MODE (REFIN is driven by REFOUT or an external 2.048V single-ended reference source;
V
REFAP/VREFAN/VCOMA
and V
REFBP/VREFBN/VCOMB
are generated internally)
REFIN Input Voltage V
REFIN
V
REFIN Input Resistance R
REFIN
MΩ
COM_ Output Voltage
V
COMA
V
COMB
VDD / 2
V
REF_P Output Voltage
V
REFAP
VDD / 2 + (V
REFIN
x 3/8)
V
REF_N Output Voltage
V
REFAN
VDD / 2 - (V
REFIN
x 3/8)
V
Differential Reference Voltage
V
REFA
V
REFB
V
REFA
= V
REFAP
- V
REFAN
V
REFB
= V
REFBP
- V
REFBN
V
Differential Reference
Temperature Coefficient
TC
REF
ppm/°C
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, V
REFAP/VREFAN/VCOMA
and V
REFBP/VREFBN/VCOMB
are applied
externally, V
COMA
= V
COMB
= VDD / 2)
REF_P Input Voltage
V
REFAP
V
REF_P
- V
COM
V
REF_N Input Voltage
V
REFAN
V
REF_N
- V
COM
V
COM_ Input Voltage V
COM
VDD / 2
V
Differential Reference Voltage
V
REFA
V
REFB
V
REF_
= V
REF_P
- V
REF_N
= V
REFIN
x 3/4
V
SYMBOL
MIN TYP MAX
±0.01 ±0.1
±0.01
V
REFOUT
2.000 2.048 2.080
V
REFBP
V
REFBN
1.60 1.65 1.70
1.460 1.536 1.580
±50
0.24
2.048
>50
2.418
0.882
±25
V
REFBP
V
REFBN
+0.768
-0.768
1.65
1.536
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -0.5dBFS (differential), DIFFCLK/SECLK = OV
DD
, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f
CLK
= 65MHz, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
REF_P Sink Current
I
REFAP
I
REFBP
V
REF_P
= 2.418V 1.2 mA
REF_N Source Current
I
REFAN
I
REFBN
V
REF_N
= 0.882V
mA
COM_ Sink Current
I
COMA
I
COMB
V
COM_
= 1.65V
mA
REF_P, REF_N Capacitance
C
REF_P
,
13 pF
COM_ Capacitance C
COM_
6pF
CLOCK INPUTS (CLKP, CLKN)
Single-Ended Input High
Threshold
V
IH
DIFFCLK/SECLK = GND, CLKN = GND
0.8 x
V
Single-Ended Input Low
Threshold
V
IL
DIFFCLK/SECLK = GND, CLKN = GND
0.2 x
V
Minimum Differential Clock Input
Voltage Swing
DIFFCLK/SECLK = OV
DD
0.2 V
P-P
Differential Input Common-Mode
Voltage
DIFFCLK/SECLK = OV
DD
V
CLK_ Input Resistance R
CLK
Each input, Figure 4 5 kΩ
CLK_ Input Capacitance C
CLK
2pF
DIGITAL INPUTS (DIFFCLK/SECLK, G/T, PD, DIV2, DIV4)
Input High Threshold V
IH
0.8 x
V
Input Low Threshold V
IL
0.2 x
V
OVDD applied to input ±5
Input Leakage Current
Input connected to ground ±5
µA
Digital Input Capacitance C
DIN
5pF
DIGITAL OUTPUTS (D0A–D13A, D0B–D13B, DORA, DORB, DAV)
D0A–D13A, D0B–D13B, DORA, DORB:
I
SINK
= 200µA
0.2
Output-Voltage Low V
OL
DAV: I
SINK
= 600µA 0.2
V
D0A–D13A, D0B–D13B, DORA, DORB:
I
SOURCE
= 200µA
OV
DD
-
0.2
Output-Voltage High V
OH
DAV: I
SOURCE
= 600µA
OV
DD
-
0.2
V
OVDD applied to input ±5
Tri-State Leakage Current
(Note 3)
I
LEAK
Input connected to ground ±5
µA
SYMBOL
C
REF_N
MIN TYP MAX
0.85
0.85
V
DD
V
DD
V
DD
/ 2
OV
DD
OV
DD
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -0.5dBFS (differential), DIFFCLK/SECLK = OV
DD
, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f
CLK
= 65MHz, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
D 0A–D 13A, D O RA,
D 0B–D 13B and D ORB Tr i - S tate
O utp ut C ap aci tance ( N ote 3)
C
OUT
3pF
DAV Tri-State Output
Capacitance (Note 3)
C
DAV
6pF
POWER REQUIREMENTS
Analog Supply Voltage V
DD
V
Digital Output Supply Voltage OV
DD
2.0
V
Normal operating mode
f
IN
= 175MHz at -0.5dBFS,
single-ended clock
(DIFFCLK/SECLK = GND)
Normal operating mode
f
IN
= 175MHz at -0.5dBFS
differential clock
(DIFFCLK/SECLK = OV
DD
)
Analog Supply Current I
VDD
Power-down mode (PD = OVDD)
clock idle
mA
Normal operating mode
f
IN
= 175MHz at -0.5dBFS
single-ended clock
(DIFFCLK/SECLK = GND)
Normal operating mode
f
IN
= 175MHz at -0.5dBFS
differential clock
(DIFFCLK/SECLK = OV
DD
)
Analog Power Dissipation P
VDD
Power-down mode (PD = OVDD)
clock idle
mW
Normal operating mode
f
IN
= 175MHz at -0.5dBFS
Digital Output Supply Current I
OVDD
Power-down mode (PD = OVDD)
clock idle
mA
SYMBOL
MIN TYP MAX
3.15 3.30 3.60
1.70
185
193 210
V
DD
0.05
610
637 693
0.165
21.3
0.001
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
_______________________________________________________________________________________ 7
ELECTRICAL CHARACTERISTICS (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference), CL≈ 10pF at digital outputs, VIN= -0.5dBFS (differential), DIFFCLK/SECLK = OV
DD
, PD = GND, SHREF = GND, DIV2 = GND, DIV4 = GND, G/T = GND, f
CLK
= 65MHz, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS (Figure 5)
Clock Pulse-Width High t
CH
7.7 ns
Clock Pulse-Width Low t
CL
7.7 ns
Data-Valid Delay t
DAV
5.4 ns
Data Setup Time Before Rising
Edge of DAV
t
SETUP
(Note 6) 7.0 ns
Data Hold Time After Rising Edge
of DAV
t
HOLD
(Note 6) 7.0 ns
t
WAKE
V
REFIN
= 2.048V 10 ms
Note 1: Specifications ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: Guaranteed by design and characterization. Device tested for performance during product test.
Note 3: Specification guaranteed by production test for ≥+25°C.
Note 4: Two-tone intermodulation distortion measured with respect to a single-carrier amplitude, and not the peak-to-average input
power of both input tones.
Note 5: During power-down, D0A–D13A, D0B–D13B, DORA, DORB, and DAV are high impedance.
Note 6: Guaranteed by design and characterization.
Typical Operating Characteristics
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference mode), CL≈ 5pF at digital outputs, VIN= -0.5dBFS,
DIFFCLK/SECLK = OV
DD
, PD = GND, G/T = GND, f
CLK
= 65MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)
FFT PLOT (32,768-POINT DATA RECORD)
MAX12557 toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-80
-60
-40
-20
0
-120
HD3
f
CLK
= 65MHz
f
IN
= 3.00125MHz
A
IN
= -0.48dBFS
SNR = 74.45dB
SINAD = 74.33dB
THD = -90.06dBc
SFDR = 92.47dBc
HD2
-10
-30
-50
-70
-90
-110
30
2515 201050
FFT PLOT (32,768-POINT DATA RECORD)
MAX12557 toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-80
-60
-40
-20
0
-120
HD3
f
CLK
= 65.00352MHz
f
IN
= 32.40058MHz
A
IN
= -0.424dBFS
SNR = 74.77dB
SINAD = 74.62dB
THD = -87.22dBc
SFDR = 91.88dBc
HD2
-10
-30
-50
-70
-90
-110
30
2515 201050
FFT PLOT (32,768-POINT DATA RECORD)
MAX12557 toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-80
-60
-40
-20
0
-120
f
CLK
= 65.00352MHz
f
IN
= 70.00852MHz
A
IN
= -0.498dBFS
SNR = 74.41dB
SINAD = 74.00dB
THD = -84.50dBc
SFDR = 86.25dBc
HD2
-10
-30
-50
-70
-90
-110
HD3
30
2515 201050
Wake-Up Time from Power-Down
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
8 _______________________________________________________________________________________
-2.0
-1.0
-1.5
0
-0.5
0.5
1.0
1.5
2.0
0 4096 61442048 8192 10240 12288 14336 16384
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
(4,194,304-POINT DATA RECORD)
MAX12557 toc07
DIGITAL OUTPUT CODE
INL (LSB)
fIN = 3.00123MHz
-1.00
-0.50
-0.75
0
-0.25
0.25
0.50
0.75
1.00
0 4096 61442048 8192 10240 12288 14336 16384
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
(4,194,304-POINT DATA RECORD)
MAX12557 toc08
DIGITAL OUTPUT CODE
DNL (LSB)
fIN = 3.00123MHz
40
50
45
60
55
65
70
75
80
0 100 15050 200 250 300 350 400
SNR, SINAD vs. ANALOG INPUT FREQUENCY
(f
CLK
= 65.00352MHz, AIN = -0.5dBFS)
MAX12557 toc09
fIN (MHz)
SNR, SINAD (dB)
SNR
SINAD
50
60
55
75
70
65
90
85
80
95
0 150 20050 100 250 300 350 400
-THD, SFDR vs. ANALOG INPUT FREQUENCY
(f
CLK
= 65.00352MHz, AIN = -0.5dBFS)
MAX12557 toc10
fIN (MHz)
-THD, SFDR (dBc)
SFDR
-THD
20
40
30
60
50
70
80
-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
MAX12557 toc11
AIN (dBFS)
SNR, SINAD (dB)
SNR, SINAD vs. ANALOG INPUT AMPLITUDE
(f
CLK
= 65.00352MHz, fIN = 70MHz)
SINAD
SNR
35
55
45
75
65
85
95
-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
MAX12557 toc12
AIN (dBFS)
-THD, SFDR (dBc)
-THD, SFDR vs. ANALOG INPUT AMPLITUDE
(f
CLK
= 65.00352MHz, fIN = 70MHz)
-THD
SFDR
FFT PLOT (32,768-POINT DATA RECORD)
MAX12557 toc04
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-80
-60
-40
-20
0
-120
f
CLK
= 65.00352MHz
f
IN
= 174.98857MHz
A
IN
= -0.476dBFS
SNR = 72.37dB
SINAD = 70.48dB
THD = -75.62dBc
SFDR = 76.37dBc
HD2
-10
-30
-50
-70
-90
-110
HD3
30
2515 201050
TWO-TONE IMD PLOT
(16,384-POINT DATA RECORD)
MAX12557 toc05
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-80
-60
-40
-20
0
-120
f
CLK
= 65.00352MHz
f
IN1
= 68.49987MHz
A
IN1
= -6.97dBFS
f
IN2
= 71.49930dB
A
IN2
= -6.99dBFS
IM3 = -91.54dBc
IMD = -87.97dBc
-10
-30
-50
-70
-90
-110
HD3
2f
IN2
+ f
IN1
2f
IN1
+ f
IN2
f
IN2
f
IN1
302515 201050
TWO-TONE IMD PLOT
(16,384-POINT DATA RECORD)
MAX12557 toc06
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dBFS)
-100
-80
-60
-40
-20
0
-120
f
CLK
= 65.00352MHz
f
IN1
= 172.49995MHz
A
IN1
= -6.95dBFS
f
IN2
= 177.49900688MHz
A
IN2
= -6.97dBFS
IM3 = -87.61dBc
IMD = -82.37dBc
-10
-30
-50
-70
-90
-110
HD3
f
IN1
+ f
IN2
f
IN1
f
IN2
HD2
30
2515 201050
Typical Operating Characteristics (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference mode), CL≈ 5pF at digital outputs, VIN= -0.5dBFS,
DIFFCLK/SECLK = OV
DD
, PD = GND, G/T = GND, f
CLK
= 65MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)
MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
_______________________________________________________________________________________ 9
20
40
30
60
50
70
80
-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
MAX12557 toc13
AIN (dBFS)
SNR, SINAD (dB)
SNR, SINAD vs. ANALOG INPUT AMPLITUDE
(f
CLK
= 65.00352MHz, fIN = 175MHz)
SINAD
SNR
35
55
45
75
65
85
95
-55 -45 -40 -35-50 -30 -25 -20 -15 -10 -5 0
MAX12557 toc14
AIN (dBFS)
-THD, SFDR (dBc)
-THD, SFDR vs. ANALOG INPUT AMPLITUDE
(f
CLK
= 65.00352MHz, fIN = 175MHz)
-THD
SFDR
60
64
68
72
76
80
20 35 4025 30 45 50 55 60 65
SNR, SINAD vs. CLOCK SPEED
(f
IN
= 70MHz, AIN = -0.5dBFS)
MAX12557 toc15
f
CLK
(MHz)
SNR, SINAD (dB)
SNR
SINAD
60
70
75
80
85
90
20 35 4025 30 45 50 55 60 65
-THD, SFDR vs. CLOCK SPEED
(f
IN
= 70MHz, AIN = -0.5dBFS)
MAX12557 toc16
f
CLK
(MHz)
-THD, SFDR (dBc)
SFDR
-THD
65
60
64
68
72
76
80
20 35 4025 30 45 50 55 60 65
SNR, SINAD vs. CLOCK SPEED
(f
IN
= 175MHz, AIN = -0.5dBFS)
MAX12557 toc17
f
CLK
(MHz)
SNR, SINAD (dB)
SNR
SINAD
60
70
75
80
85
90
20 35 4025 30 45 50 55 60 65
-THD, SFDR vs. CLOCK SPEED
(f
IN
= 175MHz, AIN = -0.5dBFS)
MAX12557 toc18
f
CLK
(MHz)
-THD, SFDR (dBc)
-THD
65
SFDR
60
64
72
68
76
80
3.0 3.23.1 3.3 3.4 3.5 3.6
SNR, SINAD vs. ANALOG SUPPLY VOLTAGE
(f
CLK
= 65.00352MHz, fIN = 70MHz)
MAX12557 toc19
VDD (V)
SNR, SINAD (dB)
SNR
SINAD
60
70
65
80
75
90
85
95
3.0 3.2 3.33.1 3.4 3.5 3.6
MAX12557 toc20
VDD (V)
-THD, SFDR (dBc)
-THD, SFDR vs. ANALOG SUPPLY VOLTAGE
(f
CLK
= 65.00352MHz, fIN = 70MHz)
SFDR
-THD
60
63
69
66
72
75
3.0 3.23.1 3.3 3.4 3.5 3.6
SNR, SINAD vs. ANALOG SUPPLY VOLTAGE
(f
CLK
= 65.00352MHz, fIN = 175MHz)
MAX12557 toc21
VDD (V)
SNR, SINAD (dB)
SNR
SINAD
Typical Operating Characteristics (continued)
(VDD= 3.3V, OVDD= 2.0V, GND = 0, REFIN = REFOUT (internal reference mode), CL≈ 5pF at digital outputs, VIN= -0.5dBFS,
DIFFCLK/SECLK = OV
DD
, PD = GND, G/T = GND, f
CLK
= 65MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)
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