Maxim Integrated Fremont User Manual
Fremont (MAXREFDES6#) ZedBoard
Quick Start Guide
Rev 0; 9/13
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Fremont (MAXREFDES6#) ZedBoard Quick Start Guide
Table of Contents
1. Required Equipment ................................................................................................. 3
2. Overview ................................................................................................................... 3
3. Included Files ........................................................................................................... 5
4. Procedure ................................................................................................................. 6
5. Code Documentation .............................................................................................. 19
6. Appendix A: Project Structure and Key Filenames ................................................. 20
7. Trademarks ............................................................................................................ 20
8. Revision History ...................................................................................................... 21
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Fremont (MAXREFDES6#) ZedBoard Quick Start Guide
1. Required Equipment
• PC with Windows® OS with Xilinx® ISE®/SDK version 14.2 or later and two USB
ports (Refer to Xilinx AR# 51895 if you installed ISE WebPackTM design software
on your PC.)
• One +7V power supply
• One -6V power supply
• License for Xilinx EDK/SDK version 14.2 or later (free WebPack license is OK)
• Fremont (MAXREFDES6#) board
• ZedBoardTM development kit
• Industrial sensor or signal source
2. Overview
Below is a high-level overview of the steps required to quickly get the Fremont design
running by downloading and running the FPGA project. Detailed instructions for each
step are provided in the following pages. The Fremont (MAXREFDES6#) subsystem
reference design will be referred to as Fremont throughout this document.
1) Connect the Fremont board to the JA1 port of a ZedBoard as shown in Figure 1
Ensure the connector is aligned as shown in
2) Download the latest RD6V01_00.ZIP file located at the Fremont page.
3) Extract the RD6V01_00.ZIP file to a directory on your PC.
4) Open the Xilinx SDK.
5) Download the bitstream (.BIT) file to the board. This bitstream contains the FPGA
hardware design and software bootloader.
6) Use Xilinx SDK to download and run the executable file (.ELF) on one of the two
ARM® CortexTM-A9 processors.
Figure 2.
.
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Fremont (MAXREFDES6#) ZedBoard Quick Start Guide
Figure 1. Fremont Board Connected to ZedBoard Kit
Figure 2. Pmod™ Connector Alignment
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Fremont (MAXREFDES6#) ZedBoard Quick Start Guide
Processor
ARM
(Zynq)
AXI MAX11100
Custom IP Core
DDR
Pmod
Connector
JA1
JTAG
USB
Programmer
Programming
Options
Quad-SPI Flash
SD Card
Internal
BRAM
Zynq EPP
3. Included Files
The top level of the hardware design is a Xilinx PlanAhead Project (.PRR) for Xilinx
PlanAhead version 14.2. The Verilog-based arm_system_stub.v module provides
FPGA/board net connectivity, and instantiates the wra pper that carries both the Zynq®
Processing System and AXI_MAX11100 custom IP core that interface to the Pmod port.
This is supplied as a Xilinx software development kit (SDK) project that includes a
demonstration software application to evaluate the Fremont subsystem reference
design. The lower level c-code driver routines are portable to the user’s own software
project.
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Figure 3. Block Diagram of FPGA Hardware Design
Fremont (MAXREFDES6#) ZedBoard Quick Start Guide
4. Procedure
1. Connect the Fremont board to the JA1 port of a ZedBoard as shown in Figure 1.
2. Power up t he ZedBoard by sliding the SW8 switch on the ZedBoard to the ON
position.
3. Download the latest RD6V01_00.ZIP file at
www.maximintegrated.com/fremont. All files available for download are
available at the bottom of the page.
4. Extract the RD6V01_00.ZIP file to a directory on your PC. The location is
arbitrary but the maximum path length limitation in Windows (260 characters)
should not be exceeded.
In addition, the Xilinx tools require the path to not contain any spaces.
C:\Do Not Use Spaces In The Path\RD6V01_00.ZIP
(This path has spaces.)
For the purposes of this document, it will be C:\designs\maxim\RD6V01_00\.
See Appendix A: Project Structure and Key Filenames in this document for
the project structure and key filenames.
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Fremont (MAXREFDES6#) ZedBoard Quick Start Guide
5. Open the Xilinx Software Development Kit (SDK) from the Windows Start
menu.
6. SDK will prompt for a workspace directory, which is the location where the
software project is located. For this example, it is:
C:\designs\maxim\RD6V01_00\RD6_ZED_V01_00\Design_Files\top.sdk\SDK\SDK_
Export
Click OK and SDK will open. The Xilinx SDK is based on an Eclipse™-based
IDE, so it will be a familiar flow for many software developers.
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