Maxim Integrated Analog Essentials User Manual

For LX9 and Nexys-3

Analog Essentials

Getting Started Guide

Overview

Maxim Analog Essentials are a series of plug-in peripheral modules that allow engineers to quickly test, evaluate, and
integrate Maxim components into their hardware/software designs. The modules electrically and physically conform to
the Digilent Pmod™ interface specification and are compatible with any Digilent Pmod-compatible header.

The Analog Essentials collection contains 15 peripheral module boards which are supported by prebuilt hardware and
software projects for various FPGA development boards which are compatible. This version of the Getting Started Guide
is applicable to LX9 and Nexys™-3 boards, both of which are based on Spartan®-6 FPGAs. Users of the other FPGA boards
should refer to different versions of this guide.

Important notes – please read carefully

1. ESD Sensitivity. These modules are intended to be used in an electronic prototyping setting.

They are sensitive to static charge and are subject to damage if proper precautions against
ESD are not taken. When handling these modules, the user should take the same care and
precautions as when working with other ESD sensitive prototypes.

2. Plug – Connector mating. Many plug-in modules contain only one row of six pins, while most Pmod connectors

contain two rows of six contacts each. When plugging in a module with a single row of pins, always plug the

module into the top row of contacts.

3. Plug in with care. Please exercise care when plugging the modules into the Pmod port. The connectors are not

keyed, so it is possible to incorrectly plug in the module and misalign the pins. Although each module includes
series resistors to provide current limiting, in some cases it is still possible to damage the module if it is
incorrectly plugged in.

4. Nexys-3 and LX9 Differences. Most of the instructions in this document refer to both the Nexys-3 board and the
LX9. Instances where a procedure is specific to one board or other will be denoted by the following indicators:

Additional components required

Interested users may wish to obtain additional components to evaluate the following modules:

MAX3231MPMB1 – this module requires a 10mm, 3V lithium primary type coin cell. The generic battery type is CR1025.
Specific examples of this battery are Panasonic #CR1025 and Energizer #CR1025.

MAX31855PMB1 – this module requires a K-Type thermocouple with subminiature connector. Omega series 5SRTC are
suitable (

www.omega.com). Lower cost alternatives may be available via eBay.

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For LX9 and Nexys-3

Part

Functionality

Interface

DS1086LPMB1#

I2C spread-spectrum EconOscillator™

I2C

DS3231MPMB1#

I2C real-time clock

I2C

MAX3232PMB1#

RS-232 transceiver

UART

MAX4824PMB1#

Octal relay driver

GPIO

MAX5216PMB1#

High-performance 16-bit DAC

SPI/GPIO

MAX5487PMB1#

Dual 256-tap digital potentiometer

SPI

MAX5825PMB1#

Octal 12-bit DAC

I2C

MAX7304PMB1#

16-port GPIO and LED driver

I2C

MAX9611PMB1#

Current-sense amplifier with op amp and ADC

I2C

MAX11205PMB1#

16-bit delta-sigma ADC with 2-wire interface

GPIO

MAX14840PMB1#

RS-485 transceiver

UART/GPIO

MAX14850PMB1#

6-channel, 600V galvanic isolator

SPI/UART

MAX31723PMB1#

Digital thermometer

SPI

MAX31855PMB1#

Thermocouple-to-digital converter

SPI

MAX44000PMB1#

Ambient light and proximity sensor

I2C

Analog Essentials

Getting Started Guide

Analog Essentials Collection modules

The table below lists the peripheral modules included in the collection, along with a description and interface type.

Included Files

The top level of the hardware design is a Xilinx ISE® Project Navigator Project (.xise) for Xilinx ISE version 13.4. The
Verilog-based HDL design instantiates the Microblaze™ core, the support hardware required to run the Microblaze, and
the peripherals (I
development kit (SDK) project which includes a demonstration software application to evaluate each module’s
functionality. The lower level c-code driver routines are portable to the user’s own software projects.

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C, SPI, GPIO, and UART) which interface to the Pmod ports. This is supplied as a Xilinx software

Prerequisites

• Xilinx ISE13.4 or a later version must be installed on the development PC, along with a license for Xilinx EDK/SDK.

• To modify the FPGA code or the software, the user should have a basic understanding of Xilinx Project Navigator

(ISE) development tools, I

• Maxim Analog Essential Project Source (downloadable from

• One or more of the peripheral modules boards in the Analog Essentials collection.

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C, SPI, GPIO buses, ANSI C, and (ideally) the Xilinx Embedded Development Kit toolset.

www.maxim-ic.com/FPGA-modules)

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For LX9 and Nexys-3

Analog Essentials

Getting Started Guide

Typical System Architecture

Below is a generalized block diagram for the architecture implemented in the FPGA project. One of the key elements is
the logic block that drives each Pmod port. Each Pmod port driver contains a dedicated I
octal GPIO port. Any of these can be quickly connected to the Pmod port via software control. (The multiplexer setting is
controlled by another internal GPIO port.) This eliminates the need to reprogram the FPGA during testing and evaluation
of various peripheral modules.

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C port, SPI port, UART, and

Board specific notes

Digilent Nexys-3: This FPGA board contains 4 Pmod connectors, all of which are driven by the
logic/hardware resources as shown in the above diagram.

Avnet LX9: Although the LX9 board contains 2 Pmod connectors, the FPGA does not contain a
sufficient number of gates to implement two complete copies of the drivers as shown above.
Therefore, only one of the Pmod ports on the LX9 (“J5”) is driven as shown. Pmod connector “J4” is
driven by an octal GPIO interface block and not utilized by the supplied software.

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For LX9 and Nexys-3

Analog Essentials

Getting Started Guide

Getting Started

Introduction

With small Microblaze FPGA designs, it is typical for the binary executable program to fit entirely within the internal
block RAM of the FPGA. In these cases, the FPGA can be programmed by simply downloading a single bit-stream file,
which contains both the FPGA logic and the binary executable for the running software on the processor. However, the
size of the sample programs for the Analog Essentials collection exceeds the capacity of the internal block RAM memory.
Therefore, external memory (outside the FPGA) must be utilized for both program and data storage. Because of this,
loading the program is a multistep process. The first step loads, then executes a boot loader. The boot loader then loads
the .elf (executable software file for the Microblaze). While this is not as simple as downloading a single file, it
represents the situation encountered with many real-world applications.

The first section of this guide leads the user through the process of loading the project into the FPGA board for
execution. The section following that outlines the basic steps in modifying the project.

Overview: Downloading the Example/Demonstration Application

Below is a high-level overview of the steps required to download and run the FPGA project. Detailed instructions for
each step are provided in the following pages.

1. From Maxim’s website, download the latest version of the Maxim Analog Essentials project that corresponds to
your FPGA board. The code will be delivered as a .zip file. Visit
the link to MAXPMBAE which takes you to the Quick-View page for Analog Essentials. From there, click on the
“Technical Documents” to access the software downloads.

2. Extract the .zip file to a directory on your machine (direction location is arbitrary, but for the purposes of this
document, it will be c:\designs\maxim\v1_4). See Appendix B in this document for a complete description of
the included files.

3. Open the Xilinx SDK (Windows Start Menu > Xilinx ISE 13.4 > EDK > Xilinx Software Development Kit).

4. Download the bitstream (.bit) file to the board. This bitstream contains the FPGA hardware design and software
bootloader.

5. Open Hyperterminal or a similar communications program to communicate with FPGA board.

6. Use Xilinx SDK/XMD debugger console to download and run executable file (.elf) on the Microblaze.

www.maxim-ic.com/fpga-modules, then click on

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For LX9 and Nexys-3

Analog Essentials

Getting Started Guide

Detailed Steps: Downloading the Example/Demonstration Application

1. Opening the SDK

a. From the Windows Start Menu, Open the Xilinx SDK as shown below

.

b. SDK will prompt for a workspace directory, the location where the software project is located. This

directory is generally a subfolder within a Xilinx ISE/EDK project and will include board support files, as
well as (.c) and (.h) files. Be certain to choose the correct Workspace directory. For this project, it will be
C:\Designs\maxim\v1_4\sdkWorkspace (as shown below).

c. Click OK to the prompt shown above and SDK will open. The Xilinx SDK is based on an Eclipse-based IDE,

so it will be a familiar flow for many software developers.

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For LX9 and Nexys-3

Analog Essentials

Getting Started Guide

d. Review the SDK IDE. The Project Explorer in the upper left tab should have three components as shown

in the image below. If all three subfolders are present, you can skip the next step.

If the Project Explorer does not contain these three subfolders, launch the File > Import menu, expand

e.

the General tab and select Existing Projects into Workspace. Click Next. Set the root directory to
C:\designs\maxim\v1_4\sdkWorkspace, and the missing
with their checkboxes checked. Click Finish to import the projects.

projects should appear in SDK Project explorer

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For LX9 and Nexys-3

Analog Essentials

Getting Started Guide

2. Downloading the bitstream (.bit) file to the board.

a. Click on the Program FPGA icon (which looks like a green chain of devices):

b. The Program FPGA dialog box will appear. From here, an FPGA bitstream is selected as well as an FPGA

bmm file and a (.elf) file to load into the Microblaze memory as shown below. Be sure to select the
toplevel.bit file, the edkBmmFile_bd.bmm, and the bootloop file as shown, then select Program.

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