Maxim Integrated 78Q8430 User Manual
Simplifying System IntegrationTM
78Q8430
Driver Manual for ST 5100/OS-20
with NexGen TCP/IP Stack
March, 2008
Rev. 1.0
78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005
© 2008 Teridian Semiconductor Corporation. All rights reserved.
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contained in the Company’s warranty detailed in the Teridian Semiconductor Corporation standard Terms
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document, reserves the right to change devices or specifications detailed herein at any time without
notice and does not make any commitment to update the information contained herein. Accordingly, the
reader is cautioned to verify that this document is current by comparing it to the latest version on
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TEL (714) 508-8800, FAX (714) 508-8877, http://www.teridian.com
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Table of Contents
1 Introduction.........................................................................................................................................5
2 System Requirements........................................................................................................................6
2.1 Hardware Requirements............................................................................................................... 6
2.2 Software Requirements ................................................................................................................ 6
3 Device Driver Structure...................................................................................................................... 7
3.1 Device Driver Files........................................................................................................................ 7
3.1.1 File Partitions ................................................................................................................... 7
3.1.2 File Directory Structure.................................................................................................... 7
3.2 ST/OS-20 Header Files ................................................................................................................8
3.3 Data Structures............................................................................................................................. 8
3.3.1 NG_TSC_STRUCT.......................................................................................................... 8 T
3.3.2 NET_CONTROL_STRUCT ............................................................................................. 9 T
3.3.3 DEV_FUNCTIONS_STRUCT.......................................................................................... 9
3.3.4 DEVICE_CONTROL_STRUCT .......................................................................................9
3.4 Device Driver Options................................................................................................................. 11
4 ST IPSTB NexGen 78Q8430 Ethernet API.......................................................................................13
4.1 STETHER_CopyData ().............................................................................................................. 13
4.2 STETHER_Close ()..................................................................................................................... 14
4.3 STETHER_Config () ...................................................................................................................14
4.4 STETHER_Config_ARC ().......................................................................................................... 14
4.5 STETHER_HandleCompletedTXBuffers ()................................................................................. 15
4.6 STETHER_InterruptHandler ().................................................................................................... 16
4.7 STETHER_Open ()..................................................................................................................... 17
4.8 STETHER_Receive().................................................................................................................. 18
4.9 STETHER_Send () .....................................................................................................................18
4.10 STETHER_Start () ...................................................................................................................... 19
5 STi5100 IPSTB Platform Example ................................................................................................... 20
5.1 Setup........................................................................................................................................... 20
5.1.1 Host PC Environment .................................................................................................... 20
5.1.2 MPEG Video Server PC Environment ...........................................................................21
5.1.3 ST Microconnect Target Configuration.......................................................................... 21
5.1.4 STi5100 IPSTB Configuration........................................................................................ 22
5.2 Build STi5100 IPSTB Code ........................................................................................................23
5.2.1 Location of Source Files ................................................................................................ 23
5.2.2 Build the Software.......................................................................................................... 23
5.3 Run the STi5100 IPSTB Example .............................................................................................24
6 Related Documentation....................................................................................................................25
7 Contact Information.......................................................................................................................... 25
Appendix A – Acronyms...........................................................................................................................26
Appendix B – Release Notes ...................................................................................................................27
Release Package Contents ................................................................................................................27
Software Build and Installation............................................................................................................ 27
Changes from Previous Release ........................................................................................................27
Known Problems................................................................................................................................. 27
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005
Figures
Figure 1: NG_TSC_STRUCT Call Graph .....................................................................................................8
Figure 2: NET_CONTROL_STRUCT and DEV_FUNCTIONS_STRUCT Call Graph.................................. 9
Figure 3: DEVICE_CONTROL_STRUCT Call Graph ................................................................................. 10
Figure 4: STETHER_CopyData Call Graph................................................................................................ 13
Figure 5: STETHER_Close Call Graph....................................................................................................... 14
Figure 6: STETHER_Config_ARC Call Graph............................................................................................ 15
Figure 7: STETHER_HandleCompletedTXBuffers Call Graph................................................................... 16
Figure 8: STETHER_InterruptHandler Call Graph...................................................................................... 16
Figure 9: STETHER_Open Call Graph (First Level)................................................................................... 17
Figure 10: STETHER_Receive Call Graph................................................................................................. 18
Figure 11: STETHER_Send Call Graph .....................................................................................................18
Figure 12: STETHER_Start Call Graph ...................................................................................................... 19
Figure 13: IPSTB Platform Block Diagram.................................................................................................. 20
Tables
Table 1: Teridian Source File Tree ...............................................................................................................7
Table 2: ST/OS-20 Configuration Source File Tree...................................................................................... 7
Table 3: NEXGEN TCP/IP Files for Hardware Checksum............................................................................ 8
Table 4: Device Driver Configuration Options.............................................................................................11
Table 5: Driver Default Values for Important 78Q8430 Registers and Parameters....................................11
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1 Introduction
The Teridian Semiconductor Corporation (TSC) 78Q8430 is a single chip 10/100 Ethernet MAC and PHY
controller supporting multi-media offload. The device is optimized to enhance throughput and offload
network protocol tasks from the host processor for demanding multi-media applications found in Set Top
Boxes, IP video, and Broadband Media Appliances.
This document describes the 78Q8430 software device driver for ST/OS-20. The document is based on
the following driver software version:
¾ SW Revision TSC8430B_V1.01, 03/07/2008.
A 78Q8430 Demo Board (D8430T3B_STEM) is available to support development of embedded
applications in conjunction with an ST STi5100 IPSTB development platform and ST ST20R2.0.5 SW
tools. The 78Q8430 ST/OS-20 device driver includes the operating system (OS) and platform
independent files and the OS and platform (CPU, board) dependent files. The ST/OS-20 device driver
uses a specific configuration of the OS and platform which is dependent on the generic Teridian Ethernet
device driver. This driver runs on the STi5100 IPSTB hardware platform with the NexGen TCP/IP
protocol stack for IP video streaming demo application software.
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78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005
2 System Requirements
2.1 Hardware Requirements
The following list describes the minimum hardware requirements for a 78Q8430 ST/OS-20 based
development platform:
• 78Q8430 demo board (D8430T3B_STEM).
• Software development PC with the following minimum requirements: Pentium
256 MB RAM and 40 GB hard drive, running either Windows
• IP Server PC with the following minimum requirements: Pentium 4 CPU with 256 MB RAM and 40 GB
hard drive, 10/100 ports for 78Q8430 demo board connection, running either Windows 2000 or
Windows XP.
• 10/100 HUB or switch.
• STi5100 evaluation platform. The STi5100 communicates with the 78Q8430 registers at base
memory address 0x43038000.
• ST Microconnect JTAG emulator. This device loads the IPSTB software into the STi5100 evaluation
platform.
®
2000 or Windows XP.
2.2 Software Requirements
The following list describes the minimum software requirements for embedded applications programming
on a 78Q8430 ST/OS-20 based development platform:
• ST20 Toolset: STi5100 BSP Version 2.0.5 Patch 1.
• IPBox: contains web_server, htdocs, and video_server folders.
• IPSTB application: Ipstba3_esp – 5100.
®
4 CPU with
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3 Device Driver Structure
This 78Q8430 ST/OS-20 device driver software is a customized version of the generic Teridian Ethernet
device driver software. It is configured with wrapper code for the NexGen TCP/IP protocol stack and
other protocols (RTSP, RTP) to stream the MPEG-2 transport stream. The wrapper code connects the
generic device driver API to the NexGen TCP/IP stack.
3.1 Device Driver Files
3.1.1 File Partitions
The device driver software includes 4 groups of files:
• OS and platform independent files:
o tsccore.c
o commem.h
o comregs.h
• TSC OS and platform dependent files:
o tscport.c
o tscport.h
o [optional] wrapper files: ether_tsc78q8430.c, ether_tsc78q8430.h
• Target OS and platform dependent files:
o targets.cfg
o mb390_mem.cfg
• Modified TCP/IP protocol stack files:
o ipncs.c
o tcpncs.c
o udpncs.c
3.1.2 File Directory Structure
Table 1, Table 2 and Table 3 list the directory and file structure for the 78Q8430 driver software and a
brief description of each file.
Table 1: Teridian Source File Tree
Directory Path File Name File Description
C:\ipstba5\src\nexgen_drv
C:\ipstba5\include
Directory Path File Name File Description
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ether_tsc78q8430.c Wrapper file which includes Teridian source files
tscport.c OS and H/W dependent code
tsctest.c Test application code
tsccore.c Core driver code
ether_tsc78q8430.h Wrapper file which include Teridian header files
tscport.h OS and H/W dependent headers
commem.h Common memory, data structure declaration
comregs.h 78Q8430 Register declaration
Table 2: ST/OS-20 Configuration Source File Tree
targets.cfg IPSTB Target configuration C:\ipstba5\config\platform
mb390_mem.cfg
FMI bus configuration for 78Q8430 registers and
SRAM
78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack UM_8430_005
Table 3: NEXGEN TCP/IP Files for Hardware Checksum
Directory Path File Name File Description
C:\ipstba5\src\nexgen_drv
ipncs.c (ip.c) Add IP checksum HW/SW option
udpncs.c (udp.c) Add UDP checksum HW/SW option
tcpncs.c (tcp.c) Add TCP checksum HW/SW option
3.2 ST/OS-20 Header Files
The 78Q8430 device driver software requires the following ST/OS-20 header files to be included:
#include <task.h>
#include <stdio.h>
#include <stdlib.h>
#include <message.h>
#include <string.h>
#include <heap.h>
#include <cache.h>
#include <debug.h>
#include <interrup.h>
#include <ostime.h>
#include <c1timer.h>
#include <time.h>
#include <semaphor.h>
#include <debug.h>
#include "stddefs.h"
#include "commem.h"
#include "comregs.h"
3.3 Data Structures
The 78Q8430 device driver for ST/OS-20 interfaces to the NexGen TCP/IP stack with the structures
described below.
3.3.1 NG_TSC_STRUCT
NG_TSC_STRUCT and DEVICE_CONTROL_STRUCT structures are defined in the TSC Ethernet
source module commem.h.
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Figure 1 shows the call graph for the NG_TSC_STRUCT structure.
Figure 1: NG_TSC_STRUCT Call Graph
UM_8430_005 78Q8430 Driver Manual for ST5100/OS-20 with NexGen TCP/IP Stack
3.3.2 NET_CONTROL_STRUCT
The NET_CONTROL_STRUCT structure is defined in the TSC Ethernet source module commem.h.
Figure 2 shows the call graph for the NET_CONTROL_STRUCT structure.
Figure 2: NET_CONTROL_STRUCT and DEV_FUNCTIONS_STRUCT Call Graph
3.3.3 DEV_FUNCTIONS_STRUCT
The DEV_FUNCTIONS_STRUCT structure is defined in the TSC Ethernet source module commem.h.
Figure 2 shows the call graph for the DEV_FUNCTIONS_STRUCT structure.
3.3.4 DEVICE_CONTROL_STRUCT
The DEVICE_CONTROL_STRUCT structure is defined in the TSC Ethernet source module commem.h.
STETHER_ functions refer to this control block as PDEV_CTRL. See the TSC Ethernet source module
tscport.c for its usage.
Figure 3 shows the call graph for the DEVICE_CONTROL_STRUCT structure.
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