MAXIM MXL1543 User Manual

Page 1
General Description
The MXL1543 is a three-driver/three-receiver multipro­tocol transceiver that operates from a +5V single sup­ply. The MXL1543, along with the MXL1544/MAX3175 and the MXL1344A, form a complete software-selec­table data terminal equipment (DTE) or data communi­cation equipment (DCE) interface port that supports the V.28 (RS-232), V.10/V.11 (RS-449/V.36, EIA-530, EIA­530A, X.21), and V.35 protocols. The MXL1543 trans­ceivers carry the high-speed clock and data signals while the MXL1544/MAX3175 carry the control signals. The MXL1543 can be terminated by the MXL1344A software-selectable resistor termination network or by discrete termination networks.
An internal charge pump and a proprietary low-dropout transmitter output stage allow V.11- , V.28- , and V.35­compliant operation from a +5V single supply. A no­cable mode is entered when all mode pins (M0, M1, and M2) are pulled high or left unconnected. In no­cable mode, supply current decreases to 0.5µA and all transmitter and receiver outputs are disabled (high impedance). Short-circuit current limiting and thermal shutdown circuitry protect the drivers against excessive power dissipation.
Applications
Features
MXL1543, MXL1544/MAX3175, and MXL1344A
Chipset Is Pin Compatible with LTC1543, LTC1544, and LTC1344A
Supports RS-232, RS-449, EIA-530, EIA-530A,
V.35, V.36, and X.21
Software-Selectable Cable Termination Using the
MXL1344A
Complete DTE or DCE Port with MXL1544/
MAX3175, and MXL1344A
+5V Single-Supply Operation
0.5µA No-Cable Mode
TUV-Certified NET1/NET2 and TBR1/TBR2-
Compliant
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-1929; Rev 1; 9/01
Data Networking
CSU and DSU
Data Routers
PCI Cards
Telecommunications Equipment
Typical Operating Circuit
Pin Configuration appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP. RANGE PIN-PACKAGE
MXL1543CAI 0° to +70°C 28 SSOP
CTS DSR RTSDTRDCD
LL
R4
18 5 10 8 22 6 23 20 19 4 1 7 16 3 9 17 12 15 11 24 14 2
LL A (141)
R2R3
13
CTS A (106)
DSR B
CTS B
MAX3175
DSR A (109)
MXL1544
R1
D3
DCD A (107)
DCD B
DTR A (108)
DTR B
D1D2
RTS A (105)
RTS B
DB-25 CONNECTOR
RXD RXC TXDTXC SCTE
MXL1543
R1
R2R3
RXC B
RXD A (104)
RXD B
SG (102)
SHIELD (101)
RXC A (115)
D3D4
TXC A (114)
TXC B
SCTE A (113)
SCTE B
D1D2
TXD B
TXD A (103)
MXL1344A
Page 2
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC= +5.0V, C1 = C2 = C4 = 1µF, C3 = C5 = 4.7µF, (Figure 10), TA = T
MIN
to T
MAX
. Typical values are at TA = +25°C, unless oth-
erwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
All Voltages Referenced to GND Unless Otherwise Noted. Supply Voltages
V
CC
.......................................................................-0.3V to +6V
V
DD
....................................................................-0.3V to +7.3V
V
EE
.....................................................................+0.3V to -6.5V
V
DD
to V
EE
(Note 1)................................................................13V
Logic Input Voltages
M0, M1, M2, DCE/DTE, T_IN ................................-0.3V to +6V
Logic Output Voltages
R_OUT....................................................-0.3V to (V
CC
+ 0.3V)
Transmitter Outputs
T_OUT_, T3OUT_/R1IN_.....................................-15V to +15V
Short-Circuit Duration............................................Continuous
Receiver Input
R_IN_T3OUT_/R1IN_ ..........................................-15V to +15V
Continuous Power Dissipation (T
A
= +70°C)
28-Pin SSOP (derate 11.1mW/°C above +70°C) .........889mW
Operating Temperature Range
MXL1543CAI .......................................................0°C to 70°C
Junction Temperature .......................................................150°C
Storage Temperature Range ...........................-65°C to +150°C
Lead Temperature (soldering, 10s) ...............................+300°C
Note 1: VDDand VEEabsolute difference cannot exceed 13V.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC CHARACTERISTICS
V
Operating Range V
CC
Supply Current (DCE Mode) (Digital Inputs = GND or
)
V
CC
(Transmitter Outputs Static)
Internal Power Dissipation (DCE Mode)
Positive Charge-Pump Output Voltage
Negative Charge-Pump Output Voltage
Supply Rise Time t
LOGIC INPUTS (M0, M1, M2, DCE/DTE, T1IN, T2IN, T3IN)
Input High Voltage V
Input Low Voltage V
Logic Input Current I
CC
RS-530, RS-530A, X.21, no load 13
RS-530, RS-530A, X.21, full load 100 130
V.35 mode, no load 20
I
CC
P
V
DD
V
EE
IH
IL
IN
V.35 mode, full load 126 170
V.28 mode, no load 20
V.28 mode, full load 40 75
No-cable mode 0.5 10 µA
RS-530, RS-530A, X.21, full load 230
V.35 mode, full load 600
D
V.28 mode, full load 140
Any mode (except no-cable mode), no load 6.4 6.8
V.28 mode, with load 6.4 6.8
V.28, V.35 modes, with load, IDD = 10mA 6.4 6.8
V.28, V.35, no load -5.6
V.28 mode, full load -5.6 -5.4
V.35 mode, full load -5.6 -5.4
RS-530, RS-530A, X.21, full load -5.6 -5.4
No-cable mode or power-up to turn on 500 µs
r
T1IN, T2IN, T3IN ±10 M0, M1, M2, DCE/DTE = GND -100 -50 -30 M0, M1, M2, DCE/DTE = V
CC
4.75 5.25 V
2.0
0.8
±10
mA
mW
V
V
V
µA
Page 3
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC= +5.0V, C1 = C2 = C4 = 1µF, C3 = C5 = 4.7µF, (Figure 10), TA= T
MIN
to T
MAX
. Typical values are at TA = +25°C, unless oth-
erwise noted.)
LOGIC OUTPUTS (R1OUT, R2OUT, R3OUT)
Output High Voltage V
Output Low Voltage V
Output Short-Circuit Current I
Output Pullup Current I
V.11 TRANSMITTER
Open-Circuit Differential Output Voltage
Loaded Differential Output Voltage
Change in Magnitude of Output Differential Voltage
Common-Mode Output Voltage V
Change in Magnitude of Output Common-Mode Voltage
Short-Circuit Current I
Output Leakage Current I
Rise or Fall Time t
Transmitter Input to Output Delay
Data Skew It
Output to Output Skew t
V.11 RECEIVER
Differential Threshold Voltage V
Input Hysteresis ∆V
Receiver Input Current I
Receiver Input Resistance R
Rise or Fall Time tr, t
Receiver Input to Output Delay t
Data Skew |t
V.35 TRANSMITTER
Differential Output Voltage V
Output High Current I
Output Low Current I
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
V
V
OH
OL
SC
L
ODO
ODL
I
SOURCE
I
SINK
0 V
V
Open circuit, R = 1.95k (Figure 1) ±5V
R = 50 (Figure 1), TA = +25oC
= 4mA 3 4.5
= 4mA 0.3 0.8
V
OUT
CC
= 0, no-cable mode 70 µA
OUT
R = 50 (Figure 1) ±2
V
OD
OC
V
OC
SC
Z
,
t
r
t
t
PHL
,
- t
PHL
SKEW
TH
TH
IN
IN
PHL,tPLH
- t
PHL
OD
OH
OL
R = 50 (Figure 1) 0.2 V
R = 50 (Figure 1) 3.0 V
R = 50 (Figure 1) 0.2 V
V
= GND 150 mA
OUT
-0.25V ≤ V
+0.25V, power-off or
OUT
no-cable mode
(Figures 2, 6) 2 10 25 ns
f
(Figures 2, 6) 40 80 ns
PLH
I (Figures 2, 6) 3 12 ns
PLH
(Figures 2, 6) 3 ns
-7V ≤ VCM 7V -200 200 mV
-7V ≤ VCM 7V 15 40 mV
-10V ≤ V
-10V ≤ V
(Figures 2, 7) 15 ns
f
10V ±0.66 mA
A, B
10V 15 30 k
A, B
(Figures 2, 7) 50 80 ns
| (Figures 2, 7) 4 16 ns
PLH
Open circuit (Figure 3) ±7
With load, -4V ≤ VCM 4V (Figure 3) ±0.44 ±0.55 ±0.66
V
= 0 -13 -11 -9 mA
A,B
V
= 0 9 11 13 mA
A,B
0.5
V
ODO
±1 ±100 µA
±50 mA
0.67 V
ODO
V
V
V
Page 4
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
4 _______________________________________________________________________________________
,
ELECTRICAL CHARACTERISTICS (continued)
(VCC= +5.0V, C1 = C2 = C4 = 1µF, C3 = C5 = 4.7µF, (Figure 10), TA= T
MIN
to T
MAX
. Typical values are at TA = +25°C, unless oth-
erwise noted.)
Output Leakage Current I
Rise or Fall Time tr, t
Transmitter Input to Output Delay
Data Skew |t
Output-to-Output Skew t
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Z
f
t
t
PHL
PLH
PHL–tPLH
SKEW
-0.25V ≤ V cable mode
(Figures 3, 6) 5 ns
(Figures 3, 6) 35 80 ns
| (Figures 3, 6) 4 16 ns
(Figures 3, 6) 4 ns
+0.25V, power-off or no-
OUT
V.35 RECEIVER
Differential Input Voltage V
Input Hysteresis ∆V
Receiver Input Current I
Receiver Input Resistance R
Rise or Fall Time tr, t
Receiver Input to Output Delay t
Data Skew |t
PHL
PHL–tPLH
TH
TH
IN
IN
, t
-2V ≤ VCM 2V (Figure 3) -200 200 mV
-2V ≤ VCM 2V (Figure 3) 15 40 mV
-10V ≤ VA,B 10V ±0.66 mA
-10V ≤ VA,B 10V 15 30 k
(Figures 3, 7) 15 ns
f
(Figures 3, 7) 50 80 ns
PLH
| (Figures 3, 7) 4 16 ns
V.28 TRANSMITTER
Output Voltage Swing (Figure 4) V
Short-Circuit Current I
Output Leakage Current I
O
SC
Z
Open circuit ±7
RL = 3kΩ±5 ±6
-0.25V ≤ V
+0.25V, power-off or no-
OUT
cable mode
Output Slew Rate SR RL = 3kΩ, CL = 2500pF (Figures 4, 8) 4 30 V/µs
Transmitter Input to Output Delay
Transmitter Input to Output Delay
t
PHL
t
PLH
RL = 3kΩ, CL = 2500pF (Figures 4, 8) 1.5 2.5 µs
RL = 3kΩ, CL = 2500pF (Figures 4, 8) 1.5 3 µs
V.28 RECEIVER
Input Threshold Low V
Input Threshold High V
Input Hysteresis V
Input Resistance R
Rise or Fall Time tr, t
Receiver Input to Output Delay t
Receiver Input to Output Delay t
IL
IH
HYST
IN
PHL
PLH
-15V VIN +15V 3 5 7 k
(Figures 5, 9) 15 ns
f
(Figures 5, 9) 60 100 ns
(Figures 5, 9) 160 250 ns
±1 ±100 µA
±1 ±100 µA
0.8 1.2 V
1.2 2.0 V
0.05 0.3 V
±150 mA
V
Page 5
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
_______________________________________________________________________________________ 5
Typical Operating Characteristics
(VCC= +5.0V, C1 = C2 = C4 =1µF, C3 = C5 = 4.7µF, (Figure 10), TA= T
MIN
to T
MAX
, TA = +25°C, unless otherwise noted.)
V.11 SUPPLY CURRENT
vs. DATA RATE
160
140
120
100
80
60
SUPPLY CURRENT (mA)
40
DCE MODE, R = 50, ALL TRANSMITTERS
20
OPERATING AT THE SPECIFIED DATA RATE
0
0.1 100 1000
101 10,000
DATA RATE (kbps)
V.11 DRIVER DIFFERENTIAL OUTPUT
VOLTAGE vs. TEMPERATURE
5
DCE MODE, R = 50
4
3
2
1
0
-1
-2
-3
-4
DRIVER DIFFERENTIAL OUTPUT VOLTAGE (V)
-5 0 10203040506070
TEMPERATURE (°C)
100
MXL1543 toc01
80
60
40
SUPPLY CURRENT (mA)
20
0
10
V
OUT+
V
OUT-
MXL1543 toc04
-2
OUTPUT VOLTAGE (V)
-4
-6
-8
-10
8
6
4
2
0
V.28 SUPPLY CURRENT
vs. DATA RATE
DCE MODE ALL TRANSMITTERS OPERATING AT THE SPECIFIED DATA RATE
= 3k, CL = 2500pF
R
L
0 10050 150 200 250
DATA RATE (kbps)
V.28 OUTPUT VOLTAGE
vs. TEMPERATURE
DCE MODE, RL = 3k
0304010 20 50 60 70
TEMPERATURE (°C)
V
OUT+
V
OUT-
V.35 SUPPLY CURRENT
vs. DATA RATE
200
180
MXL1543 toc02
160
140
120
100
80
60
SUPPLY CURRENT (mA)
40
DCE MODE, FULL LOAD, ALL TRANSMITTERS
20
OPERATING AT THE SPECIFIED DATA RATE
0
0.1 100 1000
100.1 10,000
DATA RATE (kbps)
V.35 OUTPUT VOLTAGE
vs. TEMPERATURE
0.66
DCE MODE, VCM = 0
0.44
MXL1543 toc05
FULL LOAD
0.22
0
-0.22
OUTPUT VOLTAGE (V)
-0.44
-0.66 0304010 20 50 60 70
TEMPERATURE (°C)
MXL1543 toc03
V
OH
V
OL
MXL1543 toc06
V.35 DIFFERENTIAL OUTPUT VOLTAGE
vs. COMMON-MODE VOLTAGE
600
590
580
570
560
550
540
DIFFERENTIAL OUTPUT VOLTAGE (mV)
530
520
-4 -2 -1-3 01234
|VOD|
COMMON-MODE VOLTAGE (V)
MXL1543 toc07
V.11/V.35 RECEIVER INPUT CURRENT
vs. INPUT VOLTAGE
300
DCE MODE
200
100
0
-100
RECEIVER INPUT CURRENT (µA)
-200
-300
-10 -2-4-8-6 0246810 INPUT VOLTAGE (V)
V.28 RECEIVER INPUT CURRENT
2.5
DCE MODE
2.0
MXL1543 toc08
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
RECEIVER INPUT CURRENT (mA)
-2.0
-2.5
-10 -2-4-8-6 0246810
vs. INPUT VOLTAGE
MXL1543 toc09
INPUT VOLTAGE (V)
Page 6
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VCC= +5.0V, C1= C2 = C4 =1µF, C3 = C5 = 4.7µF (Figure 10), TA = +25°C, unless otherwise noted.)
V.11 LOOPBACK OPERATION
R = 50
T
IN
T
OUT/RIN
R
OUT
200ns/div
V.28 SLEW RATE vs. C
24 22
20 18 16 14 12 10
SLEW RATE (V/µs)
8 6
RL = 3k
4
1 TRANSMITTER SWITCHING AT 250kbps.
2
OTHER TRANSMITTERS SWITCHING AT 15kbps
0
0 1000 2000 3000 4000 5000
+SLEW
C
LOAD
(pF)
-SLEW
LOAD
MXL1543 toc10
5V/div
5V/div
5V/div
MXL1543 toc13
V.28 LOOPBACK OPERATION
CL = 2500pF RL = 3k
T
IN
T
OUT/RIN
R
OUT
1µs/div
V.11 TRANSMITTER PROPAGATION DELAY
vs. TEMPERATURE
80
70
60
0203010
t
PLH
t
PHL
TEMPERATURE (°C)
40
50
40
30
PROPAGATION DELAY (ns)
20
10
0
MXL1543 toc11
50 60 70
5V/div
5V/div
5V/div
MXL1543 toc14
V.35 LOOPBACK OPERATION
FULL LOAD
T
IN
T
OUT/RIN
R
OUT
200ns/div
V.11 RECEIVER PROPAGATION DELAY
vs. TEMPERATURE
80
70
0203010
t
PHL
t
PLH
TEMPERATURE (°C)
60
50
40
30
PROPAGATION DELAY (ns)
20
10
0
40
MXL1543 toc12
5V/div
1V/div
5V/div
MXL1543 toc15
50 60 70
V.35 TRANSMITTER PROPAGATION DELAY
vs. TEMPERATURE
80
70
60
50
40
30
PROPAGATION DELAY (ns)
20
10
0
0203010
t
PLH
t
PHL
40
TEMPERATURE (°C)
50 60 70
MXL1543 toc16
V.35 RECEIVER PROPAGATION DELAY
vs. TEMPERATURE
100
90
80
70
60
50
40
30
PROPAGATION DELAY (ns)
20
10
0
0203010
t
PHL
t
PLH
40
TEMPERATURE (°C)
50 60 70
MXL1543 toc17
Page 7
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
_______________________________________________________________________________________ 7
Figure 1. V.11 DC Test Circuit
Figure 4. V.28 Driver Test Circuit
Figure 5. V.28 Receiver Test Circuit
Figure 2. V.11 AC Test Circuit
Figure 3. V.35 Transmitter/Receiver Test Circuit
Test Circuits
V
OD
100pF
B
R
V
R
OC
D
A
100
100pF
50
V
B
D
V
OD
A
125
50
CM
125
50
50
B
R
A
15pF
R
B
A
15pF
A
D
C
V
L
O
A
D
R
L
R
15pF
Page 8
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
8 _______________________________________________________________________________________
Figure 6. V.11, V.35 Driver Propagation Delays
Figure 7. V.11, V.35 Receiver Propagation Delays
Figure 8. V.28 Driver Propagation Delays
Figure 9. V.28 Receiver Propagation Delays
Timing Diagrams
5V
D
0
V
0
B — A
-V
0
A
B
V
1.5V
t
PLH
50%
0
V
0
B A
-V
0
V
0H
R
V
0L
0
t
PLH
3V
D
0
V
0
A
-V
0
1.5V
t
PHL
3V
f = 1MHz: tr 10ns: tf 10ns
90% 10%
t
r
t
SKEW
1.5V
0
-3V
t
r
V
= V(A) - V(B)
DIFF
1/2 V
0
f = 1MHz: tr 10ns: tf 10ns
INPUT
OUTPUT
1.5V
-3V
1.5V
t
PHL
90%
0
t
PHL
t
PLH
0
50%
10%
t
f
t
SKEW
1.5V
3V
t
r
V
IH
A
V
IL
V
0H
R
V
0L
1.3V
t
PHL
0.8V
1.7V
t
PLH
2.4V
Page 9
Detailed Description
The MXL1543 is a three-driver/three-receiver, multipro­tocol transceiver that operates from a single +5V sup­ply. The MXL1543, along with the MXL1544/MAX3175 and MXL1344A, form a complete software-selectable DTE or DCE interface port that supports the V.28 (RS-
232), V.10/V.11 (RS-449/V.36, EIA-530, EIA-530A, X.21), and V.35 protocols. The MXL1543 transceivers carry the high-speed clock and data signals, while the MXL1544/MAX3175 transceivers carry serial interface control signaling. The MXL1543 can be terminated by the MXL1344A software-selectable resistor termination network or by a discrete termination network. The MXL1543 features a 0.5µA no-cable mode, true fail-
safe operation, and thermal shutdown circuitry. Thermal shutdown protects the drivers against excessive power dissipation. When activated, the thermal shutdown cir­cuitry places the driver outputs into a high-impedance state.
Mode Selection
The state of the mode-select pins M0, M1, and M2 determines which serial interface protocol is selected (Table 1). The state of the DCE/DTE input determines whether the transceiver will be configured as a DTE or DCE serial port. When the DCE/DTE input is logic HIGH, driver T3 is activated and receiver R1 is dis­abled. When the DCE/DTE input is logic LOW, driver T3
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
_______________________________________________________________________________________ 9
Pin Description
PIN NAME FUNCTION
1 C1- Capacitor C1 Negative Terminal. Connect a 1µF ceramic capacitor between C1+ and C1-.
2 C1+ Capacitor C1 Positive Terminal. Connect a 1µF ceramic capacitor between C1+ and C1-.
3VDDGenerated Positive Supply. Connect a 4.7µF ceramic capacitor to ground.
4VCC+5V Supply Voltage (±5%). Decouple with a 1µF capacitor to ground.
5 T1IN Transmitter 1 TTL-Compatible Input
6 T2IN Transmitter 2 TTL-Compatible Input
7 T3IN Transmitter 3 TTL-Compatible Input
8 R1OUT Receiver 1 CMOS Output
9 R2OUT Receiver 2 CMOS Output
10 R3OUT Receiver 3 CMOS Output
11 M0 Mode-Select Pin with Internal Pullup to V
CC
12 M1 Mode-Select Pin with Internal Pullup to V
CC
13 M2 Mode-Select Pin with Internal Pullup to V
CC
14 DCE/DTE DCE/DTE Mode-Select Pin with Internal Pullup to V
CC
15 R3INB Noninverting Receiver Input
16 R3INA Inverting Receiver Input
17 R2INB Noninverting Receiver Input
18 R2INA Inverting Receiver Input
19
Noninverting Transmitter Output/Noninverting Receiver Input
20
Inverting Transmitter Output/Inverting Receiver Input
21 T2OUTB Noninverting Transmitter Output
22 T2OUTA Inverting Transmitter Output
23 T1OUTB Noninverting Transmitter Output
24 T1OUTA Inverting Transmitter Output
25 GND Ground
26 V
EE
Generated Negative Supply. Connect a 4.7µF ceramic capacitor to ground.
27 C2- Capacitor C2 Negative Terminal. Connect a 1µF ceramic capacitor between C2+ and C2-.
28 C2+ Capacitor C2 Positive Terminal. Connect a 1µF ceramic capacitor between C2+ and C2-.
T3OUTB/R1INB
T3OUTA/R1INA
Page 10
MXL1543
is disabled and receiver R1 is activated. M0, M1, M2, and DCE/DTE are internally pulled up to V
CC
to ensure
a logic HIGH if left unconnected.
No-Cable Mode
The MXL1543 will enter no-cable mode when the mode-select pins are left unconnected or connected high (M0 = M1 = M2 = 1). In this mode, the multiproto­col drivers and receivers are disabled and the supply current drops to 0.5µA. The receivers outputs enter a high-impedance state in no-cable mode, which allow these output lines to be shared with other receivers outputs (the receivers outputs have internal pullup resistors to pull the outputs HIGH if not driven). Also, in no-cable mode, the transmitter outputs enter a high­impedance state so that these output lines can be shared with other devices.
Dual Charge-Pump Voltage Converter
The MXL1543s internal power supply consists of a reg­ulated dual charge pump that provides positive and negative output voltages from a +5V supply. The charge pump operates in discontinuous mode. If the output voltage is less than the regulated voltage, the charge pump is enabled. If the output voltage exceeds the regulated voltage, the charge pump is disabled.
Each charge pump requires a flying capacitor (C1, C2) and a reservoir capacitor (C3, C5) to generate the V
DD
and VEEsupplies. Figure 10 shows charge-pump con­nections.
Fail-Safe Receivers
The MXL1543 guarantees a logic-high receiver output when the receiver inputs are shorted or open, or when they are connected to a terminated transmission line with all the drivers disabled. This is done by setting the receivers threshold between -25mV and -200mV in the
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
10 ______________________________________________________________________________________
)
)
Table 1. Mode Selection
Figure 10. Charge Pump
MXL1543
MODE NAME
Not Used (Default V.11
RS-530A 0 0 1 0 V.11 V.11 Z V.11 V.11 V.11
RS-530 0 1 0 0 V.11 V.11 Z V.11 V.11 V.11
X.21 0 1 1 0 V.11 V.11 Z V.11 V.11 V.11
V.35 1 0 0 0 V.35 V.35 Z V.35 V.35 V.35
RS-449/V.36 1 0 1 0 V.11 V.11 Z V.11 V.11 V.11
V.28/RS-232 1 1 0 0 V.28 V.28 Z V.28 V.28 V.28
No Cable 1 1 1 0 Z Z Z Z Z Z
Not Used (Default V.11
RS-530A 0 0 1 1 V.11 V.11 V.11 Z V.11 V.11
RS-530 0 1 0 1 V.11 V.11 V.11 Z V.11 V.11
X.21 0 1 1 1 V.11 V.11 V.11 Z V.11 V.11
V.35 1 0 0 1 V.35 V.35 V.35 Z V.35 V.35
RS-449/V.36 1 0 1 1 V.11 V.11 V.11 Z V.11 V.11
V.28/RS-232 1 1 0 1 V.28 V.28 V.28 Z V.28 V.28
No Cable 1 1 1 1 Z Z Z Z Z Z
M2 M1 M0
0 0 0 0 V.11 V.11 Z V.11 V.11 V.11
0 0 0 1 V.11 V.11 V.11 Z V.11 V.11
DCE/
DTE
T1 T2 T3 R1 R2 R3
5V
4.7µF
1µF
C3
C1
1µF
C4
V
C1+
C1-
V
DD
CC
MXL1543
C2+
C2-
GND
V
EE
C2 1µF
C5
4.7µF
Page 11
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
______________________________________________________________________________________ 11
Figure 11. Cable-Selectable Multiprotocol DTE/DCE Port
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
C10 1µF
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
C3
4.7µF
C6
100pFC7100pFC8100pF
3
8111213
V
5V
F
CC
14
V
C11 1µF
C12 1µF
CC
2
V
EE
4 6 7 9 10 16 15 18 17 19 20 22 23 24 15
C13
C2 1µF
C5
4.7µF
1µF
PUMP
D1
D2
D3
R1
R2
R3
D1
D2
D3
R1
R2
R3
R4
D4
GND
28
27 26
25
24 23 22 21
20 19
18 17 16 15
28
V
EE
27
26 25 24 23
22 21
20 19 18 17
16
15
3
1
C1
1µF
C4 1µF
NC
C9
V
NC
10
11
12 13 14
CC
10
11
12 13 14
CHARGE
2 4
5
6
7
8
9
MXL1543
M0 M1 M2 DCE/DTE
1
V
CC
2
V
DD
3
4
5
6
7
8
9
MXL1544
M0
MAX3175
M1 M2
DCE/DTE INVERT
MXL1344A
DCE/DTE
M2
V
CC
LATCH
M1
21
M0
DCE
DTE
2
RXD A
TXD A
14 24 11
15 12
17
16
25
21 18
19 20 23
10
22
13
TXD B SCTE A SCTE B
TXC A TXC B
RXC A
9
RXC B
3
RXD A RXD B
7
SG
1
SHIELD
CONNECTOR
DCE/DTE M1 M0
4
RTS A RTS B
DTR A DTR B
8
DCD A DCD B
6
DSR A DSR B
5
CTS A CTS B
DB-25
RXD B RXC A RXC B
TXC A TXC B
SCTE A SCTE B
TXD A TXD B
CTS A CTS B
DSR A DSR B
DCD A DCD B
DTR A DTR B
RTS A RTS B
Page 12
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
12 ______________________________________________________________________________________
V.11 and V.35 modes. If the differential receiver input voltage (B - A) is -25mV, R_OUT is logic HIGH. If (B ­A) is -200mV, R_OUT is logic LOW. In the case of a terminated bus with all transmitters disabled, the receivers differential input voltage is pulled to zero by the termination. With the receiver thresholds of the MXL1543, this results in a logic HIGH with a 25mV mini­mum noise margin.
Applications Information
Capacitor Selection
The capacitors used for the charge pumps, as well as for supply bypassing, should have a low equivalent series resistance (ESR) and low temperature coeffi­cient. Multilayer ceramic capacitors with an X7R dielec­tric offer the best combination of performance, size, and cost. The flying capacitors (C1, C2) and the bypass capacitor (C4) should have a value of 1µF, while the reservoir capacitors (C3, C5) should have a minimum value of 4.7µF (Figure 10). To reduce the rip­ple present on the transmitter outputs, capacitors C3, C4, and C5 can be increased. The values of C1 and C2 should not be increased.
Cable Termination
The MXL1344A software-selectable resistor network is designed to be used with the MXL1543. The MXL1344A multiprotocol termination network provides V.11- and V.35-compliant termination, while V.28 receiver termina­tion is internal to the MXL1543. These cable termination networks provide compatibility with V.11, V.28, and V.35 protocols. Using the MXL1344A termination net­works provide the advantage of not having to build expensive termination networks out of resistors and relays, manually changing termination modules, or building custom termination networks
Cable-Selectable Mode
A cable-selectable multiprotocol interface is shown in Figure 11. The mode control lines M0, M1, and DCE/DTE are wired to the DB-25 connector. To select the serial interface mode, the appropriate combination of M0, M1, and DCE/DTE are grounded within the cable wiring. The control lines that are not grounded are pulled high by the internal pullups on the MXL1543. The serial interface protocol of the MXL1543, MXL1544/MAX3175, and MXL1344A is selected based on the cable that is connected to the DB-25 interface.
V.11 Interface
As shown in Figure 12, the V.11 protocol is a fully bal­anced differential interface. The V.11 driver generates a minimum of ±2V between nodes A and B when a 100 (min) resistance is presented at the load. The V.11 receiver is sensitive to ±200mV differential signals at receiver inputs A and B. The V.11 receiver rejects common-mode signals developed across the cable (referenced from C to C) of up to ±7V, allowing for error-free reception in noisy environments. The receiver inputs must comply with the impedance curve shown in Figure 13.
For high-speed data transmission, the V.11 specifica­tion recommends terminating the cable at the receiver with a 100resistor. This resistor, although not required, prevents reflections from corrupting transmit­ted data. In Figure 14, the MXL1344A is used to termi­nate the V.11 receiver. Internal to the MXL1344A, S1 is closed and S2 is open to present a 100minimum dif­ferential resistance. The MXL1543s internal V.28 termi­nation is disabled by opening S3.
V.35 Interface
Figure 15 shows a fully-balanced, differential standard V.35 interface. The generator and the load must both present a 100Ω ±10Ω differential impedance and a 150±15common-mode impedance as shown by the resistive T networks in Figure 15. The V.35 driver generates a current output (±11mA, typ) that develops an output voltage of ±550mV across the generator and
Figure 12. Typical V.11 Interface
Figure 13. Receiver Input Impedance
BALANCED
INTERCONNECTING
GENERATOR
A
B
C
GND GND
CABLE
TERMINATION
A
B
C
CABLE
100
MIN
LOAD
RECEIVER
I
Z
-10V
-3.25mA
-3V
+3V
3.25mA
+10V
V
Z
Page 13
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
______________________________________________________________________________________ 13
Figure 16. V.35 Termination and Internal Resistance Networks
Figure 14. V.11 Termination and Internal Resistance Networks
Figure 15. Typical V.35 Interface
A
R1
MXL1344A
52
S1
R3
S2
124
R2 52
B
C
GENERATOR
A
50
125
50
B
C
GND GND
A
B
GND
BALANCED
INTERCONNECTING
CABLE
R8 5k
125
MXL1543
RECEIVER
LOAD
RECEIVER
50
50
R5
30k
R6
10k
S3
R7
10k
R4
30k
CABLE
TERMINATION
A
B
C
A
R1
MXL1344A
52
S1
R2 52
B
C
R3
124
S2
A
R5
30k R8 5k
B
GND
R6
10k
S3
R7
10k
R4
30k
MXL1543
RECEIVER
Page 14
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
14 ______________________________________________________________________________________
Figure 17. Typical V.28 Interface
Figure 18. V.28 Termination and Internal Resistance Networks
load termination networks. The V.35 receiver is sensi­tive to ±200mV differential signals at receiver inputs A and B. The V.35 receiver rejects common-mode sig­nals developed across the cable (referenced from C to C) of up to ±4V, allowing for error-free reception in noisy environments.
In Figure 16, the MXL1344A is used to implement the resistive T network that is needed to properly terminate the V.35 driver and receiver. Internal to the MXL1344A, S1 and S2 are closed to connect the T-network resis­tors to the circuit. The V.28 termination resistor (internal to the MXL1543) is disabled by opening S3 to avoid interference with the T-network impedance.
V.28 Interface
The V.28 interface is an unbalanced single-ended inter­face (Figure 17). The V.28 driver generates a minimum of ±5V across a 3kload impedance between A and C. The V.28 receiver has a single-ended input. To aid
in rejecting system noise, the MXL1543s V.28 receiver has a typical hysteresis of 0.05V.
Figure 18 shows the MXL1344As termination network disabled by opening S1 and S2. The MXL1543s inter­nal 5kV.28 termination is enabled by closing S3.
DTE vs. DCE Operation
Figure 19 shows a DCE or DTE controller-selectable interface. DCE/DTE (pin 14) switches the ports mode of operation. See Table 1.
This application requires only one DB-25 connector, but separate cables for DCE or DTE signal routing. See Figure 19 for complete signal routing in DCE and DTE modes.
Complete Multiprotocol X.21 Interface
A complete DTE-to-DCE interface operating in X.21 mode is shown in Figure 20. The MXL1543 is used to generate the clock and data signals, and the
A
B
GENERATOR
UNBALANCED
INTERCONNECTING
CABLE
A
C
GND GND
A
R1
MXL1344A
52
S1
R2 52
R3
S2
124
S3
B
R8 5k
30k
30k
A
C
R5
R6
10k
R7
10k
R4
CABLE
TERMINATION
MXL1543
RECEIVER
LOAD
RECEIVER
C
GND
Page 15
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
______________________________________________________________________________________ 15
Figure 19. Multiprotocol DCE/DTE Port
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
C10 1µF
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_LL
C3
4.7µF
C6
100pFC7100pFC8100pF
3
8111213
V
5V
F
CC
14
V
C11 1µF
C12 1µF
CC
2
V
EE
4 6 7 9 10 16 15 18 17 19 20 22 23 24 15
C13
C2 1µF
C5
4.7µF
1µF
CHARGE
PUMP
D1
D2
D3
R1
R2
R3
MXL1543
D1
D2
D3
R1
R2
R3
R4
D4
GND
28
27 26
25
24 23 22 21
20 19
18 17 16 15
28
V
EE
27
26 25 24 23
22 21
20 19 18 17
16
3
1
C1
1µF
2 4
C4 1µF
5
6
7
8
9
10
11
M0
12
M1
13
M2
14
DCE/DTE
C9
V
CC
1
V
CC
2
V
DD
3
4
5
6
7
8
10
9
MXL1344A
DCE/DTE
M2
LATCH
M1
21
M0
DCE
DTE
2
RXD A
TXD A
14
RXD B
TXD B
24
RXC A
SCTE A
11
RXC B
SCTE B
15
TXC A
TXC A
12
TXC B
TXC B
17
SCTE A
RXC A
9
SCTE B
RXC B
3
TXD A
RXD A
16
TXD B
RXD B
7
SG
1
SHIELD
DB-25
CONNECTOR
4
CTS A
RTS A
19
RTS B
CTS B
20
DSR A
DTR A
23
DTR B
DSR B
8
DCD A
DCD A
10
DCD B
DCD B
6
DTR A
DSR A
22
DTR B
DSR B
5
RTS A
CTS A
13
RTS B
CTS B
18
LLA
LLA
DCE/DTE
M2 M1 M0
11
12 13 14
MXL1544
M0
MAX3175
M1 M2 DCE/DTE
INVERT
15
Page 16
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
16 ______________________________________________________________________________________
Figure 20. DCE-to-DTE X.21 Interface
MXL1544/MAX3175 generate the control signals and local loopback (LL). The MXL1344A is used to termi­nate the clock and data signals to support the V.11 pro­tocol for cable termination. The control signals do not need external termination.
Compliance Testing
A European Standard EN 45001 test report is pending for the MXL1543/MXL1544/MXL1344A chipset. A copy of the test report will be available from Maxim upon completion.
SERIAL
CONTROLLER
TXD
SCTE
TXC
RXC
RXD
RTS
DTR
DCD
DTE
D1
D2
D3
R3
R2
R1
MXL1544 MAX3175
D1
D2
D3
R1
MXL1344AMXL1543
104
104
104
TXD
SCTE
TXC
RXC
RXD
RTS
DTR
DCD
104
104
DCE
MXL1543MXL1344A
MXL1544 MAX3175
SERIAL
CONTROLLER
R3
R2
R1
D1
D2
D3
R3
R2
R1
D3
TXD
SCTE
TXC
RXC
RXD
RTS
DTR
DCD
DSR
CTS
R2
R3
LL
D4
R4
DSR
CTS
LL
D2
D1
R4
D4
DSR
CTS
LL
Page 17
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software-
Selectable Clock/Data Transceivers
______________________________________________________________________________________ 17
Pin ConfigurationChip Information
TRANSISTOR COUNT: 2619 PROCESS: BiCMOS
TOP VIEW
C1-
C1+
V
V
T1IN
T2IN
T3IN
R1OUT
R2OUT
R3OUT
M0
M1
M2
DCE/DTE
1
2
3
DD
4
CC
5
MXL1543
6
7
8
9
10
11
12
13
14
28
C2+
27
C2-
26
V
EE
25
GND
24
T1OUTA
23
T1OUTB
22
T2OUTA
21
T2OUTB
20
T3OUTA/R1INA
19
T3OUTB/R1INB
18
R2INA
17
R2INB
16
R3INA
15
R3INB
SSOP
Page 18
MXL1543
+5V Multiprotocol, 3Tx/3Rx, Software­Selectable Clock/Data Transceivers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
SSOP.EPS
Loading...