MAXIM MX7575, MX7576 User Manual

19-0876; Rev 1; 5/96

CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs

_______________General Description

Maxim’s MX7575/MX7576 are high-speed (5µs/10µs),
microprocessor (µP) compatible, 8-bit analog-to-digital
converters (ADCs). The MX7575 provides an on-chip
track/hold function that allows full-scale signals up to
50kHz (386mV/µs slew rate) to be acquired and digi­tized accurately. Both ADCs use a successive-approxi­mation technique to achieve their fast conversions and
low power dissipation. The MX7575/MX7576 operate
with a +5V supply and a 1.23V external reference. They
accept input voltages ranging from 0V to 2V

REF

.

The MX7575/MX7576 are easily interfaced to all popu­lar 8-bit µPs through standard CS and RD control sig­nals. These signals control conversion start and data
access. A BUSY signal indicates the beginning and
end of a conversion. Since all the data outputs are
latched and three-state buffered, the MX7575/MX7576
can be directly tied to a µP data bus or system l/O port.

Maxim also makes the MAX165, a plug-in replacement
for the MX7575 with an internal 1.23V reference. For
applications that require a differential analog input and
an internal reference, the MAX166 is recommended.

________________________Applications

Digital Signal Processing
High-Speed Data Acquisition
Telecommunications
Audio Systems
High-Speed Servo Loops
Low-Power Data Loggers

_________________Pin Configurations

____________________________Features

♦ Fast Conversion Time: 5µs (MX7575)

10µs (MX7576)

♦ Built-In Track/Hold Function (MX7575)
♦ Low Total Unadjusted Error (±1LSB max)
♦ 50kHz Full-Power Signal Bandwidth (MX7575)
♦ Single +5V Supply Operation
♦ 8-Bit µP Interface
♦ 100ns Data-Access Time
♦ Low Power: 15mW
♦ Small-Footprint Packages

______________Ordering Information

PART

MX7575JN

MX7575KN
MX7575JCWN 0°C to +70°C
MX7575KCWN 0°C to +70°C 18 Wide SO
MX7575JP 0°C to +70°C 20 PLCC
MX7575KP 0°C to +70°C 20 PLCC
MX7575J/D 0°C to +70°C Dice* ±1
MX7575AQ -25°C to +85°C 18 CERDIP**
MX7575BQ -25°C to +85°C 18 CERDIP**±1±1/2

TEMP. RANGE PIN-PACKAGE

0°C to +70°C
0°C to +70°C

18 Plastic DIP
18 Plastic DIP
18 Wide SO

Ordering Information continued at end of data sheet.

* Contact factory for dice specifications.
** Contact factory for availability.

INL

(LSB)

±1
±1/2
±1
±1/2
±1
±1/2

_______________Functional Diagrams

MX7575/MX7576

V

TOP VIEW

1

CS

2

RD

TP (MODE)

BUSY

CLK

D7 (MSB)

D6
D5

DGND

( ) ARE FOR MX7576 ONLY.

Pin Configurations continued at end of data sheet.

MX7575

3

MX7576

4
5
6
7
8
9



DIP/SO



________________________________________________________________

18
17
16
15
14
13
12
11
10



V

DD

REF
AIN
AGND
D0 (LSB)
D1
D2
D3
D4

MX7575

16

AIN

15

AGND

17

REF

CLOCK

5

CLK

Functional Diagrams continued at end of data sheet.

OSCILLATOR

1

CS

2

RD

3

TP

TRACK/

HOLD

CONTROL

LOGIC

49

BUSY DGND

Maxim Integrated Products

DAC

SAR

DD

18

COMP

LATCH AND

THREE-STATE

OUTPUT DRIVERS

6

D7

.

.

D0

14

1

For free samples & the latest literature: http://www.maxim-ic.com, or phone [phone]

CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs

ABSOLUTE MAXIMUM RATINGS

VDDto AGND...............................................................-0.3V, +7V

to DGND ..............................................................-0.3V, +7V

V

DD

AGND to DGND...............................................-0.3V, V

Digital Input Voltage to DGND

(CS, RD, TP, MODE)......................................-0.3V, V

Digital Output Voltage to DGND

(BUSY, D0–D7)..............................................-0.3V, V

CLK Input Voltage to DGND............................-0.3V, V

REF to AGND...................................................-0.3V, V

AIN to AGND....................................................-0.3V, V

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

DD

DD

DD
DD
DD
DD

+ 0.3V
+ 0.3V
+ 0.3V

+ 0.3V
+ 0.3V
+ 0.3V

Continuous Power Dissipation (T

Plastic DIP (derate 11.11mW/°C above +70°C)...............889mW

= +70°C)

A

Wide SO (derate 9.52mW/°C above +70°C)..................762mW

CERDIP (derate 10.53mW/°C above +70°C).................842mW

PLCC (derate 10.00mW/°C above +70°C) ....................800mW

Operating Temperature Ranges

MX757_J/K............................................................0°C to +70°C

MX757_A/B........................................................-25°C to +85°C

MX757_JE/KE ....................................................-40°C to +85°C

MX757_S/T.......................................................-55°C to +125°C

Storage Temperature Range.............................-65°C to +160°C

Lead Temperature (soldering,10sec)..............................+300°C

MX7575/MX7576

ELECTRICAL CHARACTERISTICS

(VDD= +5V; V

= T

T

to T

A

MIN

ACCURACY

ANALOG INPUT

Voltage Range

REFERENCE INPUT

Reference Voltage
Reference Current

LOGIC INPUTS CS, RD, MODE

Input Low Voltage
Input High Voltage

Input Current µA
Input Capacitance (Note 2)

= 1.23V; AGND = DGND = 0V; f

REF

, unless otherwise noted.)

MAX

TUETotal Unadjusted Error

INLRelative Accuracy

REF
REF

INL
INH

I

IN

IN

= 4MHz external for MX7575; f

CLK

CONDITIONS

MX757_K/B/T
MX757_J/A/S
MX757_K/B/T
MX757_J/A/S

1LSB = 2V

REF

/256

MX7575
MX7575, VIN= 2.46V

at 10kHz, Figure 13

p-p

±5% variation for specified performance

V

IN

= 0V or V

DD

TA= +25°C
TA= T

MIN

to T

MAX

= 2MHz external for MX7576;

CLK

±1
±2

±1/2

±1

REF

±1

±10

UNITSMIN TYP MAXSYMBOLPARAMETER

ppm/°C±5Full-Scale Tempco

ppm/°C±5Offset Tempco

Bits8Resolution

LSB

LSB

Bits8No-Missing-Codes Resolution

LSB±1Full-Scale Error

LSB±1/2Offset Error (Note 1)

V02V

MΩ10DC Input Impedance

V/µs0.386Slew Rate, Tracking

dB45SNRSignal-to-Noise Ratio (Note 2)

V1.23V

µA500I

V0.8V
V2.4V

pF10C

2 _______________________________________________________________________________________

CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs

BUSY

ELECTRICAL CHARACTERISTICS (continued)

(VDD= +5V; V

= T

T

to T

A

MIN

CLOCK

Input Low Voltage
Input High Voltage

Input Low Current

Input High Current

LOGIC OUTPUTS (D0–D7,

Output Low Voltage
Output High Voltage

Floating State Leakage Current

Floating State Output
Capacitance (Note 2)

CONVERSION TIME (Note 3)

Conversion Time with
External Clock

Conversion Time with
Internal Clock

POWER REQUIREMENTS (Note 4)

Supply Voltage
Supply Current

Note 1: Offset Error is measured with respect to an ideal first-code transition that occurs at 1/2LSB.
Note 2: Sample tested at +25°C to ensure compliance.
Note 3: Accuracy may degrade at conversion times other than those specified.
Note 4: Power-supply current is measured when MX7575/MX7576 are inactive, i.e.:

For MX7575 CS = RD = BUSY = high;
For MX7576 CS = RD = BUSY = MODE = high.

= 1.23V; AGND = DGND = 0V; f

REF

, unless otherwise noted.)

MAX

INL

INH

I

INL

I

INH

)

OL
OH

DD

I

DD

= 4MHz external for MX7575; f

CLK

CONDITIONS

VIN= 0V

VIN= V

DD

I

= 1.6mA

SINK

I

= 40µA

SOURCE

V

= 0V to VDD, D0–D7

OUT

MX757_J/A/K/B
MX757_S/T
MX757_J/A/K/B
MX757_S/T

TA= +25°C
TA= T

D0–D7

MX7575: f
MX7576: f

CLK
CLK

= 4MHz
= 2MHz

Using recommended
clock components:

= 100kΩ,

R

CLK

= 100pF;

C

CLK

= +25°C

T

A

±5% for specified performance
MX757_J/A/K/B
MX757_S/T

4.75V < VDD< 5.25V LSB±1/4Power-Supply Rejection

MIN

MX7575

MX7576

to T

CLK

MAX

= 2MHz external for MX7576;

UNITSMIN TYP MAXSYMBOLPARAMETER

V0.8V

V2.4V
700
800
700
800

µA

µA

V0.4V

V4.0V

±1

±10

µA

pF10

5

10

µs

515

µs

10 30

V5V

36

mA

7

mW15Power Dissipation

MX7575/MX7576

_______________________________________________________________________________________ 3

CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs

TIMING CHARACTERISTICS (Note 5)

(VDD= +5V, V

CS to RD Setup Time
RD to BUSY Propagation Time
Data-Access Time after RD
RD Pulse Width
CS to RD Hold Time

Data-Access Time after BUSY
Data-Hold Time t

MX7575/MX7576

BUSY to CS Delay

Note 5: Timing specifications are sample tested at +25°C to ensure compliance. All input control signals are specified with
Note 6: t3and t6are measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8V or 2.4V.

Note 7: t

______________________________________________________________Pin Description

= 1.23V, AGND = DGND = 0V.)

REF

TA= +25°C TA= T

PARAMETER SYMBOL CONDITIONS

t

1

t

2

t

(Note 6) 100 100 120 ns

3

t

4

t

5

t

(Note 6) 80 80 100 ns

6

(Note 7) 10 80 10 80 10 100 ns

7

t

8

t

= tf= 20ns (10% to 90% of +5V) and timed from a voltage level of 1.6V.

r

is defined as the time required for the data lines to change 0.5V when loaded with the circuits of Figure 2.

7

ALL J/K/A/B S/T

MIN MAX MIN MAX MIN MAX

0 0 0 ns

100 100 120 ns

100 100 120 ns

0 0 0 ns

0 0 0 ns

MIN

to T

MAX

UNITS

PIN

DIP/SO

10–13 D4–D1 Three-State Data Outputs, bits 4–1

4 _______________________________________________________________________________________

PLCC

1
2

3

4
5 CLK External Clock Input/Internal Oscillator Pin for frequency setting RC components.

6 D7 Three-State Data Output, bit 7 (MSB)

7, 8 D6, D5 Three-State Data Outputs, bits 6 and 5

9 DGND Digital Ground

12–15
14 D0 Three-State Data Output, bit 0 (LSB)
15 AGND Analog Ground
16 AIN Analog Input. 0V to 2V
17 REF Reference Input. +1.23V nominal.
18 V
— N.C. No Connect

1, 11

NAME FUNCTION

2
3

4

5
6

7

8, 9

10

16
17

19
20

CS Chip Select Input. CS must be low for the device to be selected or to recognize the RD input.

Read Input. RD must be low to access data. RD is also used to start conversions. See the

RD

TP

(MX7575)

MODE

(MX7576)

BUSY

DD

Microprocessor Interface

Test Point. Connect to VDD.
Mode Input. MODE = low puts the ADC into its asynchronous conversion mode. MODE has to be

tied high for the synchronous conversion mode and the ROM interface mode.
BUSY Output. BUSY going low indicates the start of a conversion. BUSY going high indicates the

end of a conversion.

Power-Supply Voltage. +5V nominal.

REF

section.

input range.18