MAXIM MAXQ622 User Manual
19-5458; Rev 4; 11/11
ERRATA SHEET
MAXQ622
__________________________________________________________ Revision B1 Errata
The errata listed below describe situations where MAXQ622 revision B1 components perform differently
than expected or dif ferently than described in t he data sheet. Maxim Integrated Products, Inc. , intends t o
correct these errata when the opportunity to redesign the product presents itself.
This errata sheet only applies t o MAXQ622 revision B1 component s. Rev ision B1 c omponents are branded
on the topside of the package with a six-digit code in the form yywwB1, where yy and ww are two-digit
numbers representing t he year and wor k week of manufact ure, respectively . To obtain an errata sheet on
another MAXQ622 die revision, visit our webs ite at
1) WATCHDOG TIMER RESET LOCKS THE IC IN RESET
Description:
When the i nter nal oscill ator (PLL) i s used i n div i de-by-4 mode as system cl ock , the watchdog t i m er reset
locks the IC in reset. This requires a power cycle to recover .
Workaround:
Prevent watchdog tim er r esets by regular monitoring of the watchdog or by using the watchdog interrupt
to switch the system cl oc k away from internal oscillator (PLL).
www.maxim-ic.com/errata.
2) FLASH PROGRAM/ERASE OPERATIONS FAIL IN CLOCK-DIVIDED MODE
Description:
Flash word programming and page erase operations do not c om plete successfully when inv oked with
clock divide-by-2, divide-by-4, or divide-by-8 modes active.
Workaround:
When using the fl ash controller directly, write and erase func tions exercised through the FCNTL and
FDATA regi sters must be performed with a nondiv ided system mode setting (see the CKCN r egister
description). In addition, the following utility ROM function calls access the FCNTL and F DA TA r egisters
and have t he same requir ement pri or to being cal led: UROM_flashWrite, UROM_flashErasePage, and
UROM_flashEraseAll. T he system clock m ust be set to divide-by-1 mode befor e calling any of t hese
routines.
___________________________________Maxim Integrated Products 1
MAXQ622
REV B1 ERRATA
3) SYSTEM CODE IS INADVERTENTLY ERASED
Description:
When user loader and user application code is loaded in upper f lash memory (with address greater than
0x7FFF) with memory pr otection enabled, the system code is inadvertently erased.
Workaround:
Avoid use of m em ory protecti on (or) make sure the co de with t he l owest mem ory priv ilege star ts belo w
address 0x8000.
4) MEMORY PROTECTION FAULT ASSERTED
Description:
When entering debug mode in upper memory (IP > 0x 7FFF, SC_UPA = 1) the debug engine inc or r ec tly
drops the privi lege level to the lowest state. I f the area of mem ory being debugged requires a higher
privilege i n or der to be accessed, a memory fault is generated upon ret ur n from the debug code.
Workaround:
Avoid use of memory prot ection ( or ) av oid debug in the upper memory (or) by allowing only UAPP c ode
in the upper memory.
5) V
6) UNRELIABLE POWER-UP WHEN ONLY V
7) HIGH V
POWER SUPPLY OSCILLATES UPON A USB DISCONNECT
DDIO
Description:
When the V
input power is above the V
DD
trip point (> 2.7V) with V
DDB
open-circuited, the V
BUS
power supply oscillates.
Workaround:
By using force V
depending on the v alue of V
.
V
DDB
(FRCVDD) the power switching can be prevented. Switch FRCVDD on and off
DD
by monitoring the SVM to prev ent power switch when VDD is greater than
DD
IS APPLIED
BUS
Description:
In some instances when the chip is powered up wit h just V
supply, the power-up sequence is not
BUS
properly executed.
Workaround:
supply should be in place and stable before V
V
DD
is applied.
BUS
STANDBY CURRENT
BUS
Description:
A high standby current is seen on V
FRCVDD = 1 and when V
DD
< V
with USB connected under t he following conditions:
BUS
- 0.5V.
DDB
Workaround:
Setting FRCVDD to a logic-low when the above condition exists prevent s a hi gh standby curr ent.
DDIO
2 ________________________________________________________________________________
19-5458; Rev 4; 11/11
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