MAXQ3100
Mixed-Signal Microcontroller with Analog
Comparators, LCD, and RTC
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Instruction Set
The instruction set is composed of fixed-length, 16-bit
instructions that operate on registers and memory locations. The instruction set is highly orthogonal, allowing
arithmetic and logical operations to use any register
along with the accumulator. Special-function registers
control the peripherals and are subdivided into register
modules. The family architecture is modular, so that
new devices and modules can reuse code developed
for existing products.
The architecture is transport-triggered. This means that
writes or reads from certain register locations can also
cause side effects to occur. These side effects form the
basis for the higher-level op codes defined by the
assembler, such as ADDC, OR, JUMP, etc. The op
codes are actually implemented as MOVE instructions
between certain system register locations, while the
assembler handles the encoding, which need not be a
concern to the programmer.
The 16-bit instruction word is designed for efficient execution. Bit 15 indicates the format for the source field of
the instruction. Bits 0 to 7 of the instruction represent the
source for the transfer. Depending on the value of the
format field, this can either be an immediate value or a
source register. If this field represents a register, the
lower four bits contain the module specifier and the
upper four bits contain the register index in that module.
Bits 8 to 14 represent the destination for the transfer. This
value always represents a destination register, with the
lower four bits containing the module specifier and the
upper three bits containing the register subindex within
that module.
Anytime that it is necessary to directly select one of the
upper 24 index locations in a destination module, the
prefix register PFX is needed to supply the extra destination bits. This prefix register write is inserted automatically by the assembler and requires only one
additional execution cycle.
Memory Organization
The device incorporates several memory areas:
• 2kWords utility ROM
• 8kWords of EEPROM for program storage
• 512 words of SRAM for storage of temporary
variables
• 16-level, 16-bit-wide stack memory for storage of
program return addresses and general-purpose use
The memory is arranged by default in a Harvard architecture, with separate address spaces for program and
data memory. The configuration of program and data
space depends on the current execution location.
• When executing code from EEPROM memory, the
SRAM and utility ROM are accessible in data space.
• When executing code from SRAM, the EEPROM and
utility ROM are accessible in data space.
• When executing code from the utility ROM, the
EEPROM memory and SRAM are accessible in data
space.
Refer to the
MAXQ Family User’s Guide: MAXQ3100
Supplement
for more details.
In all cases, whichever memory segment is currently
being executed from cannot be accessed in data space.
To allow the use of lookup tables and similar constructs
in the memory, the utility ROM contains a set of lookup
and block copy routines (refer to the user’s guide supplement for more details).
The incorporation of EEPROM allows the device to be
reprogrammed, eliminating the expense of throwing
away one-time programmable devices during development and field upgrades. Program memory can be
password protected with a 16-word key, denying
access to program memory by unauthorized individuals.
Stack Memory
A 16-bit-wide internal stack provides storage for program return addresses and general-purpose use. The
stack is used automatically by the processor when the
CALL, RET, and RETI instructions are executed and
interrupts serviced. The stack can also be used explicitly to store and retrieve data by using the PUSH, POP,
and POPI instructions.
On reset, the stack pointer, SP, initializes to the top of
the stack (0Fh). The CALL, PUSH, and interrupt-vectoring operations increment SP, then store a value at the
stack location pointed to by SP. The RET, RETI, POP,
and POPI operations retrieve the value at the stack
location pointed to by SP, and then decrement SP.
Utility ROM
The utility ROM is a 2kWord block of internal ROM
memory that defaults to a starting address of 8000h.
The utility ROM consists of subroutines that can be
called from application software. These include:
• In-system programming (bootloader) over the JTAGcompatible debug port
• In-circuit debug routines
• User-callable routines for in-application flash programming and code space table lookup