MAXIM MAX9875 Technical data

General Description

The MAX9875 combines a high-efficiency Class D audio power amplifier with a stereo Class AB capacitorless DirectDrive

headphone amplifier. Maxim’s 3rd generation, filterless Class D amplifier with active emissions limiting technology provides Class AB performance with Class D efficiency.

The MAX9875 delivers up to 725mW from a 3.7V supply into an 8Ω load with 87% efficiency to extend battery life. The filterless modulation scheme combined with active emissions limiting circuitry and spread-spectrum modulation greatly reduces EMI while eliminating the need for output filtering used in traditional Class D devices.

The stereo Class AB headphone amplifier in the MAX9875 uses Maxim’s DirectDrive architecture, that produces a ground-referenced output from a single supply, eliminating the need for large DC-blocking capacitors, saving cost, space, and component height.

The device utilizes a user-defined input architecture, three preamplifier gain settings, an input mixer, volume control, comprehensive click-and-pop suppression, and I

C control.

The MAX9875 is available in a thermally efficient, space-saving 20-bump WLP package.

Applications

Cell Phones

Portable Multimedia Players

Features

♦ Low Emissions, Filterless Class D Amplifier

Achieves Better than 10dB Margin Under EN55022 Class B Limits

♦ Low RF Susceptibility Design Rejects TDMA

Noise from GSM Radios

♦ Input Mixer with User-Defined Input Mode ♦ 725mW Speaker Output (R

SPK

= 8Ω, PVDD = 3.7V)

♦ 53mW Headphone Output (R

= 16Ω, VDD= 3.7V)

♦ Low 0.05% THD+N at 1kHz (Class D Power

Amplifier)

♦ Low 0.016% THD+N at 1kHz (Headphone

Amplifier)

♦ 87% Efficiency (R

SPK

= 8Ω, P

OUT

= 750mW)

♦ High Speaker Amplifier PSRR (72dB at 217Hz) ♦ High Headphone Amplifier PSRR (84dB at 217Hz) ♦ I

C Control

♦ Hardware and Software Shutdown Mode ♦ Click-and-Pop Suppression ♦ Current-Limit and Thermal Protection ♦ Available in a Space-Saving, 2.5mm x 2.0mm WLP

Package

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

________________________________________________________________

Maxim Integrated Products

Simplified Block Diagram

WLP

HPL V

C1N

HPR

C1P

BIAS SDA

N.C.

OUT+

INB1 SCL

PGND

INB2

PVDD

INA1 GND

N.C.

INA2

OUT-

TOP VIEW

(BUMP SIDE DOWN)

Pin Configuration

19-4536; Rev 0; 3/09

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

Ordering Information

PART

PIN - PA C K A G E

MAX9875ERP+TG45

20 WLP (5x4)

Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. G45 indicates protective die coating.

DirectDrive is a registered trademark of Maxim Integrated Products, Inc.

TEMP RANGE

-40°C to +85°C

PREAMPLIFIER

I2C

INTERFACE

SINGLE SUPPLY

2.7V TO 5.25V

VOLUME

CONTROL

MIXER/MUX

VOLUME

CONTROL

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= V

PVDD

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. SDA and

SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

= +25°C.) (Note 3)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Note 1: HPR and HPL should be limited to no more than 9V above VSS, or above PVDD + 0.3V, whichever limits first. Note 2: HPR and HPL should be limited to no more than 9V below PVDD, or below V

- 0.3V, whichever limits first.

, PVDD to PGND .............................................-0.3V to +5.5V

to PVDD .........................................................-0.3V to +0.3V

to PGND .........................................................-5.5V to +0.3V

C1N to PGND..............................................(V

- 0.3V) to +0.3V

C1P to PGND...........................................-0.3V to (PVDD + 0.3V)

HPL, HPR to V

(Note 1)......-0.3V to the lower of (PVDD - (VSS+ 0.3V)) or +9V

HPL, HPR to PVDD

(Note 2) .....+0.3V to the higher of (V

- (PVDD - 0.3V)) or -9V

GND to PGND.....................................................................±0.3V

INA1, INA2, INB1, INB2, BIAS..................................-0.3V to +4V

SDA, SCL...............................................................-0.3V to +5.5V

All Other Pins to GND..............................-0.3V to (PVDD + 0.3V)

Continuous Current In/Out of PVDD, PGND, OUT_........±800mA

Continuous Current In/Out of HPR and HPL .....................140mA

Continuous Input Current V

...........................................100mA

Continuous Input Current (all other pins) .........................±20mA

Duration of OUT_ Short Circuit to GND or PVDD .......Continuous

Duration of Short Circuit Between OUT+ and OUT- ..Continuous

Duration of HP_ Short Circuit to GND or PVDD..........Continuous

Continuous Power Dissipation (T

= +70°C) 20-Bump WLP, 5 x 4, Multilayer Board

(derate 13.0mW/°C above +70°C)..................................1.04W

Junction Temperature......................................................+150°C

Operating Temperature Range ...........................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

Supply Voltage Range VDD, PVDD Guaranteed by PSRR test 2.7 5.25 V

Quiescent Current I

Shutdown Current I

Turn-On Time t

BIAS Release Time t

Input Resistance R

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SHDN

HP mode, OUTMODE = 2

SPK mode, OUTMODE = 7

SPK + HP mode, OUTMODE = 9

= I

SHDN

Time from shutdown to full operation

After forcing BIAS low, time from BIAS released to I

TA = +25°C, preamp gain = 0dB or +9dB 11 21 31

TA = +25°C, preamp gain = +20dB 3 5.5 8

Preamp = 0dB 2.30

Preamp = +9dB 0.820Maximum Input Signal Swing

Preamp = +20dB 0.230

VDD

= logic-high; TA = +25°C

SCL

+ I

C reset

; SHDN = 0; V

PVDD

OSC = 00 5.6 9.0

OSC = 10 5.5

OSC = 00 6.6 11.0

OSC = 10 5.7

OSC = 00 10.4 16.0

OSC = 10 9.3

OSC = 00 10

OSC = 01 10

OSC = 10 17.5

SDA

10 22 µA

25 80 ms

kΩ

P-P

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= V

PVDD

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. SDA and

SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

= +25°C.) (Note 3)

Common-Mode Rejection Ratio CMRR

Input DC Voltage IN__ inputs 1.22 1.3 1.38 V

Bias Voltage V

SPEAKER AMPLIFIER (OUTMODE = 1)

Output Offset Voltage V

Click-and-Pop Level K

Power-Supply Rejection Ratio (Note 4)

Output Power (Note 5) P

Total Harmonic Distortion Plus Noise

Signal-to-Noise Ratio SNR

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

BIAS

PSRR

OUT

THD+N

= 1kHz (differential

input mode)

TA = +25°C (volume at mute) ±0.5 ±4

TA = +25°C (volume at 0dB, OUTMODE = 1, ∆IN_ = 0)

Peak voltage, TA = +25°C, A-weighted, 32 samples per second, volume at mute (Note 4)

= +25°C, PVDD =

THD+N ≤ 1%

f = 1kHz, P Z

= 8Ω + 68µH

SPK

A-weighted, OUTMODE = 1, 3, 4, 6

A-weighted, OUTMODE = 7, 9

= 350mW, TA = +25°C,

OUT

∆IN_ = 0 (single-ended)

∆IN_ = 1 (differential) 94

∆IN_ = 0

(single-ended)

∆IN_ = 1 (differential) 92

Preamp = 0dB 47

Preamp = +9dB 49

Preamp = +20dB 42

Into shutdown -70

Out of shutdown -70

PVDD = VDD =

2.7V to 5.5V

f = 217Hz, 100mV

f = 1kHz, 100mV

f = 20kHz, 100mV

= 8Ω +

SPK

68µH, V

= 8Ω +

SPK

68µH, V

= 8Ω +

SPK

68µH, V

= 4Ω +

SPK

33µH, V

= 4Ω +

SPK

33µH, V

1.13 1.2 1.27 V

±1.5

50 76

P-P

ripple

= 3.7V

= 3.3V

= 3.0V

= 3.7V

= 3.0V

725

560

465

825

770

0.05 %

dBV

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= V

PVDD

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. SDA and

SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

= +25°C.) (Note 3)

Output Frequency

Current Limit 1.5 A

Efficiency η P

Speaker Gain A

Output Noise

HEADPHONE AMPLIFIERS (OUTMODE = 2)

Output Offset Voltage V

Click-and-Pop Level K

Power-Supply Rejection Ratio (Note 4)

Output Power P

Headphone Gain A

Channel-to-Channel Gain Tracking

Total Harmonic Distortion Plus Noise

Signal-to-Noise Ratio SNR

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

PSRR

OUT

THD+N

Spread-spectrum modulation mode, OSC = 00

Fixed-frequency mode, OSC = 01 1100

Fixed-frequency mode, OSC = 10 700

= 600mW, f = 1kHz 87 %

OUT

A-weighted, OUTMODE = 1, ∆IN_ = 0 (Note 4)

TA = +25°C (volume at mute) ±0.15 ±0.6

TA = +25°C (volume at 0dB) ±1.6

Peak voltage, TA = +25°C, A-weighted, 32 samples per second. volume at mute (Note 4)

TA = +25°C, PVDD = V

THD+N ≤ 1%

TA = +25°C, HPL to HPR, volume at 0dB, OUTMODE = 2, 5; ∆IN_ = 0

RHP = 32Ω (P

= 16Ω (P

= +25°C

A-weighted, OUTMODE = 2, 3, 5, 6; R

A-weighted, R 16Ω, OUTMODE = 8, 9

OUT

= 16Ω

Into shutdown -80

Out of shutdown -80

PVDD = VDD = 2.7V to 5.25V

f = 217Hz, V

f = 1kHz, V

f = 20kHz, V

RHP = 16Ω 53

= 10mW, f = 1kHz) 0.016

= 10mW, f = 1kHz),

∆IN_ = 0 (single-ended)

∆IN_ = 1 (differential) 98

∆IN_ = 0

(single-ended)

∆IN_ = 1 (differential) 96

= 100mV

RIPPLE

= 100mV

RIPPLE

= 100mV

RIPPLE

= 32Ω 27

11.5 12.0 12.5 dB

70 85

P-P

-0.4 0 +0.4 dB

1176

±60

63 µV

±0.3 ±2.5 %

0.03

kHz

RMS

dBV

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= V

PVDD

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. SDA and

SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

= +25°C.) (Note 3)

Slew Rate SR 0.35 V/µs

Capacitive Drive C

Crosstalk HPL to HPR, HPR to HPL, f = 20Hz to 20kHz 65 dB

Charge-Pump Frequency

VOLUME CONTROL

Minimum Setting _VOL = 1 -75 dB

Maximum Setting _VOL = 31 0 dB

Mute Attenuation f = 1kHz, _VOL = 0

Zero-Crossing Detection Timeout ZCD = 1 60 ms

DIGITAL INPUTS

Input-Voltage High (SDA, SCL) V

Input-Voltage Low (SDA, SCL) V

Input-Voltage Low (BIAS) V

Input Hysteresis (SDA, SCL) V

SDA, SCL Input Capacitance C

Input Leakage Current I

BIAS Pullup Current I

DIGITAL OUTPUTS (SDA Open Drain)

Output Low Voltage SDA V

Output Fall Time SDA t

2-WIRE INTERFACE TIMING

External Pullup Voltage Range: SDA and SCL

Serial Clock Frequency f

Bus Free Time Between STOP and START Conditions

START Condition Hold t

START Condition Setup Time t

Clock Low Period t

Clock High Period t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

HYS

BIAS

SCL

BUF

HD:STA

SU:STA

LOW

HIGH

Spread-spectrum modulation mode, OSC = 00

Fixed-frequency mode, OSC = 01 430 550 670

Fixed-frequency mode, OSC = 10 220 350 500

SDA, SCL; TA = +25°C ±1.0 µA

= 3mA 0.4 V

SINK

to V

H(MIN)

to 400pF, I

bus capacitance = 10pF

L(MAX)

= 3mA

SINK

PGAIN_ = 00 0

PGAIN_ = 01 9Preamp Gain Input A or B

PGAIN_ = 10 20

Speaker 100

Headphone 110

100 pF

588

±30

1.4 V

80 mV

4pF

94 µA

1.7 3.6 V

DC 400 kHz

1.3 µs

0.6 µs

1.3 µs

0.6 µs

0.4 V

0.15 V

250 ns

kHz

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

6 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= V

PVDD

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. SDA and

SCL pullup voltage = 3.3V. Z

SPK

= ∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

= +25°C.) (Note 3)

Note 3: All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design. Note 4: Amplifier inputs are AC-coupled to GND. Note 5: Output levels higher than 825mW are not recommended for extended durations. Production tested with Z

SPK

= 8Ω + 68µH only.

Data Setup Time t

Data Hold Time t

Maximum Receive SCL/SDA Rise Time

Maximum Receive SCL/SDA Fall Time

Setup Time for STOP Condition t

Capacitive Load for Each Bus Line

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SU:DAT

HD:DAT

SU:STO

100 ns

0 900 ns

0.6 µs

300 ns

400 pF

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 7

Typical Operating Characteristics

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

GENERAL

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

HEADPHONE ONLY INPUTS AC-COUPLED TO GND OUTMODE = 8

= V

SUPPLY CURRENT (mA)

2.5 5.5

= 3.3V

SDA

SCL

= 1176kHz SREAD-SPECTRUM MODE

OSC

= 700kHz

OSC

SUPPLY VOLTAGE (V)

SHUTDOWN CURRENT

INPUTS AC-COUPLED TO GND

= V

SDA

SCL

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

SPEAKER ONLY INPUTS AC-COUPLED TO GND

OUTMODE = 7

= V

= 3.3V

SDA

SUPPLY CURRENT (mA)

MAX9875 toc04

SCL

OSC

SPREAD-SPECTRUM MODE

OSC

2.5 5.5 SUPPLY VOLTAGE (V)

= 1100kHz

OSC

5.04.54.03.53.0

vs. SUPPLY VOLTAGE

= 3.3V

MAX9875 toc01

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

HEADPHONE AND SPEAKER INPUTS AC-COUPLED TO GND OUTMODE = 9

= V

SDA

SCL

OSC

= 3.3V

OSC

SPREAD-SPECTRUM MODE

= 1100kHz

SUPPLY VOLTAGE (V)

= 1176kHz

= 1100kHz

OSC

= 700kHz

5.04.54.03.53.0

MAX9875 toc02

-20

SUPPLY CURRENT (mA)

2.5 5.5

VOLUME ATTENUATION

vs. _VOL CONTROL CODE

OSC

= 1176kHz

= 700kHz

5.04.54.03.53.0

MAX9875 toc05

MAX9875 toc03

SHUTDOWN CURRENT (µA)

2.5 5.5 SUPPLY VOLTAGE (V)

-40

-60

-80

VOLUME ATTENUATION (dB)

fIN = 1kHz

-100

MEASURED AT HPL AND HPR

-120

5.04.54.03.53.0

35 0

_VOL CONTROL CODE

10202530

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

8 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

SPEAKER AMPLIFIER

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc06

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.01 10 100k

VDD = V

PVDD

= 3.7V

SPK

= 8Ω + 68µH

OUT

= 200mW

OUT

= 675mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc07

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.01 10 100k

VDD = V

PVDD

= 3.7V

SPK

= 4Ω + 33µH DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

OUT

= 1100mW

OUT

= 650mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc08

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.01 10 100k

OUT

= 425mW

OUT

= 200mW

VDD = V

PVDD

= 3V

SPK

= 8Ω + 68µH

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc09

FREQUENCY (Hz)

THD+N (%)

10k1k100

0.1

0.01 10 100k

OUT

= 700mW

OUT

= 250mW

VDD = V

PVDD

= 3V

SPK

= 4Ω + 33µH

THD+N (%)

0.01

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

VDD = V Z DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

fIN = 20Hz

0.1

02.51.0 3.00.5 2.0

PVDD

= 4Ω + 33µH

SPK

= 5V

fIN = 6kHz

fIN = 1kHz

1.5

OUTPUT POWER (W)

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

VDD = V P Z

0.1

THD+N (%)

0.01 10 100k

MAX9875 toc12

PVDD

= 200mW

OUT

= 8Ω + 68µH

SPK

= 1176kHz

OSC

= 3.7V

= 700kHz

OSC

= 1100kHz

OSC

FREQUENCY (Hz)

10k1k100

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

VDD = V

= 8Ω + 68µH

MAX9875 toc10

SPK

fIN = 20Hz

THD+N (%)

0.1

0.01

02.0

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

THD+N (%)

0.1

0.01 0 1000600400 800200

VDD = V Z

PVDD

= 8Ω + 68µH

SPK

= 3.7V

fIN = 20Hz

fIN = 1kHz

OUTPUT POWER (mW)

= 5V

PVDD

fIN = 1kHz

OUTPUT POWER (W)

MAX9875 toc11

fIN = 6kHz

1.51.00.5

MAX9875 toc13

fIN = 6kHz

MAX9875

EFFICIENCY

vs. OUTPUT POWER

MAX9875 toc19

OUTPUT POWER (W)

EFFICIENCY (%)

1.5

100

03.00.5 2.01.0 2.5

VDD = V

PVDD

= 5V

= 1kHz DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

SPK

= 8Ω + 68µH

SPK

= 4Ω + 33µH

EFFICIENCY

vs. OUTPUT POWER

MAX9875 toc20

OUTPUT POWER (W)

EFFICIENCY (%)

100

02.01.51.00.5

VDD = V

PVDD

= 3.7V

= 1kHz DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

SPK

= 8Ω + 68µH

SPK

= 4Ω + 33µH

EFFICIENCY

vs. OUTPUT POWER

MAX9875 toc21

OUTPUT POWER (mW)

EFFICIENCY (%)

100

0 1000600200 800400

VDD = V

PVDD

= 3.7V

= 1kHz

SPK

= 8Ω + 68µH

OSC

= 700kHz

OSC

= 1176kHz AND 1100kHz

Typical Operating Characteristics (continued)

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, R

= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

_______________________________________________________________________________________ 9

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

VDD = V

PVDD

= 4Ω + 33µH

SPK

DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

fIN = 20Hz

THD+N (%)

0.1

0.01 0 1.51.00.5

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

VDD = V

PVDD

= 1kHz

= 8Ω + 68µH

SPK

= 3.7V

fIN = 6kHz

fIN = 1kHz

OUTPUT POWER (W)

= 3.7V

MAX9875 toc14

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

THD+N (%)

0.1

0.01

VDD = V Z

0600400200

PVDD

= 8Ω + 68µH

SPK

= 3V

fIN = 20Hz

fIN = 1kHz

OUTPUT POWER (mW)

MAX9875 toc15

fIN = 6kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

VDD = V Z DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

THD+N (%)

0.1

0.01 0 1.20.80.4 1.00.60.2

PVDD

= 4Ω + 33µH

SPK

fIN = 20Hz

= 3V

fIN = 1kHz

OUTPUT POWER (W)

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

= 1100kHz

MAX9875 toc17

OSC

MAX9875 toc18

= 700kHz

fIN = 6kHz

MAX9875 toc16

0.1

THD+N (%)

0.01 0800

= 1176kHz SSM

OSC

= 1100kHz

OSC

OUTPUT POWER (mW)

= 700kHz

OSC

600400200

0.1

THD+N (%)

0.01

= 1176kHz SSM

OSC

VDD = V f

0800

OUTPUT POWER (mW)

= 6kHz

= 8Ω + 68µH

SPK

PVDD

600400200

= 3.7V

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

10 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

IN-BAND OUTPUT SPECTRUM

MAX9875 toc28

FREQUENCY (kHz)

AMPLITUDE (dBV)

15105

-140

-80

-40

-120

-20

-60

-100

020

OSC

= 1100kHz

= 1kHz

IN-BAND OUTPUT SPECTRUM

MAX9875 toc29

FREQUENCY (kHz)

AMPLITUDE (dBV)

15105

-140

-80

-40

-120

-20

-60

-100

020

OSC

= 700kHz

= 1kHz

EFFICIENCY

vs. OUTPUT POWER

MAX9875 toc22

OUTPUT POWER (mW)

EFFICIENCY (%)

100

01000600400 800200

VDD = V

PVDD

= 3V

= 1kHz DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

SPK

= 8Ω + 68µH

SPK

= 4Ω + 33µH

OUTPUT POWER

vs. SUPPLY VOLTAGE

MAX9875 toc23

SUPPLY VOLTAGE (V)

OUTPUT POWER (W)

5.04.54.03.53.0

2.0

2.5

0.5

1.0

1.5

3.0

3.5

2.5 5.5

10% THD+N

1% THD+N

VDD = V

PVDD

SPK

= 4Ω + 33µH DASHED LINES ARE LIMITED BY THE ABS. MAX RATINGS

OUTPUT POWER

vs. SUPPLY VOLTAGE

MAX9875 toc24

SUPPLY VOLTAGE (V)

OUTPUT POWER (W)

5.04.54.03.53.0

2.0

0.2

0.8

0.6

1.2

1.0

1.6

0.4

1.8

1.4

2.5 5.5

VDD = V

PVDD

SPK

= 8Ω + 68µH

10% THD+N

1% THD+N

OUTPUT POWER

vs. LOAD RESISTANCE

MAX9875 toc25

LOAD RESISTANCE (Ω)

OUTPUT POWER (W)

1.8

0.2

0.8

0.6

1.2

1.0

1.6

0.4

1.4

0100704010 805020 906030

VDD = V

PVDD

= 3.7V

= 1kHz

SPK

= LOAD + 68µH

10% THD+N

1% THD+N

OUTPUT POWER

vs. LOAD RESISTANCE

MAX9875 toc26

LOAD RESISTANCE (Ω)

OUTPUT POWER (W)

1.2

0.2

0.8

0.6

1.0

0.4

0100704010 805020 906030

VDD = V

PVDD

= 3V

= 1kHz

SPK

= LOAD + 68µH

10% THD+N

1% THD+N

POWER-SUPPLY REJECTION RATIO

vs. FREQUENCY

MAX9875 toc27

FREQUENCY (Hz)

PSRR (dB)

10k1k100

-90

-70

-60

-40

-30

-10

-80

-50

-20

-100 10 100k

VDD = V

PVDD

= 3.7V

RIPPLE

= 100mV

P-P

INPUTS AC-COUPLED TO GND

MAX9875

Typical Operating Characteristics (continued)

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 11

OSC

= 1kHz

-20

-40

-60

-80

AMPLITUDE (dBV)

-100

-120

-140 020

WIDEBAND OUTPUT SPECTRUM

OSC

-10

INPUTS AC-COUPLED TO GND

-20

-30

-40

-50

-60

AMPLITUDE (dBV)

-70

-80

-90

-100

0.1 10 1001

IN-BAND OUTPUT SPECTRUM

= 1176kHz

FREQUENCY (kHz)

= 700kHz

FREQUENCY (MHz)

MAX9875 toc30

15105

MAX9875 toc32

WIDEBAND OUTPUT SPECTRUM

= 1100kHz

OSC

-10

INPUTS AC-COUPLED TO GND

-20

-30

-40

-50

-60

AMPLITUDE (dBV)

-70

-80

-90

-100

0.1 10 1001

WIDEBAND OUTPUT SPECTRUM

= 1176kHz

OSC

-10

INPUTS AC-COUPLED TO GND

-20

-30

-40

-50

-60

AMPLITUDE (dBV)

-70

-80

-90

-100

0.1 10 1001

FREQUENCY (MHz)

MAX9875 toc31

MAX9875 toc33

BIAS

500mV/div

OUT+ - OUT-

1V/div

HARDWARE SHUTDOWN RESPONSE

20ms/div

MAX9875 toc34

SDA

2V/div

OUT+ - OUT-

1V/div

ON- AND OFF-RESPONSE

MAX9875 toc35

20ms/div

SOFTWARE SHUTDOWN

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

12 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

HEADPHONE AMPLIFIER

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc36

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = V

PVDD

= 3.7V

= 32

Ω

OUT

= 10mW

OUT

= 20mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc37

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = V

PVDD

= 3.7V

= 16

Ω

OUT

= 20mW

OUT

= 40mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc38

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = V

PVDD

= 3V

= 32

Ω

OUT

= 10mW

OUT

= 20mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. FREQUENCY

MAX9875 toc39

FREQUENCY (Hz)

THD+N (%)

0.001

0.01

0.1

10 100 1k 10k 100k

VDD = V

PVDD

= 3V

= 16

Ω

OUT

= 15mW

OUT

= 30mW

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9875 toc40

OUTPUT POWER (mW)

THD+N (%)

302010

0.01

0.1

0.001 040

VDD = V

PVDD

= 3.7V

= 32

Ω

fIN = 20Hz

fIN = 1kHz

fIN = 6kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9875 toc41

OUTPUT POWER (mW)

THD+N (%)

0.01

0.1

0.001 0 20406010 30 50 70

VDD = V

PVDD

= 3.7V

= 16

Ω

fIN = 20Hz AND 1kHz

fIN = 6kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9875 toc42

OUTPUT POWER (mW)

THD+N (%)

302010

0.01

0.1

0.001 040

VDD = V

PVDD

= 3V

= 32

Ω

fIN = 20Hz

fIN = 1kHz

fIN = 6kHz

TOTAL HARMONIC DISTORTION PLUS

NOISE vs. OUTPUT POWER

MAX9875 toc43

OUTPUT POWER (mW)

THD+N (%)

0.01

0.1

0.001 0204010 30 50 60

VDD = V

PVDD

= 3V

= 16

Ω

fIN = 20Hz AND 1kHz

fIN = 6kHz

MAX9875

Typical Operating Characteristics (continued)

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 13

350

300

250

200

150

100

POWER DISSIPATION (mW)

100

OUTPUT POWER (mW)

POWER DISSIPATION

vs. OUTPUT POWER

Ω

RHP = 16

RHP = 32

015010050

OUTPUT POWER (mW)

VDD = V

Ω

f P

= 1kHz

OUT

= P

PVDD

HPL

= 3.7V

+ P

HPR

OUTPUT POWER

vs. SUPPLY VOLTAGE

fIN = 1kHz

Ω

= 16

10% THD+N

1% THD+N

2.5 5.5 SUPPLY VOLTAGE (V)

5.04.54.03.53.0

250

MAX9875 toc44

200

150

100

POWER DISSIPATION (mW)

0 15010050

100

MAX9875 toc47

OUTPUT POWER (mW)

10 40 70 10020 50 8030 60 90

POWER DISSIPATION

vs. OUTPUT POWER

Ω

RHP = 32

OUTPUT POWER (mW)

OUTPUT POWER

vs. LOAD RESISTANCE

10% THD+N

1% THD+N

LOAD RESISTANCE (Ω)

RHP = 16

VDD = V

= 1kHz

OUT

VDD = V

= 1kHz

= P

PVDD

HPL

PVDD

Ω

= 3V

+ P

= 3.7V

HPR

MAX9875 toc45

OUTPUT POWER (mW)

100

MAX9875 toc48

OUTPUT POWER (mW)

OUTPUT POWER

vs. SUPPLY VOLTAGE

2.5 5.5

10% THD+N

1% THD+N

SUPPLY VOLTAGE (V)

fIN = 1kHz

= 32

5.04.54.03.53.0

OUTPUT POWER

vs. LOAD RESISTANCE

VDD = V

10% THD+N

1% THD+N

10 40 70 10020 50 8030 60 90

LOAD RESISTANCE (Ω)

= 1kHz

PVDD

Ω

= 3V

MAX9875 toc46

MAX9875 toc49

OUTPUT POWER

vs. LOAD RESISTANCE

100

C1 = C2 = 2.2µF

OUTPUT POWER (mW)

C1 = C2 = 0.47µF

10 40 70 10020 50 8030 60 90

LOAD RESISTANCE (Ω)

VDD = V

PVDD

OSC = 10

= 1kHz

1% THD+N

= 3V

MAX9875 toc50

POWER-SUPPLY REJECTION RATIO

vs. FREQUENCY

-10

-20

-30

-40

-50

-60

PSRR (dB)

-70

-80

-90

-100

-110

-120 10 100 1k 10k 100k

VDD = V V

RIPPLE

RHP = 32 INPUTS AC-COUPLED TO GND

HPR

HPL

FREQUENCY (Hz)

= 3.7V

PVDD

= 100mV

Ω

P-P

MAX9875 toc51

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

14 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VDD= V

= 3.7V, V

GND

= V

PGND

= 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (Z

SPK

) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. Z

SPK

∞, RHP= ∞. C1 = C2 = C

BIAS

= 1µF. TA= +25°C, unless otherwise noted.)

COMMON-MODE REJECTION RATIO

vs. FREQUENCY

MAX9875 toc55

FREQUENCY (Hz)

CMRR (dB)

10 100k10k1k100

VDD = V

PVDD

= 3.7V

CMRR = 20log(A

DM/ACM

)

+9dB

+20dB

0dB

OUTPUT SPECTRUM

MAX9875 toc52

FREQUENCY (kHz)

AMPLITUDE (dBV)

-140

-100

-60

-20

-120

-80

-40

02015105

VDD = V

PVDD

= 3.7V

= 1kHz

= 32

Ω

OUTPUT SPECTRUM

MAX9875 toc53

FREQUENCY (kHz)

AMPLITUDE (dBV)

-140

-100

-60

-20

-120

-80

-40

02015105

VDD = V

PVDD

= 3.7V

= 1kHz

= 16

Ω

CROSSTALK vs. FREQUENCY

MAX9875 toc54

FREQUENCY (Hz)

CROSSTALK (dB)

-120

-30

-10

-50

-90

-60

-100

-110

-70

-20

-40

-80

10 100k10k1k100

VDD = V

PVDD

= 3.7V

INA_

= 1V

P-P

= 16

Ω

HPR TO HPL

HPL TO HPR

HARDWARE SHUTDOWN RESPONSE

BIAS

500mV/div

HPL

500mV/div

HPR

20ms/div

MAX9875 toc56

BIAS

500mV/div

HPL

500mV/div

HPR

500mV/div

ON- AND OFF-REPSONSE

20ms/div

SOFTWARE SHUTDOWN

MAX9875 toc57

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 15

Pin Description

Detailed Description

Signal Path

The MAX9875 signal path consists of flexible inputs, signal mixing, volume control, and output amplifiers (Figure 1).

The inputs can be configured for single-ended or differential signals (Figure 2). The internal preamplifiers feature three programmable gain settings of 0dB, +9dB, and +20dB. Following preamplification, the input signals are mixed, volume adjusted, and routed to the headphone and speaker amplifiers based on the output mode configuration (see Table 7). The volume control stages provide up to 75dB attenuation. The headphone amplifier is configured as a unity-gain

buffer while the speaker amplifier provides +12dB of additional gain.

When an input is configured as mono differential it can be routed to the speaker or to both headphones. When an input is stereo, it is mixed to mono without attenuation for the speaker and kept stereo for the headphones.

When the application does not require the use of both INA_ and INB_, the SNR of the MAX9875 is improved by deselecting the unused input through the I2C output mode register and AC-coupling the unused inputs to ground with a 330pF capacitor. The 330pF capacitor and the input resistance to the MAX9875 form a highpass filter preventing audible noise from coupling into the outputs.

PIN NAME FUNCTION

A1 HPR Right Headphone Output

A2 HPL Left Headphone Output

A3 V

A4 C1N Charge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P and C1N.

A5 C1P Charge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P and C1N.

B1 V

B2 BIAS

B3 SDA Serial-Data Input. Connect a pullup resistor from SDA to a 1.7V to 3.6V supply.

B4 N.C. No Connection

B5 OUT+ Positive Speaker Output

C1 INB2 Input B2. Right input or positive input (see the Differential Input Configuration (∆IN_) section).

C2 INB1 Input B1. Left input or negative input (see the Differential Input Configuration (∆IN_) section).

C3 SCL Serial-Clock Input. Connect a pullup resistor from SCL to a 1.7V to 3.6V supply.

C4 PGND Power Ground

C5 PVDD Class D and Charge-Pump Power Supply. Bypass with a 1µF capacitor to PGND.

D1 INA2 Input A2. Right input or positive input (see the Differential Input Configuration (∆IN_) section).

D2 INA1 Input A1. Left input or negative input (see the Differential Input Configuration (∆IN_) section).

D3 GND Analog Ground

D4 N.C. No Connection

D5 OUT- Negative Speaker Output

Headphone Amplifier Negative Power Supply. Bypass with a 1µF capacitor to PGND.

Analog Supply. Connect to PVDD. Bypass with a 1µF capacitor to GND.

Common-Mode Bias. Bypass to GND with a 1µF capacitor. Pulse low to reset the part and place in shutdown (see the Typical Application Circuit).

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

16 ______________________________________________________________________________________

Figure 1. Signal Path

IN_2 (R)

IN_1 (L)

STEREO SINGLE-ENDED

TO MIXER

IN_2 (+)

IN_1 (-)

DIFFERENTIAL

TO MIXER

Figure 2. Differential and Stereo Single-Ended Input Configurations

0dB HPR

INA2

INA1

INB2

INB1

INPUT A

0dB/+9dB/+20dB

INPUT B

0dB/+9dB/+20dB

MIXER

AND MUX

-75dB TO 0dB

0dB HPL

OUT+

+12dB

OUT-

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 17

Volume Control and Mute

The MAX9875 features three volume control registers (see Table 4) allowing independent volume control of mono speaker and stereo headphone amplifier outputs. Each volume control register has 31 steps providing 0 to 75dB (typ) of attenuation and a mute function.

Class D Speaker Amplifier

The MAX9875 integrates a filterless Class D amplifier that offers much higher efficiency than Class AB without the typical disadvantages.

The high efficiency of a Class D amplifier is due to the switching operation of the output stage transistors. In a Class D amplifier, the output transistors act as currentsteering switches and consume negligible additional power. Any power loss associated with the Class D output stage is mostly due to the I2R loss of the MOSFET on-resistance, and quiescent current overhead.

The theoretical best efficiency of a linear amplifier is 78%, however, that efficiency is only exhibited at peak output power. Under normal operating levels (typical music reproduction levels), efficiency falls below 30%, whereas the MAX9875 still exhibits 70% efficiency under the same conditions (Figure 3).

Ultra-Low EMI Filterless Output Stage

In traditional Class D amplifiers, the high dV/dt of the rising and falling edge transitions results in increased EMI emissions, which requires the use of external LC filters or shielding to meet EN55022 electromagneticinterference (EMI) regulation standards. Limiting the

dV/dt normally results in decreased efficiency. Maxim’s active emissions limiting circuitry actively limits the dV/dt of the rising and falling edge transitions, providing reduced EMI emissions, while maintaining up to 87% efficiency.

In addition to active emission limiting, the MAX9875 features a spread-spectrum modulation mode that flattens the wideband spectral components. Proprietary techniques ensure that the cycle-to-cycle variation of the switching period does not degrade audio reproduction or efficiency (see the

Typical Operating

Characteristics

). Select spread-spectrum modulation

mode through the I

C interface (Table 6). In spreadspectrum modulation mode, the switching frequency varies randomly by ±60kHz around the center frequency (1.176MHz). The effect is to reduce the peak energy at harmonics of the switching frequency. Above 10MHz, the wideband spectrum looks like white noise for EMI purposes (see Figure 4).

Speaker Current Limit

Most applications will not enter current limit unless the output is short circuited or connected incorrectly.

When the output current of the speaker amplifier exceeds the current limit (1.5A, typ) the MAX9875 disables the outputs for approximately 250µs. At the end of 250µs, the outputs are re-enabled, if the fault condition still exists, the MAX9875 will continue to disable and reenable the outputs until the fault condition is removed.

MAX9875 EFFICIENCY

vs. IDEAL CLASS EFFICIENCY

MAX9875 fig03

OUTPUT POWER (W)

EFFICIENCY (%)

0.750.500.25

100

0 1.00

MAX9875

IDEAL CLASS AB

VDD = V

PVDD

= 3.7V (MAX9875)

SUPPLY

= 3.7V (IDEAL CLASS AB)

Figure 3. MAX9875 Efficiency vs. Class AB Efficiency

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

18 ______________________________________________________________________________________

DirectDrive Headphone Amplifier

Traditional single-supply headphone amplifiers have outputs biased at a nominal DC voltage (typically half the supply). Large coupling capacitors are needed to block this DC bias from the headphone. Without these capacitors, a significant amount of DC current flows to the headphone, resulting in unnecessary power dissipation and possible damage to both the headphone and headphone amplifier.

Maxim’s DirectDrive architecture uses a charge pump to create an internal negative supply voltage. This allows the headphone outputs of the MAX9875 to be biased at GND while operating from a single supply (Figure 5). Without a DC component, there is no need for the large DC-blocking capacitors. Instead of two large (220µF, typ) capacitors, the MAX9875 charge pump requires two small ceramic capacitors, conserving board space,

reducing cost, and improving the frequency response of the headphone amplifier. See the Output Power vs. Load Resistance graph in the

Typical Operating

Characteristics

for details of the possible capacitor sizes. There is a low DC voltage on the amplifier outputs due to amplifier offset. However, the offset of the MAX9875 is typically ±0.15mV, which, when combined with a 32Ω load, results in less than 10µA of DC current flow to the headphones.

In addition to the cost and size disadvantages of the DC-blocking capacitors required by conventional headphone amplifiers, these capacitors limit the amplifier’s low-frequency response and can distort the audio signal. Previous attempts at eliminating the output-coupling capacitors involved biasing the headphone return (sleeve) to the DC bias voltage of the headphone amplifiers. This method raises some issues:

FREQUENCY (MHz)

AMPLITUDE (dB∝V/m)

1601401201008060

TEST LIMIT

MAX9875 OUTPUT

TEST LIMIT

180 200 240 260 280 300220

FREQUENCY (MHz)

AMPLITUDE (dB∝V/m)

600

550

500

450

400350

300

650

700 800

850 900

1000950

750

Figure 4. EMI with 152mm of Speaker Cable

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 19

1) The sleeve is typically grounded to the chassis. Using the midrail biasing approach, the sleeve must be isolated from system ground, complicating product design.

2) During an ESD strike, the amplifier’s ESD structures are the only path to system ground. Thus, the amplifier must be able to withstand the full energy from an ESD strike.

3) When using the headphone jack as a line out to other equipment, the bias voltage on the sleeve may conflict with the ground potential from other equipment, resulting in possible damage to the amplifiers.

The MAX9875 features a low-noise charge pump. The switching frequency of the charge pump is 1/2of the Class D switching frequency, regardless of the operating mode. When the Class D amplifiers are operated in spread-spectrum mode, the charge pump also switches with a spread-spectrum pattern. The nominal switching frequency is well beyond the audio range, and thus does not interfere with audio signals. The switch drivers feature a controlled switching speed that minimizes noise generated by turn-on and turn-off transients. By limiting the switching speed of the charge pump, the di/dt noise caused by the parasitic trace inductance is minimized.

Although not typically required, additional high-frequency noise attenuation can be achieved by increasing the size of C2 (see the

Typical Application Circuit

). The

charge pump is active only in headphone modes.

Headphone Current Limit

The headphone amplifier current is limited to 140mA (typ). The current limit clamps the output current, which appears as clipping when the maximum current is exceeded.

Shutdown Mode

The MAX9875 features two ways of entering low-power shutdown. The hardware shutdown function is controlled by pulsing BIAS low for 1ms. While BIAS is low the amplifiers are shut down. Following an 80ms reset period, the MAX9875 reverts to its power-on-reset condition. Pull BIAS low using an open-drain output that is not pulled up with a resistor (see the

Typical Application Circuit).

The open-drain output leakage must not exceed 100nA and must be able to sink at least 1mA.

The device can also be placed in shutdown mode by writing to the SHDN bit in the Output Mode Control Register.

Click-and-Pop Suppression

The MAX9875 features click-and-pop suppression that eliminates audible transients from occurring at startup and shutdown.

Use the following procedure to start up the MAX9875:

1) Configure the desired output mode and preamplifier gain.

2) Set the SHDN bit to 1 to start up the amplifier.

3) Wait 10ms for the startup time to pass.

4) Increase the output volume to the desired level. To disable the device simply set SHDN to 0.

During the startup period, the MAX9875 precharges the input capacitors to prevent clicks and pops. If the output amplifiers have been programmed to be active they are held in shutdown until the precharge period is complete.

When power is initially applied to the MAX9875, the power-on-reset state of all three volume control registers is mute. For most applications, the volume can be set to the desired level once the device is active. If the clickand-pop is too high, step through intermediate volume settings with zero-crossing detection disabled. Stepping through higher volume settings has a greater impact on click-and-pop than lower volume settings.

For the lowest possible click-and-pop, start up the device at minimum volume and then step through each volume setting until the desired setting is reached. Disable zerocrossing detection if no input signal is expected.

VDD/2

GND

CONVENTIONAL AMPLIFIER BIASING SCHEME

DirectDrive AMPLIFIER BIASING SCHEME

GND

-V

(VSS)

Figure 5. Traditional Amplifier Output vs. MAX9875 DirectDrive Output

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

20 ______________________________________________________________________________________

I2C Register Description

Zero-Crossing Detection (ZCD)

Zero-crossing detection limits distortion in the output signal during volume transitions by delaying the transition until the mixer output crosses the internal bias voltage. A timeout period (typically 60ms) forces the volume transition if the mixer output signal does not cross the bias voltage.

1 = Zero-crossing detection is enabled.

0 = Zero-crossing detection is disabled.

Differential Input Configuration (∆IN_)

The inputs INA_ and INB_ can be configured for mono differential or stereo single-ended operation.

1 = IN__ is configured as a mono differential input with IN_2 as the positive and IN_1 as the negative input.

0 = IN__ is configured as a stereo single-ended input with IN_2 as the right and IN_1 as the left input.

Preamplifier Gain (PGAIN_)

The preamplifier gain of INA_ and INB_ can be programmed by writing to PGAIN_.

00 = 0dB

01 = +9dB

10 = +20dB

11 = Reserved

The MAX9875 is controlled through five I

C programmable registers. Table 1 shows the MAX9875’s complete register map. Tables 2, 3, and 5 show the individual registers.

I2C Address

The slave address of the MAX9875 is 1001101R/(W).

Table 1. Register Map

Table 2. Input Mode Control

I2C Interface

Input Mode Control

Speaker Volume Control

Left Headphone Volume Control

Right Headphone Volume Control

Output Mode Control

ADDRESS

0x00 0x40 0 ZCD ∆INA ∆INB PGAINA PGAINB

0x01 0x00 0 0 0 SVOL (Table 4)

0x02 0x00 0 0 0 HPLVOL (Table 4)

0x03 0x00 0 0 0 HPRVOL (Table 4)

0x04 0x49 SHDN 0 OSC (Table 6) OUTMODE (Table 7)

POR STATE B7 B6 B5 B4 B3 B2 B1 B0

0x00 0 ZCD ∆INA ∆INB PGAINA PGAINB

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 21

Shutdown (

SSHHDDNN

)

1 = MAX9875 operational.

0 = MAX9875 in low-power shutdown mode.

SHDN is an active-low shutdown bit that overrides all settings and places the entire device in low-power shutdown mode. The I

C interface is fully active in this shutdown mode. All register settings are preserved while in shutdown.

Volume Control

The device has a separate volume control for left headphone, right headphone, and speaker amplifiers. The

total system gain is a combination of the input gain, the volume control, and the output amplifier gain. Table 4 shows the volume settings for each volume control.

Table 4. Volume Control Settings

Table 5. Output Mode Control

Table 3. Speaker/Left Headphone/Right Headphone Volume Control

0x01 0 0 0 SVOL (Table 4)

0x02 0 0 0 HPLVOL (Table 4)

0x03 0 0 0 HPRVOL (Table 4)

CODE

0 0 0 0 0 0 MUTE

1 0 0 0 0 1 -75

2 0 0 0 1 0 -71

3 0 0 0 1 1 -67

4 0 0 1 0 0 -63

5 0 0 1 0 1 -59

6 0 0 1 1 0 -55

7 0 0 1 1 1 -51

8 0 1 0 0 0 -47

9 0 1 0 0 1 -44

10 0 1 0 1 0 -41

11 0 1 0 1 1 -38

12 0 1 1 0 0 -35

13 0 1 1 0 1 -32

14 0 1 1 1 0 -29

15 0 1 1 1 1 -26

B4 B3 B2 B1 B0

_VOL

GAIN (dB)

CODE

16 1 0 0 0 0 -23

17 1 0 0 0 1 -21

18 1 0 0 1 0 -19

19 1 0 0 1 1 -17

20 1 0 1 0 0 -15

21 1 0 1 0 1 -13

22 1 0 1 1 0 -11

23 1 0 1 1 1 -9

24 1 1 0 0 0 -7

25 1 1 0 0 1 -6

26 1 1 0 1 0 -5

27 1 1 0 1 1 -4

28 1 1 1 0 0 -3

29 1 1 1 0 1 -2

30 1 1 1 1 0 -1

31 1 1 1 1 1 0

B4 B3 B2 B1 B0

_VOL

GAIN (dB)

0x04 SHDN 0 OSC (Table 6 ) OUTMODE (Table 7)

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

22 ______________________________________________________________________________________

Table 6. Oscillator Modes

Table 7. Output Modes

— = Amplifier Off

Output Configuration (OUTMODE)

The MAX9875 has a stereo DirectDrive headphone amplifier and a mono Class D amplifier. Table 7 shows how

each of the output amplifiers can be configured and connected to the input signals. For simplicity, not all possible combinations of ∆INA and ∆INB are shown.

OSC

B5 B4

0 0 1176, spread spectrum 588, spread spectrum

0 1 1100, fixed frequency 550, fixed frequency

1 0 700, fixed frequency 350, fixed frequency

1 1 Reserved

CLASS D OSCILLATOR MODE (kHz) CHARGE-PUMP OSCILLATOR MODE (kHz)

∆IN_ = 0

MODE

B3 B2 B1 B0 SPK LEFT HP RIGHT HP SPK LEFT HP RIGHT HP

0 0000 Reserved Reserved

1 0001INA1+INA2 — — INA∆ ——

2 0010 — INA1 INA2 — INA∆ INA∆

3 0011INA1+INA2 INA1 INA2 INA∆ INA∆ INA∆

4 0100INB1+INB2 — — INB∆ ——

5 0101 — INB1 INB2 — INB∆ INB∆

6 0110INB1+INB2 INB1 INB2 INB∆ INB∆ INB∆

7 0111

8 1000 — INA1+INB1 INA2+INB2 —

9 1001

10–15 Reserved Reserved

OUTMODE

(THE SINGLE-ENDED INPUT SIGNALS

ARE DEFINED AS IN_1 = LEFT AND

IN_2 = RIGHT)

INA1+INA2

+INB1+INB2

INA1+INA2

+INB1+INB2

— — INA∆+INB∆ ——

INA1+INB1 INA2+INB2 INA∆+INB∆

(THE DIFFERENTIAL INPUT SIGNAL IS

DEFINED AS IN_∆ = IN_2 - IN_1)

∆IN_ = 1

INA∆

+INB∆

INA∆

+INB∆

INA∆ +INB∆

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 23

Figure 6. 2-Wire Interface Timing Diagram

SCL

SDA

SSrP

Figure 7. START, STOP, and REPEATED START Conditions

SMBus is a trademark of Intel Corp.

I2C Interface Specification

The MAX9875 features an I2C/SMBus™-compatible, 2wire serial interface consisting of a serial-data line (SDA) and a serial-clock line (SCL). SDA and SCL facilitate communication between the MAX9875 and the master at clock rates up to 400kHz. Figure 6 shows the 2-wire interface timing diagram. The master generates SCL and initiates data transfer on the bus. The master device writes data to the MAX9875 by transmitting the proper slave address followed by the register address and then the data word. Each transmit sequence is framed by a START (S) or REPEATED START (Sr) condition and a STOP (P) condition. Each word transmitted to the MAX9875 is 8 bits long and is followed by an acknowledge clock pulse. A master reading data from the MAX9875 transmits the proper slave address followed by a series of nine SCL pulses. The MAX9875 transmits data on SDA in sync with the master-generated SCL pulses. The master acknowledges receipt of each byte of data. Each read sequence is framed by a START or REPEATED START condition, a not acknowledge, and a STOP condition. SDA operates as both an input and an open-drain output. A pullup resistor, typically greater than 500Ω, is required on SDA. SCL operates only as an input. A pullup resistor, typically greater

than 500Ω, is required on SCL if there are multiple masters on the bus, or if the single master has an opendrain SCL output. Series resistors in line with SDA and SCL are optional. Series resistors protect the digital inputs of the MAX9875 from high voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals.

Bit Transfer

One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the SCL pulse. Changes in SDA while SCL is high are control signals (see the

START and STOP

Conditions

section).

START and STOP Conditions

SDA and SCL idle high when the bus is not in use. A master initiates communication by issuing a START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (Figure 7). A START condition from the master signals the beginning of a transmission to the MAX9875. The master terminates transmission, and frees the bus, by issuing a STOP condition. The bus remains active if a REPEATED START condition is generated instead of a STOP condition.

SDA

LOW

SCL

HD:STA

START

CONDITION

SU:DAT

HIGH

HD:DAT

SU:STA

REPEATED

START CONDITION

SU:STA

SU:STO

STOP

CONDITION

BUF

START

CONDITION

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

24 ______________________________________________________________________________________

Figure 9. Writing One Byte of Data to the MAX9875

SCL

START

CONDITION

SDA

289

CLOCK PULSE FOR

ACKNOWLEDGMENT

ACKNOWLEDGE

NOT ACKNOWLEDGE

Figure 8. Acknowledge

Early STOP Conditions

The MAX9875 recognizes a STOP condition at any point during data transmission except if the STOP condition occurs in the same high pulse as a START condition. For proper operation, do not send a STOP condition during the same SCL high pulse as the START condition.

Slave Address

The MAX9875 is preprogrammed with a slave address of 1001101R/(W). The address is defined as the seven most significant bits (MSBs) followed by the Read/Write bit. Setting the Read/Write bit to 1 configures the MAX9875 for read mode. Setting the Read/Write bit to 0 configures the MAX9875 for write mode. The address is the first byte of information sent to the MAX9875 after the START condition.

Acknowledge

The acknowledge bit (ACK) is a clocked 9th bit that the MAX9875 uses to handshake receipt each byte of data when in write mode (see Figure 8). The MAX9875 pulls down SDA during the entire master-generated 9th clock pulse if the previous byte is successfully received. Monitoring ACK allows for detection of unsuccessful data transfers. An unsuccessful data transfer

occurs if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus master may retry communication.

The master pulls down SDA during the ninth clock cycle to acknowledge receipt of data when the MAX9875 is in read mode. An acknowledge is sent by the master after each read byte to allow data transfer to continue. A not acknowledge is sent when the master reads the final byte of data from the MAX9875, followed by a STOP condition.

Write Data Format

A write to the MAX9875 includes transmission of a START condition, the slave address with the R/W bit set to 0, one byte of data to configure the internal register address pointer, one or more bytes of data, and a STOP condition. Figure 9 illustrates the proper frame format for writing one byte of data to the MAX9875. Figure 10 illustrates the frame format for writing n-bytes of data to the MAX9875.

The slave address with the R/W bit set to 0 indicates that the master intends to write data to the MAX9875. The MAX9875 acknowledges receipt of the address byte during the master-generated 9th SCL pulse.

ACKNOWLEDGE FROM MAX9875

S AA

0SLAVE ADDRESS REGISTER ADDRESS DATA BYTE

R/W

ACKNOWLEDGE FROM MAX9875

1 BYTE

B1 B0B3 B2B5 B4B7 B6

AUTOINCREMENT INTERNAL

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 25

Figure 11. Reading One Indexed Byte of Data from the MAX9875

1 BYTE

AUTOINCREMENT INTERNAL

ACKNOWLEDGE FROM MAX9875

B1 B0B3 B2B5 B4B7 B6

ACKNOWLEDGE FROM MAX9875

R/W

1 BYTE

ACKNOWLEDGE FROM MAX9875

B1 B0B3 B2B5 B4B7 B6

SLAVE ADDRESS

DATA BYTE 1

DATA BYTE n

Figure 10. Writing n-Bytes of Data to the MAX9875

The second byte transmitted from the master configures the MAX9875’s internal register address pointer. The pointer tells the MAX9875 where to write the next byte of data. An acknowledge pulse is sent by the MAX9875 upon receipt of the address pointer data.

The third byte sent to the MAX9875 contains the data that will be written to the chosen register. An acknowledge pulse from the MAX9875 signals receipt of the data byte. The address pointer autoincrements to the next register address after each received data byte. This autoincrement feature allows a master to write to sequential registers within one continuous frame. Figure 10 illustrates how to write to multiple registers with one frame. The master signals the end of transmission by issuing a STOP condition.

Read Data Format

Send the slave address with the R/W bit set to 1 to initiate a read operation. The MAX9875 acknowledges receipt of its slave address by pulling SDA low during the 9th SCL clock pulse. A START command followed by a read command resets the address pointer to register 0x00. The first byte transmitted from the MAX9875 will be the

contents of register 0x00. Transmitted data is valid on the rising edge of SCL. The address pointer autoincrements after each read data byte. This autoincrement feature allows all registers to be read sequentially within one continuous frame. A STOP condition can be issued after any number of read data bytes. If a STOP condition is issued followed by another read operation, the first data byte to be read will be from register 0x00.

The address pointer can be preset to a specific register before a read command is issued. The master presets the address pointer by first sending the MAX9875‘s slave address with the R/W bit set to 0 followed by the register address. A REPEATED START condition is then sent followed by the slave address with the R/W bit set to 1. The MAX9875 then transmits the contents of the specified register. The address pointer autoincrements after transmitting the first byte. The master acknowledges receipt of each read byte during the acknowledge clock pulse. The master must acknowledge all correctly received bytes except the last byte. The final byte must be followed by a not acknowledge from the master and then a STOP condition. Figure 11 illustrates the frame format for reading one byte from the MAX9875. Figure 12 illustrates the frame format for reading multiple bytes from the MAX9875.

ACKNOWLEDGE FROM MAX9875

R/W

ACKNOWLEDGE FROM MAX9875

Sr 1SLAVE ADDRESS REGISTER ADDRESS SLAVE ADDRESS DATA BYTE

NOT ACKNOWLEDGE FROM MASTER

R/WREPEATED START

1 BYTE

AUTOINCREMENT INTERNAL

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

26 ______________________________________________________________________________________

Applications Information

Filterless Class D Operation

Traditional Class D amplifiers require an output filter to recover the audio signal from the amplifier’s output. The filters add cost, increase the solution size of the amplifier, and can decrease efficiency and THD+N performance. The traditional PWM scheme uses large differential output swings (2 x V

DD(P-P)

) and causes large ripple currents. Any parasitic resistance in the filter components results in a loss of power, lowering the efficiency.

The MAX9875 does not require an output filter. The device relies on the inherent inductance of the speaker coil and the natural filtering of both the speaker and the human ear to recover the audio component of the square-wave output. Eliminating the output filter results in a smaller, less costly, more efficient solution.

Because the frequency of the MAX9875 output is well beyond the bandwidth of most speakers, voice coil movement due to the square-wave frequency is very small. Although this movement is small, a speaker not designed to handle the additional power can be damaged. For optimum results, use a speaker with a series inductance > 10µH. Typical 8Ω speakers exhibit series inductances in the 20µH to 100µH range.

Component Selection

Optional Ferrite Bead Filter

In applications where speaker leads exceed 20mm, additional EMI suppression can be achieved by using a filter constructed from a ferrite bead and a capacitor to ground. A ferrite bead with low DC resistance, highfrequency (> 1.176MHz) impedance of 100Ω to 600Ω, and rated for at least 1A should be used. The capacitor value varies based on the ferrite bead chosen and the actual speaker lead length. Select a capacitor less than 1nF based on EMI performance.

Input Capacitor

An input capacitor, CIN, in conjunction with the input impedance of the MAX9875 forms a highpass filter that removes the DC bias from an incoming signal. The AC-

coupling capacitor allows the amplifier to automatically bias the signal to an optimum DC level. Assuming zero source impedance, the -3dB point of the highpass filter is given by:

Choose C

so that f

-3dB

is well below the lowest frequency of interest. Use capacitors whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, may result in increased distortion at low frequencies.

BIAS Capacitor

BIAS is the output of the internally generated DC bias voltage. The BIAS bypass capacitor, C

BIAS

, reduces power supply and other noise sources at the common-mode bias node. Bypass BIAS with a 1µF capacitor to GND.

Charge-Pump Capacitor Selection

Use capacitors with an ESR less than 100mΩ for optimum performance. Low-ESR ceramic capacitors minimize the output resistance of the charge pump. Most surfacemount ceramic capacitors satisfy the ESR requirement. For best performance over the extended temperature range, select capacitors with an X7R dielectric.

Flying Capacitor (C1)

The value of the flying capacitor (C1) affects the output resistance of the charge pump. A C1 value that is too small degrades the device’s ability to provide sufficient current drive, which leads to a loss of output voltage.

Figure 13. Optional Ferrite Bead Filter

ACKNOWLEDGE FROM MAX9875

1 BYTE

AUTOINCREMENT INTERNAL

ACKNOWLEDGE FROM MAX9875

R/W

REPEATED START

Sr 1SLAVE ADDRESS REGISTER ADDRESS SLAVE ADDRESS DATA BYTE

Figure 12. Reading n-Bytes of Indexed Data from the MAX9875

OUT+

MAX9875

OUT-

−=3

2π

IN IN

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 27

Increasing the value of C1 reduces the charge-pump output resistance to an extent. Above 1µF, the on-resistance of the switches and the ESR of C1 and C2 dominate.

Output Holding Capacitor (C2)

The output capacitor value and ESR directly affect the ripple at VSS. Increasing the value of C2 reduces output ripple. Likewise, decreasing the ESR of C2 reduces both ripple and output resistance. Lower capacitance values can be used in systems with low maximum output power levels. See the Output Power vs. Load Resistance graph in the

Typical Operating Characteristics

PVDD Bulk Capacitor (C3)

In addition to the recommended PVDD bypass capacitance, bulk capacitance equal to C3 should be used. Place the bulk capacitor as close to the device as possible.

Supply Bypassing,

Layout, and Grounding

Proper layout and grounding are essential for optimum performance. Use wide traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Wide traces also aid in moving heat away from the package. Proper grounding improves audio performance, minimizes crosstalk between channels, and prevents any switching noise from coupling into the audio signal. Connect PGND and GND together at a single point on the PCB. Route all traces that carry switching transients away from GND and the traces/components in the audio signal path.

Connect PVDD to a 2.7V to 5.25V source. Bypass PVDD to the PGND pin with a 1µF ceramic capacitor. Additional bulk capacitance should be used to prevent power-supply pumping. Place the bypass capacitors as close to the MAX9875 as possible.

Connect VDDto PVDD. Bypass VDDto GND with a 1µF capacitor. Place the bypass capacitors as close to the MAX9875 as possible.

RF Susceptibility

GSM radios transmit using time-division multiple access (TDMA) with 217Hz intervals. The result is an RF signal with strong amplitude modulation at 217Hz that is easily demodulated by audio amplifiers. Figure 14 shows the susceptibility of the MAX9875 to a transmitting GSM radio placed in close proximity. Although there is measurable noise at 217Hz and its harmonics, the noise is well below the threshold of hearing using typical headphones.

In RF applications, improvements to both layout and component selection decreases the MAX9875’s sus-

ceptibility to RF noise and prevent RF signals from being demodulated into audible noise. Trace lengths should be kept below

/4the wavelength of the RF frequency of interest. Minimizing the trace lengths prevents them from functioning as antennas and coupling RF signals into the MAX9875. The wavelength λ in meters is given by:

λ = c/f

where c = 3 x 108m/s, and f = the RF frequency of interest.

Route audio signals on middle layers of the PCB to allow ground planes above and below shield them from RF interference. Ideally the top and bottom layers of the PCB should primarily be ground planes to create effective shielding.

Additional RF immunity can also be obtained from relying on the self-resonant frequency of capacitors as it exhibits the frequency response similar to a notch filter. Depending on the manufacturer, 10pF to 20pF capacitors typically exhibit self resonance at RF frequencies. These capacitors, when placed at the input pins, can effectively shunt the RF noise at the inputs of the MAX9875. For these capacitors to be effective, they must have a low-impedance, low-inductance path to the ground plane. Do not use microvias to connect to the ground plane as these vias do not conduct well at RF frequencies.

RF SUSCEPTIBILITY

MAX9875 fig14

FREQUENCY (Hz)

EFFICIENCY (dBµ)

10k1k100

-130

-110

-90

-70

-50

-30

-10

-150 10 100k

THRESHOLD OF HEARING

MAX9875

NOISE FLOOR

Figure 14. MAX9875 Susceptibility to a GSM Cell Phone Radio

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

28 ______________________________________________________________________________________

WLP Applications Information

For the latest application details on WLP construction, dimensions, tape carrier information, PCB techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to the

Application Note: UCSP—A

Wafer-Level Chip-Scale Package

on Maxim’s website at www.maxim-ic.com/ucsp. See Figure 15 for the recommended PCB footprint for the MAX9875.

250µm

45±5µm

Figure 15. PCB Footprint Recommendation Diagram

MAX9875

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

______________________________________________________________________________________ 29

Typical Application Circuit

Chip Information

PROCESS: BiCMOS

INPUT A

INPUT B

OPEN-DRAIN GPIO

1µF

BATT

C2 1µF

C1N

C1PA4A5

1µF

INA2

INA1D1D2

1µF

INB2

INB1C1C2

1µF

BIAS

CHARGE

PUMP

INPUT A

0dB/+9dB/+20dB

INPUT B

0dB/+9dB/+20dB

MIXER

AND

MUX

1µF

BATT

PVDD

-75dB TO 0dB

C3 1µF

0dB

CLASS D

MODULATOR

+12dB

MAX9875

A1 HPR

A2 HPL

B5D5OUT+

OUT-

SDA

SCL

CONTROL

GND

PGND

MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

30 __________________

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

Package Information

For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

20 WLP R202A2+2

21-0059

20L WLP.EPS

MAXIM MAX9875 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual