19-5286; Rev 0; 6/10
EVALUATION KIT
AVAILABLE
Stereo, High-Power, Class D Amplifiers
General Description
The MAX98400A/MAX98400B Class D amplifiers provide
high-performance, thermally efficient amplifier solutions. The
MAX98400A delivers 2x20W into 8I loads or 1x40W into a
4I load. The MAX98400B delivers 2x12W into 8I loads.
An integrated limiting circuit prevents output clipping
distortion, protects small speakers from transient voltages, and reduces power dissipation.
A thermal-foldback feature can be enabled to automatically reduce the output power at above a junction temperature of +120NC. Traditional thermal protection is also
available in addition to robust overcurrent protection.
The ICs operate from a single 8V to 28V supply and
provide a high 67dB PSRR, eliminating the need for a
regulated power supply. They offer up to 90% efficiency
from a 12V supply.
Filterless modulation allows the ICs to pass EN55022B
EMI limits with 1m cables using only a low-cost ferrite
bead and small-value capacitor on each output.
Both devices feature eight digitally controlled gain settings.
Comprehensive click-and-pop reduction circuitry minimizes noise coming into and out of shutdown.
The MAX98400A/MAX98400B are available in 36-pin
and 24-pin TQFN packages, respectively, and are specified over the -40NC to +85NC temperature range.
MAX98400A/MAX98400B
Features
S Wide 8V to 28V Supply Voltage Range
S Single-Supply Operation
S Low EMI: Active Emissions Limiting
S Clipping Limiter
S Low Quiescent Current
S Thermal Foldback
S Thermal and Overcurrent Protection
Applications
LCD/PDP Televisions
LCD Monitors
MP3 Docking Stations
Notebook PCs
Ordering Information
PART PIN-PACKAGE SPEC
MAX98400AETX+ 36 TQFN-EP* 2x20W
MAX98400BETG+ 24 TQFN-EP* 2x12W
Note: Devices operate over the -40°C to +85°C temperature
range.
*EP = Exposed pad.
Simplified Block Diagram
INL-
CLIPPING
INL+
INR-
INR+
_______________________________________________________________ Maxim Integrated Products 1
LIMITER
CLIPPING
LIMITER
*MAX98400A ONLY
PGA
MAX98400A/B
PGA
CLASS D
MODULATOR
AND H-BRIDGE
CLASS D
MODULATOR
AND H-BRIDGE
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
OUTL-
OUTL+
MONO*
OUTR-
OUTR+
Stereo, High-Power, Class D Amplifiers
Table of ConTenTs
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Stereo Configuration for MAX98400A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Mono Configuration for MAX98400A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Efficiency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Shutdown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Click-and-Pop Suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Mono Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clipping Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Limiter Threshold Control (LIM_TH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Release Time Control (RELEASE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Preamplifier Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MAX98400A/MAX98400B
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal Foldback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Applications Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Filterless Class D Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Inductor-Based Output Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input Capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Power Supplies. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Internal Regulator V
Supply Bypassing, Layout, and Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Chip Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Functional Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2
Stereo, High-Power, Class D Amplifiers
lisT of figures
Figure 1. MAX98400B EMI Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 2. MAX98400A Efficiency vs. Class AB Effifciency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 3. Limiter Control, Mode3 Configuration (Table 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 4. Output Filter for PWM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
lisT of Tables
Table 1. Limiter Control Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 2. Gain Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 3. Filter Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
MAX98400A/MAX98400B
3
Stereo, High-Power, Class D Amplifiers
ABSOLUTE MAXIMUM RATINGS
PVDD to PGND ......................................................-0.3V to +30V
V
to GND ...............................................................-0.3V to +6V
S
SHDN, MONO to GND ............................................-0.3V to +6V
IN_ to GND ..............................................................-0.3V to +6V
G1, G2, RELEASE, TEMPLOCK,
LIM_TH to GND ........................................-0.3V to (V
OUT_ to PGND ......................................-0.3V to (V
PVDD
+ 0.3V)
S
+ 0.3V)
PGND to GND ......................................................-0.3V to +0.3V
Continuous Current into OUT_ .......................................... +2.4A
Continuous Current into PVDD, PGND ............................. +4.8A
Continuous Current into All Other Pins ........................... +10mA
Duration of OUT_ Short Circuit to PVDD or PGND ...Continuous
Duration of Short Circuit Between
OUT_+ and OUT_- .................................................Continuous
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Continuous Power Dissipation (T
= +70NC)
A
36-Pin TQFN Multilayer Board
(derate 35.7mW/NC above +70NC) .........................2857.1mW
B
B
(Note 1) .............................................................28NC/W
JA
(Note 1) ...............................................................1NC/W
JC
24-Pin TQFN Multilayer Board
(derate 27.8mW/NC above +70NC) .............................35.7mW
B
B
(Note 1) .............................................................36NC/W
JA
(Note 1) ...............................................................3NC/W
JC
Junction Temperature .....................................................+150NC
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range ............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
MAX98400A/MAX98400B
ELECTRICAL CHARACTERISTICS
(V
= 18V, CIN = 1FF, V
PVDD
= 1FF, C1 = C2 = 1FF, R
otherwise noted. Typical values are at T
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), C
SHDN
= J, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = T
L
= +25NC.) (Notes 2, 3)
A
MIN
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
AMPLIFIER DC CHARACTERISTICS
PVDD Supply Voltage Range V
Supply Input Voltage V
V
S
Quiescent Current
Single-Supply
Quiescent Current
I
Shutdown Current
SHDN_PVDD
I
SHDN_VS
PVDD Undervoltage Lockout V
Regulator Output Voltage V
V
S
PVDD
I
PVDD
I
VS
I
PVDD
UVLO
S
S
Inferred from PVDD_PSRR 8 28 V
Inferred from IVS test 4.75 5.5 V
Dual-supply mode:
V
= 4.75V, TA = +25NC
S
Single-supply mode:
T
= +25NC
A
= 8I (Note 3)
R
L
V
= 0V, TA = +25NC,
SHDN
V
= 5.5V
S
10 15
6 8.2
16 23
17
8 20
3 10
7 7.9 V
4.2 4.47 4.75 V
INPUT STAGE
Differential Input Voltage Range 2 V
Single-Ended Input Voltage
Range
Common-Mode Rejection Ratio CMRR 60 dB
Input Resistance Differential V
= 0V, gain = +35dB 20 32
LIM_TH
to T
MAX
1 V
REL
, unless
mA
mA
FA
RMS
RMS
kI
4
Stereo, High-Power, Class D Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(V
= 18V, CIN = 1FF, V
PVDD
= 1FF, C1 = C2 = 1FF, R
otherwise noted. Typical values are at T
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER STAGE
Shutdown to Full Operation t
Gain Accuracy
Left-to-Right Gain Matching All gain settings
Crosstalk
Output Offset Voltage V
Click-and-Pop Level K
PVDD Power-Supply Rejection
Ratio
V
Power-Supply Rejection Ratio PSRR
S
MAX98400A Output Power P
MAX98400B Output Power P
Total Harmonic Distortion Plus
Noise
Output Noise V
Efficiency
Current Limit I
Output FET Resistance R
Switching Frequency f
Peak Output Voltage V
LIMITER
Attack Time V
Release Time V
Maximum Trigger Level V
Minimum Trigger Level (Note 7) -6 dBFS
Trigger Level V
Compression Range V
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), C
SHDN
= J, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = T
L
= +25NC.) (Notes 2, 3)
A
SON
Q0.8 Q4
1kHz -85
10kHz -68
TA = +25NC Q8 Q45
Peak voltage,
32 samples/s,
A-weighted,
T
= +25NC (Notes 4, 5)
A
V
= 8V to 28V 52 63
PVDD
ripple 67
P-P
10kHz, 100mV
ripple 57
P-P
Into
shutdown
Out of
shutdown
-47
-56
PSRR
OS
CP
PVDD
VS = 4.75V to 5.5V 39 55
VS
OUT
OUT
THD+N
N
E
LIM
DSON
SW
10kHz, 100mV
Stereo, RL = 8I, 10% THD+N,
f
= 1kHz (Note 3)
IN
Mono, R
f
L
= 1kHz (Note 3)
IN
Stereo, RL = 8I, 10% THD+N,
f
= 1kHz (Note 3)
IN
P
= 0.1W to P
OUT
20kHz, R
/2, fIN = 1kHz, RL = 8I
P
OUT
A-weighted 100
= 2x20W, RL = 8I (MAX98400A)
P
OUT
f
= 1kHz (Note 3)
IN
= 28V 20 26 V
PVDD
= 0V 240 500
LIM_TH
= 0V 0.8 s
LIM_TH
= 14V (Note 6) 4 dBFS
PVDD
= 0V -1 0 +1 dBFS
LIM_TH
= 0V -12 dB
LIM_TH
ripple 50
P-P
ripple 40
P-P
= 4I, 10% THD+N,
/2, fIN = 20Hz to
OUT
= 8I
L
22
44
15
0.3
0.03
90 %
3.5 5 A
0.4
265 330 395 kHz
to T
MIN
11 ms
Q2
MAX
, unless
FV
%
%
dB
mV
dBV
dB1kHz, 100mV
dB1kHz, 100mV
W
%
RMS
I
Fs
MAX98400A/MAX98400B
REL
5
Stereo, High-Power, Class D Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(V
= 18V, CIN = 1FF, V
PVDD
= 1FF, C1 = C2 = 1FF, R
otherwise noted. Typical values are at T
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
VGA Distortion Compression = 0 to -12dB 3.5 %
LIM_TH Input-Voltage Low
(PVDD Tracking)
LIM_TH Input-Voltage High
(Limiter Off)
Channel-to-Channel Attenuation
Tracking
THERMAL FOLDBACK
Internal Templock Resistor 120 205 310
Trigger Temperature +130
Hard Thermal Protection +165
LOGIC INPUT (G1, G2)
Sink Current
Source Current
MAX98400A/MAX98400B
Input High Threshold
Input Low Threshold
Input Three-State Window
LOGIC INPUT (SHDN, MONO (MAX98400A Only))
Input Leakage Current I
Input High Threshold V
Input Low Threshold V
Input-Voltage Hysteresis 100 mV
Note 2: 100% production tested at T
Note 3: The MAX98400A stereo mode is specified with an 8I resistive load in series with a 68FH inductive load connected across
BTL outputs. The MAX98400A mono mode is specified with a 4I resistive load in series with 33FH inductive load. The
MAX98400B is specified with an 8I resistive load in series with a 68FH inductive load connected across BTL outputs.
Note 4: Amplifier inputs AC-coupled to GND.
Note 5: Mode transitions controlled by SHDN.
Note 6: Relative to equivalent full-scale undistorted output. Full scale (FS) = V
Note 7: Relative to equivalent full-scale undistorted output. Full scale (FS) = V
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), C
SHDN
= J, AC measurement bandwidth 20Hz to 20kHz, differential input signal, TA = T
L
= +25NC.) (Notes 2, 3)
A
0.15 V
Q1
= +25NC, VG1, VG2 = 0V
T
A
TA = +25NC, VG1, VG2 = V
IN
INH
INL
= +25NC. Specifications over temperature limits are guaranteed by design.
A
TA = +25NC Q10 FA
S
PVDD
PVDD
x 0.95.
.
+2.5 +5 +8
-8 -5 -2.5
0.3 x
V
S
0.45 x
V
0.5 x
V
S
2 V
S
to T
MIN
V
S
- 1
0.8 x
V
S
0.55 x
V
S
0.4 V
MAX
REL
, unless
V
dB
kI
NC
NC
FA
FA
V
V
V
6
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics
(MAX98400A, V
C
= C1 = C2 = 1FF, typical values are at TA = +25NC, unless otherwise noted.)
REL
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
1
PVDD
= 18V, V
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
SHDN
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
1
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
1
MAX98400A/MAX98400B
P
= 4W
0.1
THD+N (%)
0.01
0.001
0.01 100
OUT
P
OUT
FREQUENCY (kHz)
= 0.5W
V
PVDD
8I LOAD
1010.1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
10
1
0.1
THD+N (%)
0.01
0.001
f = 1kHz
f = 100Hz
0 12
f = 6kHz
OUTPUT POWER (W)
V
PVDD
8I LOAD
= 12V
= 12V
108642
MAX98400 toc01
MAX98400 toc04
0.1
P
= 7W
OUT
THD+N (%)
0.01
P
= 1W
OUT
V
PVDD
0.001
0.01 100
FREQUENCY (kHz)
4I LOAD
1010.1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
10
1
0.1
THD+N (%)
0.01
0.001
f = 1kHz
0 24
f = 6kHz
f = 100Hz
OUTPUT POWER (W)
V
PVDD
I LOAD
8
= 12V
= 18V
20161284
MAX98400 toc02
MAX98400 toc05
0.1
P
= 10W
THD+N (%)
0.01
0.001
0.01 100
OUT
P
= 1W
OUT
FREQUENCY (kHz)
V
PVDD
8I LOAD
1010.1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
10
1
f = 6kHz
0.1
THD+N (%)
0.01
0.001
f = 1kHz
V
= 24V
PVDD
RL = 8I
STOPS BEFORE 10% THD+N
f = 100Hz
0 48
DUE TO THERMAL LIMITING OF
THERMAL FOLDBACK FEATURE
OUTPUT POWER (W)
MAX98400 toc03
= 18V
MAX98400 toc06
403224168
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
10
1
0.1
THD+N (%)
0.01
0.001
f = 6kHz
f = 1kHz
f = 100Hz
OUTPUT POWER (W)
V
PVDD
4I LOAD
14121086420 18
= 12V
16
MAX98400 toc07
EFFICIENCY vs. OUTPUT POWER
100
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
0 20
V
= 12V,
PVDD
8I LOAD,
BOTH CHANNELS DRIVEN
TOTAL OUTPUT POWER (W)
EFFICIENCY vs. OUTPUT POWER
100
90
MAX98400 toc08
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
181612 144 6 8 102
V
= 18V,
PVDD
8I LOAD,
BOTH CHANNELS DRIVEN
TOTAL OUTPUT POWER (W)
3020 2510 1550 40
MAX98400 toc09
35
7
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, V
C
= C1 = C2 = 1FF, typical values are at TA = +25NC, unless otherwise noted.)
REL
EFFICIENCY vs. OUTPUT POWER
100
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
= 18V, V
PVDD
V
8I LOAD,
BOTH CHANNELS DRIVEN
TOTAL OUTPUT POWER (W)
= 24V,
PVDD
403020100 60
SHDN
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
MAXIMUM OUTPUT POWER vs. SUPPLY VOLTAGE
EFFICIENCY vs. OUTPUT POWER
100
90
MAX98400 toc10
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
50
V
= 12V,
PVDD
4I LOAD,
BOTH CHANNELS DRIVEN
20100 40
TOTAL OUTPUT POWER (W)
30
100
MAX98400 toc11
MAXIMUM OUTPUT POWER (W)
(WITH THERMAL SHUTDOWN)
8I LOAD, BOTH
90
CHANNELS ARE DRIVEN
80
70
60
50
40
10% THD+N
30
20
10
0
8 28
1% THD+N
24201612
SUPPLY VOLTAGE (V)
MAX98400 toc12
MAXIMUM OUTPUT POWER vs. SUPPLY VOLTAGE
(WITH THERMAL SHUTDOWN)
MAX98400 toc13
(W)
P
OUT
40
35
30
25
20
15
10
60
MAX98400A/MAX98400B
4I LOAD, BOTH CHANNELS ARE DRIVEN
50
40
30
10% THD+N
20
MAXIMUM OUTPUT POWER (W)
10
0
8 16
1% THD+N
SUPPLY VOLTAGE (V)
141210
OUTPUT POWER vs. LOAD
MAX98400 toc16
10
-10
-20
-30
-40
PSRR (dB)
-50
-60
-70
-80
80
70
60
50
(W)
40
OUT
P
30
20
1% THD+N
10
0
0 100
10% THD+N
LOAD (I)
V
PVDD
= 24V
908010 20 30 50 6040 70
OUTPUT POWER vs. LOAD
10% THD+N
5
1% THD+N
0
0 100
POWER-SUPPLY REJECTION RATIO
0
0.01 100
LOAD (I)
100mV
FREQUENCY (kHz)
V
PVDD
P-P
1010.1
= 12V
908010 20 30 50 6040 70
RIPPLE
MAX98400 toc14
MAX98400 toc17
50
45
40
35
30
(W)
25
OUT
P
20
15
10
1% THD+N
5
0
0 100
10% THD+N
LOAD (I)
CROSSTALK vs. FREQUENCY
20
8I LOAD,
P
= 1W,
OUT
0
f = 1kHz
-20
-40
CROSSTALK (dB)
-60
-80
OUTPUT POWER vs. LOAD
-100
1
FREQUENCY (kHz)
V
PVDD
100.10.01
= 18V
MAX98400 toc15
908060 7020 30 40 5010
MAX98400 toc18
100
8
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, V
C
= C1 = C2 = 1FF, typical values are at TA = +25NC, unless otherwise noted.)
REL
PVDD
= 18V, V
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
SHDN
MAX98400A/MAX98400B
INBAND OUTPUT SPECTRUM
0
-20
-40
-60
-80
OUTPUT AMPLITUDE (dBV)
-100
-120
0 20
FREQUENCY (kHz)
SUPPLY CURRENT
vs. PVDD SUPPLY VOLTAGE
14
12
10
8
6
SUPPLY CURRENT (mA)
4
2
0
8 28
1612
PVDD SUPPLY VOLTAGE (V)
I
PVDD
8I LOAD
15105
I
VS
VS = 5V
2420
WIDEBAND OUTPUT SPECTRUM
0
-20
MAX98400 toc19
-40
-60
-80
OUTPUT AMPLITUDE (dBV)
-100
-120
14
12
MAX98400 toc22
10
8
6
SUPPLY CURRENT (mA)
4
2
0
RBW = 100Hz
1010.1 100
FREQUENCY (MHz)
SUPPLY CURRENT
SUPPLY VOLTAGE
vs. V
S
V
PVDD
5.004.75 5.50
VS SUPPLY VOLTAGE (V)
5.25
I
PVDD
SHDN ON/OFF RESPONSE
MAX98400 toc20
4ms/div
MAX98400 toc21
SHDN
2V/div
OUTPUT
2V/div
SHUTDOWN CURRENT
vs. PVDD SUPPLY VOLTAGE
14
12
MAX98400 toc23
10
I
VS
= 18V
8
6
4
SHUTDOWN CURRENT (µA)
2
0
8 28
PVDD SUPPLY VOLTAGE (V)
I
PVDD_SHDN
I
VS_SHDN
24201612
MAX98400 toc24
VS = 5V
SHUTDOWN CURRENT
SUPPLY VOLTAGE
vs. V
14
12
10
8
6
4
SHUTDOWN CURRENT (µA)
2
0
4.75 5.50
S
I
PVDD_SHDN
5.255.00
VS SUPPLY VOLTAGE (V)
I
VS_SHDN
V
PVDD
= 18V
MAX98400 toc25
(W)
OUT
MAXIMUM P
MAXIMUM OUTPUT POWER
vs. PVDD (NO THERMAL SHUTDOWN)
60
50
40
30
20
10
0
8 28
THERMAL FOLDBACK DISABLED,
BOTH CHANNELS DRIVEN
1612
PVDD SUPPLY VOLTAGE (V)
8I LOAD
4I LOAD
2420
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (MONO)
1
MAX98400 toc26
0.1
THD+N (%)
0.01
0.001
0.01 100
P
= 8W
OUT
FREQUENCY (kHz)
MAX98400 toc27
P
= 1W
OUT
V
= 12V
PVDD
4I LOAD
1010.1
9
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, V
C
= C1 = C2 = 1FF, typical values are at TA = +25NC, unless otherwise noted.)
REL
PVDD
= 18V, V
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
SHDN
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (MONO)
10
1
0.1
THD+N (%)
0.001
f = 1kHz
0.01
f = 100Hz
0 24
f = 6kHz
OUTPUT POWER (W)
V
PVDD
4I LOAD
MAX98400 toc28
= 12V,
20161284
EFFICIENCY vs. OUTPUT POWER (MONO)
100
MAX98400A/MAX98400B
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
0 20
TOTAL OUTPUT POWER (W)
V
= 12V,
PVDD
4I LOAD
15105
MAX98400 toc31
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (MONO)
10
1
0.1
THD+N (%)
0.001
f = 1kHz
0.01
f = 100Hz
0 48
OUTPUT POWER (W)
EFFICIENCY vs. OUTPUT POWER (MONO)
100
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
TOTAL OUTPUT POWER (W)
f = 6kHz
V
PVDD
4I LOAD
V
PVDD
4I LOAD
= 18V,
403224168
= 18V,
353020 2510 1550 40
MAX98400 toc29
MAX98400 toc32
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (MONO)
10
1
0.1
THD+N (%)
0.01
0.001
f = 1kHz
f = 100Hz
0 80
f = 6kHz
OUTPUT POWER (W)
V
PVDD
4I LOAD
EFFICIENCY vs. OUTPUT POWER (MONO)
100
90
80
70
60
50
40
EFFICIENCY (%)
30
20
10
0
TOTAL OUTPUT POWER (W)
V
PVDD
4I LOAD
MAX98400 toc30
= 24V,
70605040302010
MAX98400 toc33
= 24V,
353020 2510 1550 40
vs. PVDD (WITH THERMAL SHUTDOWN, MONO)
MAXIMUM OUTPUT POWER
100
90
80
(W)
OUT
MAXIMUM P
70
60
50
40
30
20
10
0
4I LOAD, THERMAL FOLD DISABLED
PVDD SUPPLY VOLTAGE (V)
10% THD+N
1% THD+N
242016128 28
10
MAX98400 toc34
OUTPUT POWER vs. LOAD (MONO)
25
20
15
(W)
OUT
P
10
5
1% THD+N
0
0 100
10% THD+N
LOAD (I)
V
PVDD
= 12V
908070605040302010
MAX98400 toc35
OUTPUT POWER vs. LOAD (MONO)
50
45
40
35
30
(W)
25
OUT
P
20
15
10
5
0
1% THD+N
10% THD+N
LOAD (I)
V
PVDD
= 18V
MAX98400 toc36
9080706050403020100 100
Stereo, High-Power, Class D Amplifiers
Typical Operating Characteristics (continued)
(MAX98400A, V
C
= C1 = C2 = 1FF, typical values are at TA = +25NC, unless otherwise noted.)
REL
PVDD
= 18V, V
= 5V, LIM_TH = VS, TEMPLOCK = unconnected; G1 = GND, G2 = open (gain = 20.1dB), CIN =
SHDN
OUTPUT POWER vs. LOAD (MONO)
80
70
60
50
(W)
40
OUT
P
30
20
10
1% THD+N
0
0 100
10% THD+N
LOAD (I)
V
PVDD
= 24V
908010 20 30 50 6040 70
MAX98400 toc37
SUPPLY CURRENT
vs. PVDD SUPPLY VOLTAGE (MONO)
14
12
10
8
6
SUPPLY CURRENT (mA)
4
2
0
8 28
PVDD SUPPLY VOLTAGE (V)
I
PVDD
I
VS
MAX98400 toc38
VS = 5V
24201612
MAX98400A/MAX98400B
SUPPLY CURRENT
SUPPLY VOLTAGE (MONO)
vs. V
S
14
12
10
8
6
SUPPLY CURRENT (mA)
4
2
0
4.75 5.50
VS SUPPLY VOLTAGE (V)
V
5.255.00
LIMITER TRANSFER CHARACTERISTIC
24
RL = 8I + 68µH
22
LIM_TH = GND
20
18
16
14
12
10
8
OUTPUT VOLTAGE (V)
6
4
2
0
0 3.0
INPUT VOLTAGE (V)
V
V
PVDD
PVDD
I
PVDD
PVDD
V
I
VS
PVDD
= 18V
= 18V
= 8V
2.52.01.51.00.5
= 24V
MAX98400 toc39
MAX98400 toc41
MAXIMUM OUTPUT POWER
vs. PVDD (NO THERMAL SHUTDOWN, MONO)
60
50
40
(W)
OUT
30
20
MAXIMUM P
10
4I LOAD, THERMAL FOLD DISABLED
0
8 28
PVDD SUPPLY VOLTAGE (V)
LIMITER RELEASE TIME
t
RELEASE
200ms/div
24201612
MAX98400 toc42
LIM_TH = GND
MAX98400 toc40
INPUT
2V/div
OUTPUT
4V/div
11
Stereo, High-Power, Class D Amplifiers
Pin Configurations
TOP VIEW
TOP VIEW
PGND
PGND
PVDD
PVDD
PGND
PGND
-
-
OUTR
OUTR
18 17 16 15 14 13
19
20
21
22
23
+
24
1 2 3 4 5 6
OUTL-
OUTR+
MAX98400B
OUTL-
OUTL+
TQFN
SHDN
RELEASE
TEMPLOCK
12
INR+
11
INR-
10
GND
INL-
9
INL+
8
EP
S
V
G1
LIM_TH
7
G2
N.C.
PGND
PVDD
PVDD
PVDD
PGND
PGND
N.C.
OUTR-
N.C.
OUTR-
27
26 25 24 23 22 21 20 19
28
29
30
31
32
33
34
35
+
36
1 2 3 4 5 6 7 8
MAX98400A
N.C.
OUTL-
OUTL-
OUTR+
OUTL+
TQFN
OUTR+
N.C.
SHDN
RELEASE
TEMPLOCK
18
N.C.
17
INR+
16
INR-PGND
15
GND
14
GND
MONO
13
INL-
12
INL+
11
EP
9
S
V
G1
N.C.
OUTL+
LIM_TH
10
G2
MAX98400A/MAX98400B
Pin Descriptions
PIN
MAX98400A MAX98400B
1, 2 1, 2 OUTL- Negative Left Speaker Output
3, 7, 18, 22,
25, 28, 36
— N.C. No Connection
4, 5 3 OUTL+ Positive Left Speaker Output
6 4 V
8 5 G1 Three-State Input for Gain Selection 1. See the Detailed Description section.
9 6 G2 Three-State Input for Gain Selection 2. See the Detailed Description section.
10 7 LIM_TH
NAME FUNCTION
S
5V Regulator Supply. Bypass VS to GND with a 1μF capacitor. Connect to a
+5V source for dual-supply operation.
See the Limiter Threshold Control (LIM_TH) section for details.
Connect to:
1) V
to disable limiter.
S
2) GND to have no clipping.
3) R
4) R
resistor to GND to have a PVDD tracking threshold.
LIM1
LIM1
and R
resistor-divider to have an absolute threshold.
LIM2
12
Stereo, High-Power, Class D Amplifiers
Pin Descriptions (continued)
MAX98400A/MAX98400B
PIN
MAX98400A MAX98400B
11 8 INL+ Left-Channel Positive Analog Input
12 9 INL- Left-Channel Negative Analog Input
13 — MONO
14, 15 10 GND Analog Ground
16 11 INR- Right-Channel Negative Analog Input
17 12 INR+ Right-Channel Positive Analog Input
19 13 TEMPLOCK
20 14 RELEASE
21 15
23, 24 16 OUTR+ Positive Right Speaker Output
26, 27 17, 18 OUTR- Negative Right Speaker Output
29, 30, 34, 35
31, 32, 33 21, 22 PVDD
— — EP Exposed Pad. Connect to PGND for optimum thermal performance.
19, 20,
23, 24
NAME FUNCTION
Mono Operation. Connect MONO to GND for stereo operation. Connect MONO
for mono operation.
to V
S
See the Thermal Foldback section for details.
Connect to:
1) GND to disable thermal foldback.
2) Leave open to enable thermal foldback.
Sets the Limiter Time Constant. Connect to GND through 1FF.
Active-Low Shutdown Input
SHDN
PGND Power Ground
Low = shutdown
High = enable
Power Supply. Bypass PVDD to PGND with 1FF and 200FF capacitors.
13
Stereo, High-Power, Class D Amplifiers
Stereo Configuration for MAX98400A
8V TO 28V
S
6
REGULATOR
LIMITER
CONTROL
C1
1.0µF
20
RELEASE
C
1.0µF
PVDD
31, 32, 33
PGA
THERMAL
FOLDBACK
PGA
REL
C2
1.0µF
V
MONO
13
C
IN
1.0µF
INL+
11
LEFT
C
INPUT
MAX98400A/MAX98400B
RIGHT
INPUT
IN
1.0µF
TEMPLOCK1219
C
IN
1.0µF
C
IN
1.0µF
INL-
INR+ 17
INR- 16
CLIPPING
LIMITER
CLIPPING
LIMITER
10
LIM_TH
GAIN
SELECTION
8
G1
C
BULK
200µF
MAX98400A
WITH THERMAL
OVERCURRENT
G29SHDN
POWER
STAGE
AND
PROTECTION
BIAS AND
OSCILLATOR
21
14, 15
ENABLE
GND
29, 30,
34, 35
23, 24
26, 27
PGND
4, 5
1, 2
OUTL+
OUTL-
OUTR+
OUTR-
14
Stereo, High-Power, Class D Amplifiers
Mono Configuration for MAX98400A
8V TO 28V
MAX98400A/MAX98400B
LEFT
INPUT
RIGHT
INPUT
C
1µ
C
1µF
C
1µF
C
1µF
IN
F
IN
IN
IN
V
S
TEMPLOCK
MONO
INL+
INL-
INR+ 17
INR- 16
1.0µF
C
2
13
11
12
19
V
S
6
CLIPPING
LIMITER
CLIPPING
LIMITER
LIM_TH
C
1.0µF
REGULATOR
LIMITER
CONTROL
10
PVDD
31, 32, 33
C
BULK
200µF
1
MAX98400A
4, 5
OUTL+
20
RELEASE
C
REL
1.0µF
PGA
THERMAL
FOLDBACK
PGA
SELECTION
8
G1
GAIN
WITH THERMAL
OVERCURRENT
PROTECTION
OSCILLATOR
G29SHDN
ENABLE
POWER
STAGE
AND
BIAS AND
21
14, 15
GND
29, 30,
34, 35
23, 24
26, 27
PGND
1, 2
OUTL-
OUTR+
OUTR-
Detailed Description
The MAX98400A/MAX98400B Class D amplifiers provide high-performance, thermally efficient amplifier solutions. The MAX98400A delivers 2x20W into 8I loads or
1x40W into a 4I load. The MAX98400B delivers 2x12W
into 8I loads.
An integrated limiting circuit prevents output clipping
distortion and protects small speakers from transient
voltages.
A thermal-foldback feature can be enabled to automatically reduce the output power if the supply voltage, input
signal, and/or ambient temperature are too high to operate within a junction temperature of +130NC. Traditional
thermal protection is also available in addition to robust
overcurrent protection.
Both devices operate from an 8V to 28V supply and provide a high 67dB PSRR, eliminating the need for a regulated power supply. They offers up to 90% efficiency
from a 12V supply.
Filterless modulation allows the ICs to pass EN55022B
EMI limits with 1m cables using only a low-cost ferrite bead and small-value capacitor on each output
(Figure 1).
Comprehensive click-and-pop reduction circuitry minimizes noise coming into and out of shutdown.
15
Stereo, High-Power, Class D Amplifiers
The MAX98400A/MAX98400B are available in 36-pin
and 24-pin TQFN packages, respectively, and are
specified over the -40NC to +85NC temperature range.
Efficiency
The high efficiency of a Class D amplifier is due to the
switching operation of the output stage transistors. In a
Class D amplifier, the output transistors act as switches
and consume negligible power. Power loss associated
2
with the Class D output stage is due to the I
R loss of the
MOSFET on-resistance, various switching losses, and
quiescent current overhead.
The theoretical best efficiency of a linear amplifier is 78%
at peak output power. Under typical music reproduction
levels, the efficiency falls below 30%, whereas these
ICs exhibit > 85% efficiency under the same conditions
(Figure 2).
Shutdown
The ICs feature a shutdown mode that reduces power
consumption and extends battery life in portable applications. The shutdown mode reduces supply current to
8FA (typ). Drive SHDN high for normal operation. Drive
MAX98400A/MAX98400B
SHDN low to place the device in low-power shutdown
mode. In shutdown mode, the outputs are high impedance and the common-mode voltage at the output
decays to zero. The shutdown mode serves as a mute
function.
Click-and-Pop Suppression
The ICs feature comprehensive click-and-pop suppression that minimizes audible transients on startup and
shutdown. While in shutdown, the H-bridge is in a highimpedance state.
Mono Configuration
The MAX98400A features a mono mode that allows the
right and left channels to operate in parallel, achieving
up to 40W of output power. Apply a logic-high (V
S
) to
MONO to enable mono mode. In mono mode, an audio
signal applied to the left channel (INL) is routed to the
H-bridges of both channels. Connect OUTL+ to OUTR+
and OUTL- to OUTR- using heavy PCB traces as close
as possible to the device. Driving MONO low (stereo
mode) while the outputs are wired together in mono
mode can trigger the short-circuit or thermal-overload
protection, or both.
Clipping Limiter
The ICs feature a programmable clipping limiter to prevent output clipping distortion and excessive power dissipation and to protect small speakers. All limiter functionality is controlled by two pins: LIM_TH and RELEASE.
The voltage applied at the LIM_TH pin controls the
threshold when the limiter acts, and the capacitor at the
RELEASE pin controls the release time of the limiter. The
limiter controls both left and right channels together.
40
30
20
10
AMPLITUDE (dBµV/m)
0
-10
10030 1000
FREQUENCY (MHz)
Figure 1. MAX98400B EMI Performance Figure 2. MAX98400A Efficiency vs. Class AB Efficiency
16
EFFICIENCY (%)
EFFICIENCY vs. OUTPUT POWER
100
90
80
70
60
50
40
30
20
10
0
0 20
MAX98400A
CLASS AB
15105
TOTAL OUTPUT POWER (W)
Stereo, High-Power, Class D Amplifiers
Limiter Threshold Control (LIM_TH)
There are three modes for the limiter, defined by V
LIM_TH
the voltage applied to the LIM_TH pin (Table 1).
In Mode1, the limiter is disabled. The output clips when
output peak voltage reaches the voltage on PVDD, V
In Mode2, the limiter threshold (V
voltage, V
approximately V
. The peak output voltage is limited to
PVDD
THRESH
= V
PVDD
In Mode3, the limiter threshold, V
mable. V
LIM_TH
can be set to a voltage proportional to
THRESH
x 0.95.
) tracks supply
THRESH
, is program-
PVDD
the desired output threshold. The limiter threshold can
be set down to 0.5 x V
V
THRESH
cannot exceed 22V.
Threshold settings below V
and up to 1.6 x V
PVDD
can be used to protect
PVDD
PVDD
speakers; the peak output voltage is limited to a value of
V
THRESH
= V
LIM_TH
Threshold settings above V
x 6.4.
can be used to limit the
PVDD
output distortion; the peak output voltage is limited to a
value of V
THRESH
= V
LIM_TH
x 6.4 x 0.95. The 0.95 factor takes into account the voltage drop across the power
FET that occurs when the amplifier is clipped. Choose
R
LIM1
and R
(Figure 3) to set the desired voltage at
LIM2
the LIM_TH pin. For best accuracy, the parallel combina-
||R
tion R
LIM1
should be approximately 100kI.
LIM2
Example:
If the speaker in the application can handle only
12V peak, but V
(V
THRESH
) should be set to 12V:
The voltage that needs to be applied to V
is higher, the threshold voltage
PVDD
V
THRESH
= 12V
LIM_TH
is then
defined as:
V
LIM_TH
= V
THRESH
/6.4 = 12V/6.4 = 1.88V
For a 5V supply, a resistor-divider of R
,
= 270kI gives both an unloaded voltage of 1.82V
R
LIM2
LIM1
and the desired output resistance of approximately
100kI.
.
If only distortion limiting is desired, set V
20% higher than V
. This limits the output clipping
PVDD
THRESH
levels to approximately 10% THD.
The attack time for the limiter is fixed, typically < 200Fs.
Release Time Control (RELEASE)
The release time for the limiter is set by an external
capacitor at RELEASE (C
.
Release Time [s] x 1FF. The C
V
S
C2
µF
LIM2
1.0
LIM_TH RELEASE
R
R
Figure 3. Limiter Control, Mode3 Configuration (Table 1)
) to GND. Choose C
REL
limit is 2.2FF.
REL
MAX98400A
MAX98400B
V
S
REGULATOR
LIMITER
CONTROL
LIM1
C
1.0µF
PVDD
PVDD
PVDD
REL
= 165kI/
to be
=
REL
18V
C1
µF
1.0
MAX98400A/MAX98400B
Table 1. Limiter Control Modes
MODE NAME FUNCTION
Mode1 Disable
Mode2 PVDD tracking
Mode3 Programmable
Note: V
is the output peak limiting voltage (limiter threshold voltage).
THRESH
The limiter is disabled when connecting LIM_TH to VS or a voltage greater
than 3.9V.
The output peak voltage is limited to just below the supply voltage,
V
. V
PVDD
a voltage below 0.3V.
The output peak voltage, V
voltage applied on the LIM_TH so that V
When V
THRESH
limited to 10%.
= V
THRESH
PVDD
is set 20% higher than V
x 0.95 when LIM_TH is connected to ground or
, is limited to the threshold set by the
THRESH
= V
THRESH
, the output THD distortion is
PVDD
LIM_TH
x 6.4.
LIM_TH VOLTAGE
RANGE
3.9V < V
V
GND
0.6V P V
P V
0.15V
LIM_TH
LIM_TH
LIM_TH
P V
P 3.8V
S
<
17
Stereo, High-Power, Class D Amplifiers
Preamplifier Gain Setting
The ICs offer eight pin-selectable gain settings, selectable through the G1 and G2 pins.
Protection
The ICs feature overcurrent protection and two types of
thermal protection: thermal foldback and overtemperature protection.
Thermal Foldback
The ICs feature thermal foldback that helps prevent
unwanted thermal-shutdown events. If activated, thermal foldback attenuates the stereo output signal once
the internal junction temperature exceeds +130NC.
Attenuation is applied proportionally as the junction temperature (T
) exceeds the fixed +130NC threshold. The
J
thermal-foldback mode is controlled by the TEMPLOCK
pin.
Overtemperature Protection
The ICs feature an overtemperature protection that disables the amplifier if the junction temperature exceeds
+165NC. Once the amplifier is disabled and the die temperature has cooled by 20NC, the devices enable again
MAX98400A/MAX98400B
and resume normal operation.
Overcurrent Protection
When the output current reaches the current limit, 5A
(typ), the ICs disable the outputs and initiate a recovering
sequence. The shutdown and recovering sequence is
repeated until the output fault is removed.
Applications Information
Filterless Class D Operation
Traditional Class D amplifiers require an output filter
to recover the audio signal from the amplifier’s output.
The filters add cost, increase the solution size of the
amplifier, and can decrease efficiency and THD+N
performance. The traditional PWM scheme uses large
differential output swings (2 x V
causes large ripple currents. Any parasitic resistance in
the filter components results in a loss of power, lowering
the efficiency.
These ICs do not require an output filter. The devices
rely on the inherent inductance of the speaker coil and
the natural filtering of both the speaker and the human
ear to recover the audio component of the square-wave
output. Eliminating the output filter results in a smaller,
lower cost solution.
Because the frequency of the ICs’ output is well beyond
the bandwidth of most speakers, voice coil movement
due to the square-wave frequency is very small. For
optimum results, use a speaker with a series inductance
> 10FH. Typical 8I speakers exhibit series inductances
in the 20FH to 100FH range.
peak-to-peak) and
DD
Table 2. Gain Selection
G1 G2
GND GND 9
Unconnected GND 13
V
S
GND Unconnected 20.1
Unconnected Unconnected 23.3
V
S
GND V
Unconnected V
V
S
18
GAIN SETTING
(dB)
GND 16.7
Unconnected 26.4
S
S
V
S
29.8
32.9
Reserved
Stereo, High-Power, Class D Amplifiers
Inductor-Based Output Filters
Some applications use the ICs with a full inductor-/
capacitor-based (L/C) output filter. See Figure 4 for the
correct connections of these components.
The load impedance of the speaker determines the filter
component selection (Table 3).
Inductors L1 and L2 and capacitor C1 form the primary
output filter. Capacitors C2 and C3 provide commonmode filtering to reduce radiated emissions. Capacitors
C4 and C5, plus resistors R1 and R2, form a Zobel at
the output. A Zobel corrects the output loading to compensate for the rising impedance of the loudspeaker.
Without a Zobel, the filter exhibits a peak response near
the cutoff frequency.
Component Selection
Input Capacitor
The input AC-coupling capacitors allow the amplifier to
automatically bias the signal to an optimum DC level.
1FF is recommended for the input capacitor.
Power Supplies
The ICs are designed to be operated from a singlesupply voltage, V
Inside the ICs, this V
, which can range from 8V to 28V.
PVDD
supplies power for the output
PVDD
FETs and other high-power circuitry, while the low-power
circuitry operates from V
supply (4.6V typ). V
ear regulator that is powered from V
PVDD and V
pins to ground with a 1FF capacitor.
S
MAX98400A/B
, an internally generated 5V
S
is internally generated from a lin-
S
. Bypass both
PVDD
C2
L1
C1
L2
C3
C4
R1
C5
R2
Internal Regulator V
For highest efficiency operation and best thermal performance, especially at higher V
levels, the VS can be
PVDD
supplied from an external 5V supply. To do this, connect
a 5V source to the V
supply is connected to the V
pin (4.75V to 5.5V). When a 5V
S
pin, the internal regulator
S
is automatically disabled and the power dissipation of
the ICs is reduced.
Supply Bypassing, Layout, and Grounding
Proper layout and grounding are essential for optimum
performance. Use wide traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Proper grounding improves
audio performance, minimizes crosstalk between channels, and prevents switching noise from coupling into
the audio signal. Connect PGND and GND together at
a single point on the PCB. Route all traces that carry
switching transients away from GND and the traces/
components in the audio signal path.
Bypass each PVDD pin with a 0.1FF capacitor to PGND.
Place the bypass capacitors as close as possible to the
ICs. Place a 220FF capacitor between PVDD and PGND.
Bypass both PVDD and V
pins with a 1FF capacitor to
S
GND.
Use wide, low-resistance output traces. Current drawn
from the outputs increases as load impedance decreases. High-output trace resistance decreases the power
delivered to the load. The TQFN package features an
exposed thermal pad on its underside. This pad lowers
the package’s thermal resistance by providing a heat
conduction path from the die to the PCB. Connect the
exposed thermal pad to PGND by using a large pad and
multiple vias to the PGND plane.
For best optimum thermal performance, use 2oz copper
and allow lots of PCB area around the device.
Chip Information
PROCESS: CMOS
MAX98400A/MAX98400B
S
Figure 4. Output Filter for PWM Mode
Table 3. Filter Component Selection
RL (I)
4 10 0.47 0.10 0.22 10
8 15 0.15 0.15 0.15 15
16 33 0.10 0.10 0.10 33
L1, L2 (µH) C1 (µF) C2, C3 (µF) C4, C5 (µF)
R1, R2 (I)
19
Stereo, High-Power, Class D Amplifiers
Functional Diagrams
PVDD
31, 32, 33
PGA
THERMAL
FOLDBACK
PGA
MONO
INL+
INL-
TEMPLOCK1219
INR+ 17
INR- 16
V
S
6
13
11
REGULATOR
CLIPPING
LIMITER
CLIPPING
LIMITER
MAX98400A/MAX98400B
LIMITER
LIM_TH
CONTROL
10
20
RELEASE
SELECTION
8
G1
GAIN
MAX98400A
WITH THERMAL
OVERCURRENT
PROTECTION
OSCILLATOR
G29SHDN
POWER
STAGE
AND
BIAS AND
21
14, 15
GND
29, 30,
34, 35
PGND
4, 5
1, 2
23, 24
26, 27
OUTL+
OUTL-
OUTR+
OUTR-
20
Stereo, High-Power, Class D Amplifiers
Functional Diagrams (continued)
MAX98400A/MAX98400B
INL+
INL-
TEMPLOCK913
INR+ 12
INR- 11
V
S
4
REGULATOR
8
CLIPPING
LIMITER
CLIPPING
LIMITER
7
LIM_TH
LIMITER
CONTROL
PVDD
21, 22
14
RELEASE
PGA
THERMAL
FOLDBACK
PGA
SELECTION
5
G1
GAIN
MAX98400B
WITH THERMAL
OVERCURRENT
PROTECTION
OSCILLATOR
G26SHDN
POWER
STAGE
AND
BIAS AND
15
19, 20,
23, 24
GND10PGND
1, 2
17, 18
3
OUTL+
OUTL-
16
OUTR+
OUTR-
21
Stereo, High-Power, Class D Amplifiers
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
36 TQFN-EP T3666+2
24 TQFN-EP T2444+4
21-0141
21-0139
90-0052
90-0068
MAX98400A/MAX98400B
22
Stereo, High-Power, Class D Amplifiers
Package Information (continued)
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
MAX98400A/MAX98400B
23
Stereo, High-Power, Class D Amplifiers
Package Information (continued)
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
MAX98400A/MAX98400B
24
Stereo, High-Power, Class D Amplifiers
Package Information (continued)
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
MAX98400A/MAX98400B
25
Stereo, High-Power, Class D Amplifiers
Revision History
REVISION
NUMBER
0 6/10 Initial release —
REVISION
DATE
DESCRIPTION
MAX98400A/MAX98400B
PAGES
CHANGED
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
26 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©
2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Loading...