General Description
The MAX9326 low-skew, 1:9 differential driver features
extremely low output-to-output skew (50ps max) and
part-to-part skew (225ps max). These features make
the device ideal for clock and data distribution across a
backplane or board. The device repeats an HSTL or
LVECL/LVPECL differential input at nine differential outputs. Outputs are compatible with LVECL and LVPECL,
and directly drive 50Ω terminated transmission lines.
The differential inputs can be configured to accept a
single-ended signal when the unused complementary
input is connected to the on-chip reference output voltage V
BB.
All inputs have internal pulldown resistors to
V
EE.
The internal pulldowns and a fail-safe circuit
ensure differential low default outputs when the inputs
are left open or at VEE.
The MAX9326 operates over a +2.375V to +3.8V supply
range for interfacing to differential HSTL and LVPECL
signals. This allows high-performance clock or data distribution in systems with a nominal +2.5V or +3.3V supply. For LVECL operation, the device operates with a
-2.375V to -3.8V supply.
The MAX9326 is offered in 28-lead PLCC and spacesaving 28-lead QFN packages. The MAX9326 is specified for operation from -40°C to +85°C.
Applications
Precision Clock Distribution
Low-Jitter Data Repeaters
Features
♦ 50ps (max) Output-to-Output Skew
♦ 1.5ps
RMS
(max) Random Jitter
♦ Guaranteed 300mV Differential Output at 1.0GHz
♦ +2.375V to +3.8V Supplies for Differential
HSTL/LVPECL
♦ -2.375V to -3.8V Supplies for Differential LVECL
♦ On-Chip Reference for Single-Ended Inputs
♦ Outputs Low for Inputs Open or at V
EE
♦ Pin Compatible with MC100LVE111
MAX9326
1:9 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
________________________________________________________________ Maxim Integrated Products 1
Pin Configurations
Ordering Information
19-2538; Rev 2; 10/02
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Functional Diagram appears at end of data sheet.
MAX9326EQI -40°C to +85°C 28 PLCC
MAX9326EGI -40°C to +85°C 28 QFN 5mm x 5mm
PART TEMP RANGE PIN-PACKAGE
TOP VIEW
V
EE
N.C.
CLK
V
CC
CLK
V
BB
N.C.
Q0
Q1
Q0
26
27
28
1
2
3
4
MAX9326
567891011
Q7
Q8
Q8
PLCC
CC
V
22232425 192021
CC
V
Q2
Q2
Q1
Q3
18
Q3
17
Q4
16
V
15
CC
14
Q4
13
Q5
12
Q5
Q6
Q6
Q7
1
V
EE
2
N.C.
3
CLK
4
V
CC
5
CLK
6
V
BB
7
N.C.
*CORNER PINS AND EXPOSED PAD ARE CONNECTED TO V
Q1
Q0
28272625242322
8
Q8
VCCQ1
Q0
MAX9326
9
1011121314
CC
Q7
Q8
V
QFN*
Q7
Q2
Q2
Q3
21
Q3
20
Q4
19
18
V
CC
17
Q4
16
Q5
15
Q5
Q6
Q6
.
EE
MAX9326
1:9 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
((VCC- VEE) = 2.375V to 3.8V, RL= 50Ω±1% to V
CC
- 2V. Typical values are at (VCC- VEE) = 3.3V, VIH= (VCC- 1V), VIL= (VCC-
1.5V).) (Notes 1–4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC- VEE...............................................................-0.3V to +4.1V
Inputs (CLK, CLK) to V
EE
...........................-0.3V to (V
CC
+ 0.3V)
CLK to CLK ........................................................................±3.0V
Continuous Output Current .................................................50mA
Surge Output Current........................................................100mA
V
BB
Sink/Source Current................................................±0.65mA
Continuous Power Dissipation (T
A
= +70°C)
28-Lead PLCC (derate 10.5mW/°C above +70°C) .....842mW
θ
JA
in Still Air .............................................................+95°C/W
θ
JC
.............................................................................+25°C/W
28-Lead QFN (derate 20.8mW/°C above +70°C) .....1667mW
θ
JA
in Still Air .............................................................+48°C/W
θ
JC
...............................................................................+2°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (CLK, CLK, Q_, Q_) .........................≥2kV
Soldering Temperature (10s) ...........................................+300°C
PARAMETER SYMBOL CONDITIONS
DIFFERENTIAL INPUT (CLK_, CLK_)
Single-Ended
Input High
V
Figure 1
IH
Voltage
-40°C +25°C +85°C
MIN TYP MAX MIN TYP MAX MIN TYP MAX
V
CC
- 1.165
V
V
CC
CC
- 1.165
V
CC
V
CC
- 1.165
V
CC
UNITS
V
Single-Ended
Input Low
Voltage
Differential Input
High Voltage
Differential Input
Low Voltage
Differential Input
V
Voltage
Input Current I
V
V
V
V
IHD
ILD
IHD
ILD
IN
Figure 1 V
IL
Figure 1
Figure 1 V
(V
CC
3.0V, Figure 1
-
(VCC - VEE) ≥
3.0V, Figure 1
V
IH, VIL
V
ILD
- V
, V
EE
) <
IHD
EE
V
EE
+ 1.2
EE
0.095
V
CC
- 1.475
V
CC
V
CC
- 0.095
V
CC
- V
EE
V
EE
V
EE
+ 1.2
V
EE
0.095
V
CC
- 1.475
V
CC
V
CC
- 0.095
V
CC
- V
EE
V
EE
V
EE
+ 1.2
V
EE
0.095
0.095 3.0 0.095 3.0 0.095 3.0
,
-10.0 +150.0 -10.0 +150.0 -10.0 +150.0 µA
VCC
- 1.475
V
CC
V
CC
- 0.095
V
CC
- VEE
V
V
V
V
MAX9326
1:9 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
((VCC- VEE) = 2.375V to 3.8V, RL= 50Ω±1% to V
CC
- 2V. Typical values are at (VCC- VEE) = 3.3V, VIH= (VCC- 1V), VIL= (VCC-
1.5V).) (Notes 1–4)
PARAMETER SYMBOL CONDITIONS
OUTPUT (Q_, QQQQ____)
Single-Ended
Output High
V
OH
Figure 2
Voltage
Single-Ended
Output Low
V
OL
Figure 2
Voltage
Differential
Output Voltage
- VOLFigure 2 535 718 595 749 595 769 mV
V
OH
REFERENCE VOLTAGE OUTPUT (VBB)
Reference
Voltage Output
V
BB
IBB = ±0.5mA
(Note 5)
SUPPLY
Supply Current I
(Note 6) 35 50 39 55 42 65 mA
EE
-40°C +25°C +85°C
MIN TYP MAX MIN TYP MAX MIN TYP MAX
V
- 1.085
V
- 1.810
V
- 1.38
CC
CC
CC
V
CC
- 0.977
V
CC
- 1.695
V
CC
- 1.318
V
CC
- 0.880
V
CC
- 1.620
V
CC
- 1.26
V
CC
- 1.025
V
CC
- 1.810
V
CC
- 1.38
V
CC
- 0.949
V
CC
- 1.697
V
CC
- 1.325
V
CC
- 0.88
V
CC
- 1.62
V
CC
- 1.26
V
CC
- 1.025
V
CC
- 1.810
V
CC
- 1.38
V
CC
- 0.929
V
CC
- 1.698
V
CC
- 1.328
V
CC
- 0.88
V
CC
- 1.62
V
CC
- 1.26
UNITS
V
V
V
MAX9326
1:9 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
4 _______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS–PLCC Package
((VCC- VEE) = 2.375V to 3.8V, RL= 50Ω±1% to V
CC
- 2V, fIN≤ 500MHz, input transition time = 125ps (20% to 80%). Typical values
are at (V
CC
- VEE) = 3.3V, VIH= V(VCC- 1V), VIL= (VCC- 1.5V).) (Note 7)
PARAMETER SYMBOL CONDITIONS
Differential
Input-to-Output
Delay
Single-Ended
Input-to-Output
Delay
t
PLHD
t
PHLD
t
PLH
t
PHL
Figure 2 365 615 375 605 383 653 ps
Figure 3 (Note 8) 350 635 360 685 360 705 ps
-40°C +25°C +85°C
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
Output-toOutput Skew
Part-to-Part
Skew
Added Random
Jitter
Added
Deterministic
Jitter
Switching
Frequency
Output Rise/Fall
Time (20% to
80%)
t
SKOO
t
SKPP
t
t
f
MAX
t
R
(Note 9) 50 50 50 ps
Differential input
(Note 10)
fIN = 0.5GHz
clock pattern
RJ
(Note 11)
fIN = 1.0Gbps,
23
- 1 PRBS
2E
DJ
pattern (Note 11)
OL
≥
1.5 1.5 1.5 GHz
VOH - V
300mV clock
pattern
, tFFigure 2 140 440 140 440 140 440 ps
190 125 240 ps
1.5 1.5 1.5 ps
95 95 95 ps
RMS
P-P