General Description
The MAX9321B low-skew differential receiver/driver is
designed for clock and data distribution. The differential input can be adapted to accept a single-ended
input by connecting the on-chip VBBsupply to an input
as a reference voltage.
The MAX9321B features ultra-low propagation delay
(172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock
buffering or repeating. For interfacing to differential PECL
and LVPECL signals, these devices operate over a +3.0V
to +5.5V supply range, allowing high-performance clock
and data distribution in systems with a nominal 3.3V or
5.0V supply. For differential ECL and LVECL operation,
this device operates from a -3.0V to -5.5V supply.
The MAX9321B is offered in industry-standard 8-pin SO
and TSSOP packages.
Applications
Precision Clock Buffer
Low-Jitter Data Repeater
Features
♦ Improved Second Source of the MC10EP16D
♦ +3.0V to +5.5V Differential PECL/LVPECL
Operation
♦ -3.0V to -5.5V Differential ECL/LVECL Operation
♦ Low 17mA Supply Current
♦ 20ps Part-to-Part Skew
♦ 172ps Propagation Delay
♦ Minimum 300mV Output at 3GHz
♦ Output Low for Open Input
♦ ESD Protection >2kV (Human Body Model)
♦ On-Chip Reference for Single-Ended Input
MAX9321B
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
6
TSSOP/SO
N.C.
1
2
3
4
8
Q
5
V
EE
7
Q
V
CC
MAX9321B
V
BB
D
D
50kΩ
100kΩ
60kΩ
80kΩ
V
CC
Pin Configuration
19-2384; Rev 0; 4/02
Ordering Information
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
*Future product—contact factory for availability.
Figure 1. Switching with Single-Ended Inputs
________________________________________________________________ Maxim Integrated Products 1
PART TEMP RANGE PIN-PACKAGE
MAX9321BESA -40°C to +85°C 8 SO
MAX9321BEUA* -40°C to +85°C 8 TSSOP
D
D
Q
Q
V
IL
V
- V
OH
OL
V
IH
V
(CONNECTED TO D)
V
V
BB
OH
OL
MAX9321B
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC- VEE= 3.0V to 5.5V, outputs loaded with 50Ω ±1% to VCC- 2.0V. Typical values are at VCC- VEE= 5.0V, V
IHD
= VCC- 1V, V
ILD
= VCC- 1.5V, unless otherwise noted.) (Notes 1, 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto VEE.............................................................................6.0V
D or D ...................................................V
EE
- 0.3V to VCC+ 0.3V
D or D with the Other Input Floating ....V
CC
- 5.0V to VCC+ 0.3V
D to D .................................................................................±3.0V
Continuous Output Current .................................................50mA
Surge Output Current........................................................100mA
V
BB
Sink/Source Current .................................................±0.6mA
Continuous Power Dissipation (T
A
+70°C)
8-Pin TSSOP (derate 4.5mW/°C above +70°C) ...........362mW
8-Pin SO (derate 5.9mW/°C above +70°C)..................471mW
Junction-to-Ambient Thermal Resistance in Still Air
8-Pin TSSOP ............................................................+221°C/W
8-Pin SO...................................................................+170°C/W
Junction-to-Ambient Thermal Resistance with
500 LFPM Airflow
8-Pin TSSOP ............................................................+155°C/W
8-Pin SO.....................................................................+99°C/W
Junction-to-Case Thermal Resistance
8-Pin TSSOP ..............................................................+39°C/W
8-Pin SO.....................................................................+40°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (D, D, Q_, Q_) .................................>2kV
Soldering Temperature (10s) ...........................................+300°C
-40°C +25°C +85°C
PARAMETER
CONDITIONS
UNITS
DIFFERENTIAL INPUT (D, D)
Single-Ended
Input High
Voltage
V
IH
VBB connected to D
(V
IL
for V
BB
connected to D),
Figure 1
V
CC
-
1.21
VCC -
1.145
VCC -
1.085
V
Single-Ended
Input Low
Voltage
V
IL
VBB connected to D
(V
IH
for V
BB
connected to D),
Figure 1 (Note 4)
V
EE
VCC -
V
High Voltage of
Differential
Input
VEE +
1.2
VEE +
1.2
VEE +
1.2
V
Low Voltage of
Differential
Input
V
ILD
V
EE
V
EE
V
Differential
Input Voltage
V
IHD
-
V
ILD
0.1 3.0 0.1
0.1
V
Input High
Current
I
IH
µA
VCC - VEE ≤ 3.8V
D Input Low
Current
I
ILD
VCC - VEE ≥ 3.8V
µA
VCC - VEE ≤ 3.8V
D Input Low
Current
I
ILD
VCC - VEE ≥ 3.8V
µA
SYMBOL
MIN TYP MAX MIN TYP MAX MIN TYP MAX
V
IHD
V
CC
V
EE
V
EE
-100 +100 -100 +100 -100 +100
-140 +140 -140 +140 -140 +140
-150 +150 -150 +150 -150 +150
-175 +175 -175 +175 -175 +175
VCC -
VCC -
V
1.61
V
150 150 150
EE
CC
0.1
V
CC
VCC -
1.545
V
CC
VCC -
0.1
3.0
V
CC
1.485
V
CC
VCC -
0.1
3.0
MAX9321B
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC- VEE= 3.0V to 5.5V, outputs loaded with 50Ω ±1% to VCC- 2.0V. Typical values are at VCC- VEE= 5.0V, V
IHD
= VCC- 1V, V
ILD
= VCC- 1.5V, unless otherwise noted.) (Notes 1, 2, 3)
AC ELECTRICAL CHARACTERISTICS
(VCC- VEE= 3.0V to 5.5V, outputs loaded with 50Ω ±1% to VCC- 2V, input frequency ≤ 1.5GHz, input transition time = 125ps (20% to
80%), V
IHD
= VEE+ 1.2V to VCC, V
ILD
= VEEto VCC- 0.15V, V
IHD
- V
ILD
= 0.15V to 3.0V. Typical values are at VCC- VEE= 5V, V
IHD
=
V
CC
- 1V, V
ILD
= VCC- 1.5V, unless otherwise noted.) (Notes 1, 7)
PARAMETER SYMBOL CONDITIONS
DIFFERENTIAL OUTPUT (Q, Q)
Single-Ended
Output High
Voltage
Single-Ended
Output Low
Voltage
Differential
Output Voltage
REFERENCE (VBB)
Reference
Voltage Output
POWER SUPPLY
Supply Current
V
V
V
OH
V
V
I
Figure 1
OH
Figure 1
OL
Figure 1 550 820 550 820 550 820 mV
OL
IBB = ±0.5mA
BB
(Note 5)
(Note 6) 16 24 17 24 18 24 mA
EE
-40°C +25°C +85°C
MIN TYP MAX MIN TYP MAX MIN TYP MAX
V
CC
1.135
V
CC
1.935
V
CC
1.51
-
-
-
VCC -
0.885
VCC -
1.68
VCC -
1.31
VCC -
1.07
VCC -
1.87
VCC -
1.445
VCC -
0.82
VCC -
1.62
VCC -
1.245
VCC -
1.01
VCC -
1.81
VCC -
1.385
V
CC
0.76
VCC -
1.56
VCC -
1.185
-
UNITS
V
V
V
PARAMETER SYMBOL CONDITIONS
Differential
Input-toOutput Delay
Part-to-Part
Skew
Added
Random Jitter
MIN TYP MAX MIN TYP MAX MIN TYP MAX
t
,
PLHD
t
PHLD
t
SKPP
t
Figure 2 145 184 235 145 172 245 130 167 230 ps
(Note 8) 25 90 20 100 20 100 ps
fIN = 1.5GHz, clock
pattern (Note 9)
RJ
fIN = 3.0GHz, clock
pattern (Note 9)
-40°C +25° C +85°C
1.7 2.8 1.7 2.8 1.7 2.8
0.6 1.5 0.6 1.5 0.6 1.5
UNITS
ps
(RMS)
MAX9321B
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
4 _______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC- VEE= 3.0V to 5.5V, outputs loaded with 50Ω ±1% to VCC- 2V, input frequency ≤ 1.5GHz, input transition time = 125ps (20% to
80%), V
IHD
= VEE+ 1.2V to VCC, V
ILD
= VEEto VCC- 0.15V, V
IHD
- V
ILD
= 0.15V to 3.0V. Typical values are at VCC- VEE= 5V, V
IHD
=
V
CC
- 1V, V
ILD
= VCC- 1.5V, unless otherwise noted.) (Notes 1, 7)
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters production tested at T
A
= +25°C. Guaranteed by design and characterization over the full operating temp-
erature range.
Note 4: Maximum differential input voltage limit of ±3V also applies to single-ended use.
Note 5: Use V
BB
as a reference for inputs on the same device only.
Note 6: All pins open except V
CC
and VEE.
Note 7: Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 8: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.
Note 9: Device jitter added to the input signal.
PARAMETER SYMBOL CONDITIONS
Added
Deterministic
Jitter
MIN TYP MAX MIN TYP MAX MIN TYP MAX
3.0Gpbs
t
DJ
23
- 1 PRBS pattern
2
(Note 9)
-40°C +25° C +85°C
57 80 57 80 57 80
UNITS
ps
(
P-P
)
Switching
Frequency
Output Rise/
Fall Time
(20% to 80%)
f
MAX
t
R
VOH - VOL ≥ 300mV,
clock pattern,
Figure 2
VOH - VOL ≥ 550mV,
clock pattern,
Figure 2
, t
Figure 2 65 112 135 65 118 135 65 121 135 ps
F
3.0 3.0 3.0
2.0 2.0 2.0
GHz
MAX9321B
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
_______________________________________________________________________________________ 5
Typical Operating Characteristics
(VCC= 5V, VEE= 0V, input transition time = 125ps (20% to 80%), V
IHD
= VCC- 1V, V
ILD
= VCC- 1.5V, fIN= 1.5GHz, outputs loaded with
50Ω to V
CC
- 2V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT (mA)
SUPPLY CURRENT, I
EE
vs. TEMPERATURE
19
18
17
16
15
14
13
-40 85
TEMPERATURE (°C)
603510-15
0.9
0.8
MAX9321B toc01
0.7
0.6
0.5
0.4
0.3
OUTPUT AMPLITUDE (V)
0.2
0.1
0
OUTPUT AMPLITUDE, VOH - VOL
vs. FREQUENCY
0 3500
FREQUENCY (MHz)
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT, V
190
185
180
t
PLHD
V
- V
IHD
ILD
IHD
= 0.5V
MAX9321B toc04
PROPAGATION DELAY vs. TEMPERATURE
210
200
190
TRANSITION TIME vs. TEMPERATURE
130
125
MAX9321B toc02
120
115
110
105
TRANSITION TIME (ps)
100
95
30002500500 1000 1500 2000
90
-40 85
t
PLHD
t
R
t
F
TEMPERATURE (°C)
MAX9321B toc05
MAX9321B toc03
603510-15
175
170
PROPAGATION DELAY (ps)
165
160
1.2 5.6
t
PHLD
V
(V)
IHD
5.24.84.44.03.63.22.82.42.01.6
180
170
PROPAGATION DELAY (ps)
160
150
-40 85
t
PHLD
TEMPERATURE (°C)
6035-15 10
Detailed Description
The MAX9321B low-skew differential receiver/driver is
designed for clock and data distribution. For interfacing
to differential PECL/LVPECL signals, this device operates over a +3.0V to +5.5V supply range, allowing highperformance clock and data distribution in systems with
a nominal 3.3V or 5V supply. For differential ECL/
LVECL operation, this device operates from a -3.0V to
-5.5V supply.
Inputs
The differential input can be configured to accept a single-ended input. This is accomplished by connecting
the on-chip reference voltage, VBB, to an input as a reference. For example, the differential input is converted
to a noninverting, single-ended input by connecting
VBBto D and connecting the single-ended input to D.
An inverting input is obtained by connecting VBBto D
and connecting the single-ended input to D.
When using the VBBreference output, bypass it with a
0.01µF ceramic capacitor to VCC. If the VBBreference
is not used, it can be left open. The VBBreference can
source or sink 0.5mA. Use VBBonly for an input on the
same device as the VBBreference.
The maximum magnitude of the differential input from D
to D is 3.0V. This limit also applies to the difference
between any reference voltage input and a singleended input.
The differential input has bias resistors that drive the
output to a differential low when the inputs are open.
The inverting input is biased with a 50kΩ pullup to V
CC
and a 100kΩ pulldown to V
EE.
The noninverting input is
biased with an 80kΩ pullup to V
CC
and a 60kΩ pull-
down to VEE.
Specifications for the high and low voltage of the differential input (V
IHD
and V
ILD
) and the differential input
voltage (V
IHD
- V
ILD
) apply simultaneously (V
ILD
cannot
be higher than V
IHD
).
Outputs
Output levels are referenced to VCCand are considered PECL/LVPECL or ECL/LVECL, depending on the
level of the VCCsupply. With VCCconnected to a positive supply and VEEconnected to GND, the output is
PECL/LVPECL. The output is ECL/LVECL when VCCis
connected to GND and VEEis connected to a negative
supply.
A single-ended input of at least VBB±100mV or a differential input of at least ±100mV switches the outputs to
the VOHand VOLlevels specified in the DC Electrical
Characteristics table.
Applications Information
Supply Bypassing
Bypass VCCto VEEwith high-frequency surface-mount
ceramic 0.1µF and 0.01µF capacitors in parallel as
close to the device as possible, with the 0.01µF value
capacitor closest to the device. Use multiple parallel
ground vias for low inductance. When using the V
BB
reference output, bypass it with a 0.01µF ceramic
capacitor to VCC(if the VBBreference is not used, it
can be left open).
Traces
Input and output trace characteristics affect the performance of the MAX9321B. Connect each signal of a differential input or output to a 50Ω characteristic impedance
trace. Minimize the number of vias to prevent impedance
discontinuities. Reduce reflections by maintaining the
50Ω characteristic impedance through connectors and
MAX9321B
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
6 _______________________________________________________________________________________
Pin Description
PIN NAME
1 N.C. No Connection
2 D Noninverting Differential Input. 80kΩ pullup to VCC, 60kΩ pulldown to VEE.
3 D Inverting Differential Input. 50kΩ pullup to VCC and 100kΩ pulldown to VEE.
4V
5VEENegative Supply Voltage
6 Q Inverting Output. Typically terminate with 50Ω resistor to VCC - 2V.
7 Q Noninverting Output. Typically terminate with 50Ω resistor to VCC - 2V.
8V
BB
CC
Reference Output Voltage. Connect to the inverting or noninverting input to provide a reference for singleended operation. When used, bypass with a 0.01µF ceramic capacitor to V
Positive Supply Voltage. Bypass from VCC to VEE with 0.1µF and 0.01µF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
FUNCTION
; otherwise leave open.
CC
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7
© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
MAX9321B
Differential PECL/ECL/LVPECL/LVECL
Receiver/Driver
Figure 2. Differential Transition Time and Propagation Delay Timing Diagram
across cables. Reduce skew within a differential pair by
matching the electrical length of the traces.
Output Termination
Terminate outputs through 50Ω to VCC- 2V or use an
equivalent Thevenin termination. When a single-ended
signal is taken from the differential output, terminate
both outputs. For example, when Q is used as a singleended output, terminate both Q and Q.
Chip Information
TRANSISTOR COUNT: 162
Package Information
For the latest package outline information, go to www.maximic.com/packages.
D
D
Q
Q
(Q) - (Q)
t
PLHD
20%
V
- V
IHD
80%
0V (DIFFERENTIAL)
t
R
ILD
VOH - V
t
PHLD
OL
80%
0V (DIFFERENTIAL)
20%
t
F
V
IHD
V
ILD
V
OH
V
OL
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