MAXIM MAX9315 User Manual

19-2220; Rev 1; 11/04
General Description
The MAX9315 low-skew, 1-to-5 differential driver is designed for clock and data distribution. This device allows selection between two inputs. The selected input is reproduced at five differential outputs. The differential inputs can be adapted to accept a single-ended input by connecting the on-chip VBBsupply to one input as a reference voltage.
The MAX9315 features low output-to-output skew (20ps), making it ideal for clock and data distribution across a backplane or a board. For interfacing to differ­ential HSTL and LVPECL signals, this device operates over a +2.375V to +3.8V supply range, allowing high­performance clock or data distribution in systems with a nominal +2.5V or +3.3V supply. For differential LVECL operation, this device operates with a -2.375V to -3.8V supply.
The MAX9315 is offered in a space-saving 20-pin TSSOP package.
Applications
Precision Clock Distribution Low-Jitter Data Repeater Data and Clock Driver and Buffer Central Office Backplane Clock Distribution DSLAM Backplane Base Station ATE
Features
+2.375V to +3.8V Supply for Differential
HSTL/LVPECL Operation
-2.375V to -3.8V Supply for Differential LVECL
Operation
Two Selectable Differential InputsSynchronous Output Enable/Disable20ps Output-to-Output Skew360ps Propagation DelayGuaranteed 400mV Differential Output at 1.5GHzOn-Chip Reference for Single-Ended InputsInput Biased Low when Left OpenPin Compatible with MC100LVEP14
MAX9315
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
________________________________________________________________ Maxim Integrated Products 1
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
V
CC
EN
V
CC
CLK1Q1
Q1
Q0
QO
TOP VIEW
CLK1
V
BB
CLK0
CLK0Q3
Q3
Q2
Q2
12
11
9
10
SEL
V
EE
Q4
Q4
MAX9315
D
Q
TSSOP
Pin Configuration
Ordering Information
50 50
MAX9315
ZO = 50
Z
O
= 50
RECEIVER
Q_
Q_
VTT = VCC - 2.0V
Typical Application Circuit
EVALUATION KIT
AVAILABLE
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX9315EUP -40°C to +85°C 20 TSSOP
Functional Diagram appears at end of data sheet.
MAX9315
1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC- VEE= 2.375V to 3.8V, outputs loaded with 50±1% to VCC- 2V, SEL = high or low, EN = low, unless otherwise noted. Typical
values are at V
CC
- VEE= +3.3V, V
IHD
= VCC- 1V, V
ILD
= VCC- 1.5V.) (Notes 1, 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VCC- VEE...............................................................................4.1V
Inputs (CLK_, CLK_, SEL, EN)
to V
EE
...........................................(VEE- 0.3V) to (VCC+ 0.3V)
CLK_ to CLK_ ....................................................................±3.0V
Continuous Output Current.................................................50mA
Surge Output Current........................................................100mA
V
BB
Sink/Source Current...............................................±0.65mA
Continuous Power Dissipation (T
A
= +70°C) Single-Layer PC Board
20-Pin TSSOP (derate 7.69mW/°C above +70°C) .......615mW
Multilayer PC Board
20-Pin TSSOP (derate 10.9mW/°C above +70°C) .......879mW
Junction-to-Ambient Thermal Resistance in Still Air
Single-Layer PC Board
20-Pin TSSOP .........................................................+130°C/W
Multilayer PC Board
20-Pin TSSOP ...........................................................+91°C/W
Junction-to-Ambient Thermal Resistance with 500LFPM
Airflow Single-Layer PC Board
20-Pin TSSOP ..........................................................+9.6°C/W
Junction-to-Case Thermal Resistance
20-Pin TSSOP ............................................................+20°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
Human Body Model (Inputs and Outputs).......................≥2kV
Soldering Temperature (10s)...........................................+300°C
PARAMETER
CONDITIONS
UNITS
SINGLE-ENDED INPUTS (SEL, EN)
Input High Voltage
V
IH
VCC -
VCC -
VCC -
V
Input Low Voltage V
IL
VCC -
VCC -
VCC -
V
Input Current I
IN
V
IH(MAX)
, V
IL(MIN)
µA
DIFFERENTIAL INPUTS (CLK_, CLK_)
Single-Ended Input High Voltage (Note 4)
V
IH
VBB connected to CLK_, Figure 1
VCC -
VCC -
VCC -
V
Single-Ended Input Low Voltage (Note 4)
V
IL
VBB connected to CLK_, Figure 1
VCC -
VCC -
VCC -
V
High Voltage of Differential Input
V
IHD
VEE +
VEE +
VEE +
V
Low Voltage of Differential Input
V
ILD
VCC -
VCC -
VCC -
V
SYMBOL
MIN TYP MAX MIN TYP MAX MIN TYP MAX
1.225
V
EE
-500 500 -500 500 -500 500
1.225
V
EE
1.2
V
EE
-40°C +25°C +85°C
V
CC
1.625
V
CC
1.625
V
CC
0.1
1.225
V
EE
1.225
V
EE
1.2
V
EE
V
CC
1.625
V
CC
1.625
V
CC
0.1
1.225
V
EE
1.225
V
EE
1.2
V
EE
V
CC
1.625
V
CC
1.625
V
CC
0.1
MAX9315
1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Driver
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC- VEE= 2.375V to 3.8V, outputs loaded with 50±1% to VCC- 2V, SEL = high or low, EN = low, unless otherwise noted. Typical values are at V
CC
- VEE= +3.3V, V
IHD
= VCC- 1V, V
ILD
= VCC- 1.5V.) (Notes 1, 2, 3)
PARAMETER
CONDITIONS
UNITS
For (VCC - VEE) < +3.0V
VCC -
VCC -
VCC -
Differential Input Voltage
V
IHD
-
V
ILD
For (VCC - VEE) +3.0V
V
Input Current I
IN
µA
OUTPUTS (Q_, Q_)
Single-Ended Output High Voltage
V
OH
Figure 1
V
CC
-
VCC -
VCC -
VCC -
VCC -
VCC -
V
Single-Ended Output Low Voltage
V
OL
Figure 1
V
CC
-
VCC -
VCC -
VCC -
VCC -
VCC -
V
Differential Output Voltage
VOH -
V
OL
Figure 1
mV
REFERENCE
Reference Voltage Output (Note 5)
V
BB
IBB = ±0.5mA
V
CC
-
VCC -
VCC -
VCC -
VCC -
VCC -
V
SUPPLY
Supply Current (Note 6)
I
EE
mA
SYMBOL
VIH, VIL, V
-40°C +25°C +85°C
MIN TYP MAX MIN TYP MAX MIN TYP MAX
0.1
0.1 3.0 0.1 3.0 0.1 3.0
IHD
, V
-150 150 -150 150 -150 150
ILD
1.145
1.945
550 910 550 910 550 910
1.525
V
EE
0.865
1.695
1.325
0.1
1.145
1.945
1.525
V
EE
0.865
1.695
1.325
0.1
1.145
1.945
1.525
V
EE
0.865
1.695
1.325
41 48 45 55 49 65
MAX9315
1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
4 _______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS
(VCC- VEE= 2.375V to 3.8V, outputs loaded with 50±1% to VCC- 2V, input frequency = 1.5GHz, input transition time = 125ps (20% to 80%), SEL = high or low, EN = low, V
IHD
= VEE+ 1.2V to VCC, V
ILD
= VEEto VCC- 0.15V, V
IHD
- V
ILD
= 0.15V to the smaller of 3V or
V
CC
- VEE, unless otherwise noted. Typical values are at VCC- VEE= +3.3V, V
IHD
= VCC- 1V, V
ILD
= VCC- 1.5V.) (Notes 1, 7)
UNITS
PARAMETER
CONDITIONS
ps
Differential Input­to-Output Delay
t
PLHD
,
Figure 2
ps
Output-to-Output Skew (Note 8)
5
ps
Part-to-Part Skew (Note 9)
ps
Added Random Jitter (Note 10)
t
RJ
p s ( RM S )
Added Deterministic Jitter (Note 10)
t
DJ
1.5Gbps 2E23-1 PRBS pattern
ps (p-p)
Switching Frequency
f
MAX
(VOH - VOL) 400mV, Figure 2
GHz
Output Rise/Fall Time (20% to 80%)
Figure 2
ps
Note 1: Measurements are made with the device in thermal equilibrium. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. Note 3: DC parameters production tested at T
A
= +25°C and guaranteed by design over the full operating temperature range.
Note 4: Single-ended input operation using V
BB
is limited to VCC- VEE= 3.0V to 3.8V.
Note 5: Use V
BB
only for inputs that are on the same device as the VBBreference.
Note 6: All pins open except V
CC
and VEE.
Note 7: Guaranteed by design and characterization. Limits are set at ±6 sigma. Note 8: Measured between outputs of the same part at the signal crossing points for a same-edge transition. Note 9: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition. Note 10: Device jitter added to the input signal.
SYMBOL
-40°C +25°C +85°C
MIN TYP MAX MIN TYP MAX MIN TYP MAX
t
PHLD
t
SKOO
t
SKPP
fIN = 1.5GHz clock 0.8 1.2 0.8 1.2 0.8 1.2
tR, t
F
290 400 310 440 300 520
30 20 40 20 50
110 130 220
50 70 50 70 50 70
1.5 1.5 1.5
80 120 90 130 90 145
Loading...
+ 7 hidden pages