MAXIM MAX9270 Technical data

19-5657; Rev 1; 1/11

Gigabit Multimedia Deserializer with Spread

Spectrum and Full-Duplex Control Channel

General Description

The MAX9270 deserializer uses Maxim’s gigabit
multimedia serial link (GMSL) technology. The device
functions the same as the MAX9260 deserializer without
an output enable (ENABLE) pin. Outputs are enabled
or disabled by a register bit. The deserializer pairs with
any GMSL serializer to form a complete digital serial link
for joint transmission of high-speed video, audio, and
control data.

The deserializer accepts a maximum serial payload
data rate of 2.5Gbps for a 15m shielded twisted-pair
(STP) cable. The 24-bit or 32-bit width parallel interface
operates up to a maximum bus clock of 104MHz or
78MHz, respectively. This serial link supports display
panels from QVGA (320 x 240) up to XGA (1280 x 768),
or dual-view WVGA (2 x 854 x 480).

The 24-bit or 32-bit mode handles 21 or 29 bits of data,
along with an I2S input, supporting 4- to 32-bit audio
word lengths and an 8kHz to 192kHz sample rate. The
embedded control channel forms a full-duplex, differen­tial 100kbps to 1Mbps UART link between the serializer
and deserializer. The host electronic control unit (ECU)
or microcontroller (FC) resides either on the serializer (for
video display) or the deserializer (for image sensing). In
addition, the control channel enables ECU/FC control of
peripherals in the remote side of the serial link through
I2C (base mode) or a user-defined full-duplex UART
format (bypass mode).

The channel equalizer extends the link length and
enhances the link reliability. Spread spectrum is avail­able to reduce EMI on the parallel output data signals.
The differential link complies with the ISO 10605 and IEC
61000-4-2 ESD-protection standards.

This device uses a 3.3V core supply and a 1.8V to 3.3V
I/O supply. The device is available in a 56-pin TQFN
package (8mm x 8mm x 0.75mm) with an exposed pad.
Electrical performance is guaranteed over the -40NC to
+105NC automotive temperature range.

Applications

High-Speed Serial-Data Transmission for Display

High-Speed Serial-Data Transmission for Image
Sensing

Automotive Navigation, Infotainment, and Image­Sensing Systems

Features

S Pairs with Any GMSL Serializer
S 2.5Gbps Payload Rate, AC-Coupled Serial Link

with 8b/10b Line Coding

S 24-Bit or 32-Bit Programmable Parallel Output Bus

Supports Up to XGA (1280 x 768) or Dual-View
WVGA (2 x 854 x 480) Panels with 18-Bit or 24-Bit
Color

S 8.33MHz to 104MHz (24-Bit Bus) or 6.25MHz to

78MHz (32-Bit Bus) Parallel Data Rate

S Support Two/Three 10-Bit Camera Links at

104MHz/78MHz Maximum Pixel Clock

S 4-Bit to 32-Bit Word Length, 8kHz to 192kHz I

Audio Channel Supports High-Definition Audio

S Embedded Half-/Full-Duplex Bidirectional Control

Channel (100kbps to 1Mbps)

S Separate Interrupt Signal Supports Touch-Screen

Functions for Display Panels

S Remote-End I
S Line Equalizer Extends Link Length
S Programmable Spread Spectrum on the Parallel

Data Outputs Reduce EMI

S Does Not Require an External Clock
S Auto Data-Rate Detection Allows “On-The-Fly”

Data-Rate Change

S Built-In PRBS Checker for BER Testing
S ISO 10605 and IEC 61000-4-2 ESD Protection
S -40NC to +105NC Operating Temperature Range
S Patent Pending

2

C Master for Peripherals

2

S

Ordering Information

PART TEMP RANGE PIN-PACKAGE

MAX9270GTN/V+

/V denotes an automotive qualified part.

+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.

T = Tape and reel.

Typical Applications Circuit appears at end of data sheet.

-40NC to +105NC

56 TQFN-EP*

MAX9270

_______________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

Gigabit Multimedia Deserializer with Spread
Spectrum and Full-Duplex Control Channel

ABSOLUTE MAXIMUM RATINGS

AVDD to EP ..........................................................-0.5V to +3.9V

DVDD to EP ..........................................................-0.5V to +3.9V

IOVDD to EP .........................................................-0.5V to +3.9V

IN+, IN- to EP .......................................................-0.5V to +1.9V

All Other Pins to EP .............................. -0.5V to (IOVDD + 0.5V)

IN+, IN- Short Circuit to Ground or

Supply .................................................................... Continuous

Continuous Power Dissipation (TA = +70NC)

MAX9270

56-Pin TQFN (derate 47.6mW/NC above +70NC) ....3809.5mW

ESD Protection
Human Body Model (RD = 1.5kI, CS = 100pF)

(IN+, IN-) to EP .............................................................Q8kV

All Other Pins to EP ......................................................Q4kV

PACKAGE THERMAL CHARACTERISTICS (Note 1)

56 TQFN

Junction-to-Ambient Thermal Resistance (ΘJA) ..........21NC/W

Junction-to-Case Thermal Resistance (ΘJC).................1NC/W

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-

layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.

IEC 61000-4-2 (RD = 330I, CS = 150pF)
Contact Discharge

(IN+, IN-) to EP .............................................................Q8kV

Air Discharge

(IN+, IN-) to EP ...........................................................Q10kV

ISO 10605 (RD = 2kI, CS = 330pF)
Contact Discharge

(IN+, IN-) to EP ............................................................Q8kV

Air Discharge

(IN+, IN-) to EP ...........................................................Q20kV

Operating Temperature Range ........................ -40NC to +105NC

Junction Temperature .....................................................+150NC

Storage Temperature Range ............................ -65NC to +150NC

Lead Temperature (soldering, 10s) ................................+300NC

Soldering Temperature (reflow) ......................................+260NC

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

DC ELECTRICAL CHARACTERISTICS

(V

= V

DVDD

TA = -40NC to +105NC, unless otherwise noted. Typical values are at V

SINGLE-ENDED INPUTS (ENABLE, INT, PWDN, SSEN, BWS, ES, DRS, MS, CDS, EQS, DCS)

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I
Input Clamp Voltage V

SINGLE-ENDED OUTPUTS (DOUT_, SD, WS, SCK, PCLKOUT)

High-Level Output Voltage V

Low-Level Output Voltage V

= 3.0V to 3.6V, V

AVDD

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

= 1.7V to 3.6V, RL = 100I Q1% (differential), EP connected to PCB ground (GND),

IOVDD

IH1

IL1

IN1

CL

OH

OL1

= V

DVDD

VIN = 0 to V
ICL = -18mA -1.5 V

IOH = -2mA

IOL = 2mA

IOVDD

V

DCS

V

DCS

V

DCS

V

DCS

= V

= V

= V
= V

GND

IOVDD

GND

IOVDD

AVDD

= V

= 3.3V, TA = +25NC.)

IOVDD

0.65 x

V

IOVDD

-10 +10

V

IOVDD

- 0.3

V

IOVDD

- 0.2

0.35 x

V

IOVDD

0.3

0.2

V

V

FA

V

V

2 ______________________________________________________________________________________

Gigabit Multimedia Deserializer with Spread

Spectrum and Full-Duplex Control Channel

DC ELECTRICAL CHARACTERISTICS (continued)

(V

= V

DVDD

TA = -40NC to +105NC, unless otherwise noted. Typical values are at V

Output Short-Circuit Current I

I2C AND UART I/O, OPEN-DRAIN OUTPUTS (RX/SDA, TX/SCL, ERR, GPIO_, LOCK)

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I

Low-Level Open-Drain Output
Voltage

DIFFERENTIAL OUTPUTS FOR REVERSE CONTROL CHANNEL (IN+, IN-)

Differential High Output Peak
Voltage, (VIN+) - (VIN-)

Differential Low Output Peak
Voltage, (VIN+) - (VIN-)

DIFFERENTIAL INPUTS (IN+, IN-)

Differential High Input Threshold
(Peak), (VIN+) - (VIN-)

Differential Low Input Threshold
(Peak), (VIN+) - (VIN-)

Input Common-Mode Voltage,
((VIN+) + (VIN-))/2

Differential Input Resistance
(Internal)

= 3.0V to 3.6V, V

AVDD

= 1.7V to 3.6V, RL = 100I Q1% (differential), EP connected to PCB ground (GND),

IOVDD

= V

DVDD

AVDD

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

V

IOVDD

3.0V to 3.6V

V

IOVDD

1.7V to 1.9V

V

IOVDD

3.0V to 3.6V

V

IOVDD

DOUT_, SD,
WS, SCK

VO = 0V,
V

= V

DCS

VO = 0V,
V

= V

DCS

GND

IOVDD

1.7V to 1.9V

OS

PCLKOUT

VO = 0V,
V

= V

DCS

VO = 0V,
V

= V

DCS

GND

IOVDD

V

IOVDD

3.0V to 3.6V

V

IOVDD

1.7V to 1.9V

V

IOVDD

3.0V to 3.6V

V

IOVDD

1.7V to 1.9V

IH2

IL2

IN2

V

OL2

V

ROH

V

ROL

V

IDH(P)

V

IDL(P)

V

CMR

VIN = 0 to V

IOVDD

(Note 2)

IOL = 3mA

No high-speed data transmission
(Figure 1)

No high-speed data transmission
(Figure 1)

(Figure 2) 40 90 mV

(Figure 2) -90 -40 mV

R

I

RX/SDA, TX/SCL -110 +1
GPIO, ERR, LOCK

V

= 1.7V to 1.9V 0.4 V

IOVDD

V

= 3.0V to 3.6V 0.3 V

IOVDD

= V

=

=

=

=

=

=

=

=

= 3.3V, TA = +25NC.)

IOVDD

15 25 39

3 7 13

20 35 63

5 10 21

15 33 50

5 10 17

30 54 97

9 16 32

0.7 x

V

IOVDD

-80 +1

30 60 mV

-60 -30 mV

1 1.3 1.6 V

80 100 130

0.3 x

V

IOVDD

MAX9270

mA

V

V

FA

I

_______________________________________________________________________________________ 3

Gigabit Multimedia Deserializer with Spread
Spectrum and Full-Duplex Control Channel

DC ELECTRICAL CHARACTERISTICS (continued)

(V

= V

DVDD

TA = -40NC to +105NC, unless otherwise noted. Typical values are at V

POWER SUPPLY

MAX9270

Worst-Case Supply Current
(Figure 3)

Sleep-Mode Supply Current I
Power-Down Supply Current I

= 3.0V to 3.6V, V

AVDD

= 1.7V to 3.6V, RL = 100I Q1% (differential), EP connected to PCB ground (GND),

IOVDD

DVDD

= V

AVDD

= V

= 3.3V, TA = +25NC.)

IOVDD

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

I

WCS

CCS

CCZ

V

= V

BWS

f

PCLKOUT

V

= V

BWS

f

PCLKOUT

V

= V

BWS

f

PCLKOUT

V

= V

BWS

f

PCLKOUT

V

PWDN

,

GND

= 16.6MHz

,

GND

= 33.3MHz

,

GND

= 66.6MHz

,

GND

= 104MHz

= V

GND

2% spread
spectrum active

Spread spectrum
disabled

2% spread
spectrum active

Spread spectrum
disabled

2% spread
spectrum active

Spread spectrum
disabled

2% spread
spectrum active

Spread spectrum
disabled

113 166

105 155

122 181

110 165

137 211

120 188

159 247

135 214

80 130
19 70

mA

FA
FA

AC ELECTRICAL CHARACTERISTICS

(V

= V

DVDD

TA = -40NC to +105NC, unless otherwise noted. Typical values are at V

PARALLEL CLOCK OUTPUT (PCLKOUT)

Clock Frequency f

Clock Duty Cycle DC t

Clock Jitter t

I2C/UART PORT TIMING

Output Rise Time t

Output Fall Time t

Input Setup Time t
Input Hold Time t

4 ______________________________________________________________________________________

= 3.0V to 3.6V, V

AVDD

= 1.7V to 3.6V, RL = 100I Q1% (differential), EP connected to PCB ground (GND),

IOVDD

DVDD

= V

AVDD

= V

= 3.3V, TA = +25NC.)

IOVDD

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

V

PCLKOUT

J

R

F

SET

HOLD

= V

BWS

V

= V

BWS

V

= V

BWS

V

= V

BWS

HIGH/tT

Period jitter, RMS, spread off, 3.125Gbps,
PRBS pattern, UI = 1/f

30% to 70%, CL = 10pF to 100pF, 1kI
pullup to IOVDD

70% to 30%, CL = 10pF to 100pF, 1kI
pullup to IOVDD

I2C only (Figure 5) 100 ns
I2C only (Figure 5) 0 ns

GND

GND

IOVDD

IOVDD

or t

, V

= V

, V

, V
, V

LOW/tT

DRS

DRS

IOVDD

= V

GND

= V

DRS

DRS

= V

IOVDD

GND

(Figure 4) 40 50 60 %

PCLKOUT

8.33 16.66

16.66 104

6.25 12.5

12.5 78

0.05 UI

20 150 ns

20 150 ns

MHz

Gigabit Multimedia Deserializer with Spread

Spectrum and Full-Duplex Control Channel

AC ELECTRICAL CHARACTERISTICS (continued)

(V

= V

DVDD

TA = -40NC to +105NC, unless otherwise noted. Typical values are at V

SWITCHING CHARACTERISTICS

PCLKOUT Rise-and-Fall Time tR, t

Parallel Data Rise-and-Fall Time
(Figure 6)

Deserializer Delay t

Lock Time t

Power-Up Time t

Reverse Control-Channel Output
Rise Time

Reverse Control-Channel Output
Fall Time

I2S OUTPUT TIMING

WS Jitter t

SCK Jitter t

= 3.0V to 3.6V, V

AVDD

= 1.7V to 3.6V, RL = 100I Q1% (differential), EP connected to PCB ground (GND),

IOVDD

DVDD

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

20% to 80%,
V

= 1.7V to 1.9V

IOVDD

F

20% to 80%,
V

= 3.0V to 3.6V

IOVDD

20% to 80%,
V

= 1.7V to 1.9V

IOVDD

tR, t

F

20% to 80%,
V

= 3.0V to 3.6V

IOVDD

SD

LOCK

PU

t

t

Spread spectrum enabled (Figure 7) 2880
Spread spectrum disabled (Figure 7) 750
Spread spectrum enabled (Figure 8) 1500
Spread spectrum off (Figure 8) 1000
(Figure 9) 2500

No high-speed transmission (Figure 1) 180 400 ns

R

No high-speed transmission (Figure 1) 180 400 ns

F

fWS = 48kHz or

44.1kHz

AJ-WS

tWS = 1/fWS, rising
(falling) edge to
falling (rising) edge
(Note 3)

fWS = 192kHz

nWS = 16 bits,
fWS = 48kHz or 44.1kHz

t

AJ-SCK

= 1/f

SCK

ing edge to rising
edge

SCK

, ris-

nWS = 24 bits,
fWS = 96kHz

nWS = 32 bits,
fWS = 192kHz

= V

AVDD

V

= V

DCS

CL = 10pF

V

= V

DCS

CL = 5pF

V

= V

DCS

CL = 10pF

V

= V

DCS

CL = 5pF

V

= V

DCS

CL = 10pF

V

= V

DCS

CL = 5pF

V

= V

DCS

CL = 10pF

V

= V

DCS

CL = 5pF

= V

IOVDD

GND

IOVDD

GND

IOVDD

GND

IOVDD

GND

IOVDD

,

,

,

,

,

,

,

,

= 3.3V, TA = +25NC.)

0.4 2.2

0.5 2.8

0.25 1.7

0.3 2.0

0.5 3.1

0.6 3.8

0.3 2.2

0.4 2.4

0.4e - 3
x t

0.8e - 3
x t

1.6e - 3
x t

13e - 3

x t

39e - 3

x t

x t

WS

WS

WS

SCK

SCK

0.1

SCK

0.5e - 3
x t

1e - 3
x t

2e - 3
x t

16e - 3

x t

SCK

48e - 3

x t

SCK

0.13

x t

SCK

WS

WS

WS

MAX9270

ns

ns

Bits

Fs

Fs

nsfWS = 96kHz

ns

_______________________________________________________________________________________ 5

Gigabit Multimedia Deserializer with Spread
Spectrum and Full-Duplex Control Channel

AC ELECTRICAL CHARACTERISTICS (continued)

(V

= V

DVDD

TA = -40NC to +105NC, unless otherwise noted. Typical values are at V

Audio Skew Relative to Video

SCK, SD, WS Rise-and-Fall Time tR, t

MAX9270

SD, WS Valid Time Before SCK t

SD, WS Valid Time After SCK t

Note 2: Minimum IIN due to voltage drop across the internal pullup resistor.
Note 3: Rising to rising edge jitter can be twice as large.

Typical Operating Characteristics

(V

= V

DVDD

= 3.0V to 3.6V, V

AVDD

= 1.7V to 3.6V, RL = 100I Q1% (differential), EP connected to PCB ground (GND),

IOVDD

DVDD

= V

AVDD

= V

= 3.3V, TA = +25NC.)

IOVDD

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Video and audio synchronized 3 x tWS4 x t

V

F

20% to 80%

t

= 1/f

SCK

t

SCK

= 1/f

SCK

SCK

= V

DCS

V

= V

DCS

(Figure 11)

(Figure 11)

, CL = 10pF 0.3 3.1 ns

IOVDD

, CL = 5pF 0.4 3.8 ns

GND

0.35

x t

SCK

0.35

x t

SCK

x t

x t

WS

0.5

SCK

0.5

SCK

AVDD

= V

ASK

DVB

DVA

= 3.3V, TA = +25NC, unless otherwise noted.)

IOVDD

µs

ns

ns

vs. PCLKOUT FREQUENCY (24-BIT MODE)

SUPPLY CURRENT

155

ALL EQUALIZER SETTINGS

150

145

140

135

130

125

120

SUPPLY CURRENT (mA)

115

110

105

5 105

PCLKOUT FREQUENCY (MHz)

SUPPLY CURRENT

vs. PCLKOUT FREQUENCY (32-BIT MODE)

180

170

160

150

140

130

SUPPLY CURRENT (mA)

120

110

100

2%, 4% SPREAD

NO SPREAD

5 80

PCLKOUT FREQUENCY (MHz)

vs. PCLKOUT FREQUENCY (32-BIT MODE)

155

ALL EQUALIZER SETTINGS

150

MAX9270 toc01

145

140

135

130

125

120

SUPPLY CURRENT (mA)

115

110

85654525

105

5 80

PCLKOUT FREQUENCY (MHz)

65503520

MAX9270 toc02

vs. PCLKOUT FREQUENCY (24-BIT MODE)

180

170

160

150

140

130

SUPPLY CURRENT (mA)

120

110

100

5 105

OUTPUT POWER SPECTRUM

vs. PCLKOUT FREQUENCY

SUPPLY CURRENT

0

f

= 42MHz

PCLKOUT

-10

MAX9270 toc04

655020 35

0% SPREAD

-20

-30

-40

-50

-60

PCLKOUT OUTPUT POWER (dBm)

-70

-80

2% SPREAD

39 45

PCLKOUT FREQUENCY (MHz)

4% SPREAD

444340 41 42

MAX9270 toc05

FREQUENCY (MHz)

120

100

80

60

40

20

0

0 20

SUPPLY CURRENT

2%, 4% SPREAD

NO SPREAD

856525 45

PCLKOUT FREQUENCY (MHz)

MAXIMUM PCLKIN FREQUENCY vs.

STP CABLE LENGTH (BER < 10

OPTIMUM PE/EQ

SETTINGS

NO PE, EQS = LOW

NO PE, EQS = HIGH

BER CAN BE < 10
CABLE LENGTHS LESS THAN 10m

-12

FOR

CABLE LENGTH (m)

-9

15105

MAX9270 toc03

)

MAX9270 toc06

6 ______________________________________________________________________________________

Gigabit Multimedia Deserializer with Spread

Spectrum and Full-Duplex Control Channel

Pin Configuration

TOP VIEW

DOUT20

DOUT21

EP*

MS

DVDD

DOUT22

28

27

26

25

24

23

22

21

20

19

18

17

16

15

RX/SDA

DOUT23

DOUT24

IOVDD

DOUT25

DOUT26

DOUT27

DOUT28/MCLK

SD

SCK

WS

LOCK

ERR

PWDN

TX/SCL

DOUT12

DOUT11

DOUT10

42 41 40 39 38 37 36 35 34 33 32 31 30 29

DOUT9

43

DOUT8

44

IOVDD

45

DOUT7

46

DOUT6

47

DOUT5

48

DOUT4

49

DOUT3

50

DOUT2

51

52

DOUT1

53

DOUT0

54

SSEN

55

DRS

AVDD

*CONNECT EP TO GROUND PLANE

+

56

1 2 3 4 5 6 7 8 9 10 11 12 13 14

INT

CDS

BWS

DOUT14

DOUT13

ES

GPIO0

PCLKOUT

DOUT15

MAX9270

IN+

AVDD

TQFN

DOUT17

DOUT16

IN-

EQS

DOUT19

DOUT18

DCS

GPIO1

MAX9270

Pin Description

PIN NAME FUNCTION

Bus-Width Select. Parallel output bus-width selection input requires external pulldown

1 BWS

2 INT

3 CDS

4 GPIO0

5 ES

_______________________________________________________________________________________ 7

or pullup resistors. Set BWS = low for 24-bit bus mode. Set BWS = high for 32-bit bus
mode.

Interrupt. Interrupt input requires external pulldown or pullup resistors. A transition on
the INT input of the deserializer toggles the serializer’s INT output.

Control-Direction Selection. Control-link-direction selection input requires external pull­down or pullup resistors. Set CDS = low for FC use on the serializer side of the serial
link. Set CDS = high for FC use on the deserializer side of the serial link.

GPIO0. Open-drain general-purpose input/output with internal 60kI pullup resistors to
IOVDD. GPIO0 is high impedance during power-up and when PWDN = low.

Edge Select. PCLKOUT edge-selection input requires external pulldown or pullup
resistors. Set ES = low for a rising-edge trigger. Set ES = high for a falling-edge trigger.

Gigabit Multimedia Deserializer with Spread
Spectrum and Full-Duplex Control Channel

Pin Description (continued)

PIN NAME FUNCTION

6, 56 AVDD

7, 8 IN+, IN- Differential CML Input +/-. Differential inputs of the serial link.

MAX9270

9 EQS

10 GPIO1

11 DCS

12 MS

3.3V Analog Power Supply. Bypass AVDD to EP with 0.1µF and 0.001µF capacitors as
close as possible to the device with the smallest value capacitor closest to AVDD.

Equalizer Select. Deserializer equalizer-selection input requires external pulldown or
pullup resistors. The state of EQS latches upon power-up or rising edge of PWDN. Set
EQS = low for 10.7dB equalizer boost (EQTUNE = 1001). Set EQS = high for 5.2dB
equalizer boost (EQTUNE = 0100).

GPIO1. Open-drain general-purpose input/output with internal 60kI pullup resistors to
IOVDD. GPIO1 is high impedance during power-up and when PWDN = low.

Drive Current Select. Driver current-selection input requires external pulldown or
pullup resistors. Set DCS = high for stronger parallel data and clock output driv­ers. Set DCS = low for normal parallel data and clock drivers (see the DC Electrical
Characteristics table).

Mode Select. Control-link mode-selection/autostart mode selection input requires
external pulldown or pullup resistors. MS sets the control-link mode when CDS = high
(see the Control-Channel and Register Programming section). Set MS = low to select
base mode. Set MS = high to select the bypass mode. MS sets autostart mode when
CDS = low (see Tables 13 and 14).

13 DVDD

14 RX/SDA

15 TX/SCL

16

17

18 LOCK

19 WS Word Select. I2S word-select output.
20 SCK Serial Clock. I2S serial-clock output

21 SD

PWDN

ERR

3.3V Digital Power Supply. Bypass DVDD to EP with 0.1FF and 0.001FF capacitors as
close as possible to the device with the smaller value capacitor closest to DVDD.

Receive/Serial Data. UART receive or I2C serial-data input/output with internal 30kI
pullup to IOVDD. In UART mode, RX/SDA is the Rx input of the deserializer’s UART. In
I2C mode, RX/SDA is the SDA input/output of the serializer’s I2C master.

Transmit/Serial Clock. UART transmit or I2C serial-clock output with internal 30kI
pullup to IOVDD. In UART mode, TX/SCL is the Tx output of the serializer’s UART. In
I2C mode, TX/SCL is the SCL output of the deserializer’s I2C master.

Power-Down. Active-low power-down input requires external pulldown or pullup resis­tors.

Error. Active-low open-drain video data error output with internal pullup to IOVDD.
ERR goes low when the number of decoding errors during normal operation exceed a
programmed error threshold or when at least one PRBS error is detected during PRBS
test. ERR is high impendence when PWDN = low.

Open-Drain Lock Output with Internal Pullup to IOVDD. LOCK = high indicates PLLs
are locked with correct serial-word-boundary alignment. LOCK = low indicates PLLs
are not locked or incorrect serial-word-boundary alignment. LOCK remains low when
the configuration link is active. LOCK is high impedance when PWDN = low.

Serial Data. I2S serial-data output. Disable I2S to use SD as an additional data output
latched on the selected edge of PCLKOUT.

8 ______________________________________________________________________________________

Gigabit Multimedia Deserializer with Spread

Spectrum and Full-Duplex Control Channel

Pin Description (continued)

PIN NAME FUNCTION

DOUT28/MCLK,

DOUT27, DOUT26,

22–25, 27–35,

37–44, 46–53

26, 45 IOVDD

36 PCLKOUT Parallel Clock Output. Used for DOUT0–DOUT28.

54 SSEN

55 DRS

— EP

DOUT25,

DOUT24–DOUT16,

DOUT15–DOUT8,

DOUT7–DOUT0

Data Output[0:28]. Parallel data outputs. Output data can be strobed on the selected
edge of PCLKOUT. Set BWS = low (24-bit mode) to use DOUT0–DOUT20 (RGB and
SYNC). DOUT21–DOUT28 are not used in 24-bit mode and are set to low. Set BWS =
high (32-bit mode) to use DOUT0–DOUT28 (RGB, SYNC, and two extra outputs).
DOUT28 can be used to output MCLK (see the Additional MCLK Output for Audio
Applications section).

1.8V to 3.3V Logic I/O Power Supply. Bypass IOVDD to EP with 0.1FF and 0.001FF
capacitors as close as possible to the device with the smaller value capacitor closest
to IOVDD.

Spread-Spectrum Enable. Parallel output spread-spectrum enable input requires
external pulldown or pullup resistors. The state of SSEN latches upon power-up or
when resuming from power-down mode (PWDN = low). Set SSEN = high for Q2%
spread spectrum on the parallel outputs. Set SSEN = low to use the parallel outputs
without spread spectrum.

Data-Rate Select. Data-rate range-selection input requires external pulldown or pullup
resistors. Set DRS = high for parallel input data rates of 8.33MHz to 16.66MHz (24-bit
mode) or 6.25MHz to 12.5MHz (32-bit mode). Set DRS = low for parallel input data
rates of 16.66MHz to 104MHz (24-bit mode) or 12.5MHz to 78MHz (32-bit mode).

Exposed Pad. EP functions as the IC’s ground connection. MUST connect EP to the
ground plane to maximize thermal and electrical performance.

MAX9270

_______________________________________________________________________________________ 9

Gigabit Multimedia Deserializer with Spread
Spectrum and Full-Duplex Control Channel

Functional Diagram

LFLT

MAX9270

PCLKIN

DIN[N:0]

WS, SD, SCK

TX/SCL

RX/SDA

PCLKOUT

DOUT[N:0]

AUDIO

FIFO

FIFO

FIFO

PRBS

GEN

FILTER

PLL

CLKDIV

8b/10b

ENCODE

PARITY

UART/I2C

GMSL SERIALIZER

SPREAD

PLL

CLKDIV

8b/10b

DECODE

PARITY

SPREAD

PLL

P S

CDR
PLL

P S

LINE-

FAULT

CML

TERM

REV CH

Rx

CML

DET

Tx

EQ

Rx

LMN0

LMN1

OUT+

OUT-

STP CABLE

= 50)

(Z

0

WS, SD, SCK

TX/SCL

RX/SDA

AUDIO

FIFO

PRBS

CHECK

UART/I2C

TERM

MAX9270

REV CH

Tx

DESERIALIZER

IN-

IN+

10 _____________________________________________________________________________________