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MAX9257A
User Manual
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MAXIM MAX9257A, MAX9258A User Manual

E V A L U A T I O N K IT A V A I L A B L E
19-5891; Rev 1; 9/11
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

General Description

The MAX9257A serializes 10, 12, 14, 16, and 18 bits with the addition of two encoding bits for AC-coupling. The MAX9258A deserializer links with the MAX9257A to deseri alize a maximum of 20 (data + encoding) bits per pixel/parallel clock period for a maximum serial-data rate of 840Mbps. The word length can be adjusted to accom­modate a higher pixel/parallel clock frequency. The pixel clock can vary from 5MHz to 70MHz, depend ing on the serial-word length. Enabling parity adds two parity bits to the serial word. The encoding bits reduce ISI and allow AC-coupling.
The MAX9258A receives programming instructions from the electronic control unit (ECU) during the control channel and transmits to the MAX9257A over the serial video link. The instructions can program or update the MAX9257A, MAX9258A, or an external peripheral device, such as a camera. The MAX9257A communicates with the peripheral device with I2C or UART.
The devices operate from a +3.3V core supply and fea­ture separate supplies for interfacing to +1.8V to +3.3V logic levels. These devices are avail able in 40-lead TQFN or 48-pin LQFP packages. These devices are specified over the -40NC to +105NC temper ature range.

Features

S 10/12/14/16/18-Bit Programmable Parallel Data
Width
S MAX9258A Does Not Require Reference Clock
S Parity Protection for Video and Control Channels
S Programmable Spread Spectrum
S Programmable Rising or Falling Edge for HSYNC,
VSYNC, and Clock
S Up to 10 Remotely Programmable GPIO on
MAX9257A
S Automatic Resynchronization in Case of Loss of
Lock
S MAX9257A Parallel Clock Jitter Filter PLL with
Bypass
S DC-Balanced Coding Allows AC-Coupling
S Levels of Preemphasis for Up to 20m STP Cable
Drive
S Integrity Test Using On-Chip Programmable PRBS
Generator and Checker
S LVDS I/O Meet ISO 10605 ESD Protection (±10kV
Contact and ±30kV Air Discharge)
S LVDS I/O Meet IEC 61000-4-2 ESD Protection
(±8kV Contact and ±20kV Air Discharge)
S LVDS I/O Meet ±200V Machine Model ESD
Protection
S -40NC to +105NC Operating Temperature Range
S Space-Saving, 40-Pin TQFN (5mm x 5mm) with
Exposed Pad or 48-Pin LQFP Packages
S 3.3V Core Supply and 1.8V to 3.3V I/O Supply

Applications

Ordering Information appears at end of data sheet.
Automotive Cameras
Industrial Cameras
Navigation Systems Display
In-Vehicle Entertainment Systems
����������������������������������������������������������������� Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Typical Operating Circuit and Pin Configurations appear at end of data sheet.
For related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX9257A.related.
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

ABSOLUTE MAXIMUM RATINGS

V
to GND ........................................................-0.5V to +4.0V
CC_
Any Ground to Any Ground .................................-0.5V to +0.5V
SDI+, SDI-, SDO+, SDO- to GND ........................-0.5V to +4.0V
SDO+, SDO- Short Circuit to GND or V DIN[0:15], GPIO[0:9], PCLK_IN, HSYNC_IN, VSYNC_IN,
SCL/TX, SDA/RX, REM to GND ......... -0.5V to (V
DOUT[0:15], PCLK_OUT, CCEN, HSYNC_OUT,
VSYNC_OUT, RX, LOCK, TX, PD,
ERROR to GND ..............................-0.5V to (V
Continuous Power Dissipation (TA = +70NC) 40-Lead TQFN
Multilayer PCB (derate 35.7mW/NC above +70NC) ...2857mW 48-Lead LQFP
Multilayer PCB (derate 21.7mW/NC above +70NC) ...1739mW ESD Protection
Human Body Model (RD = 1.5kI, CS = 100pF)
All Pins to GND ............................................................Q3kV
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera­tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
CCLVDS
.......Continuous
+ 0.5V)
CCIO
+ 0.5V)
CCOUT
IEC 61000-4-2 (RD = 330I, CS = 150pF)
Contact Discharge
(SDI+, SDI-, SDO+, SDO-) to GND ..............................Q8kV
Air Discharge
(SDI+, SDI-, SDO+, SDO-) to GND ............................Q20kV
ISO 10605 (RD = 2kI, CS = 330pF)
Contact Discharge
(SDI+, SDI-, SDO+, SDO-) to GND ............................Q10kV
Air Discharge
(SDI+, SDI-, SDO+, SDO-) to GND ............................Q30kV
Machine Model (RD = 0I, CS = 200pF)
All Pins to GND ......................................................... Q200V
Storage Temperature Range ............................ -65NC to +150NC
Junction Temperature .....................................................+150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
PACKAGE THERMAL CHARACTERISTICS (Note 1)
Junction-to-Ambient Thermal Resistance (qJA)
40-Pin TQFN ................................................................28NC/W
48-Pin LQFP ................................................................46NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Junction-to-Case Thermal Resistance (qJC)
40-Pin TQFN ...............................................................1.7NC/W
48-Pin LQFP ................................................................10NC/W

MAX9257A DC ELECTRICAL CHARACTERISTICS

(V
= +3.0V to +3.6V, V
CC_
at V
= +3.3V, TA = +25NC.) (Notes 2, 3)
CC_
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SINGLE-ENDED INPUTS
High-Level Input Voltage
Low-Level Input Voltage V
= +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are
CCIO
V
= +1.71V to +3V
CCIO
V
IH
IL
= +3V to +3.6V 2
CCIO
REM input 2
V
= +1.71V to +3V 0
CCIO
V
= +3V to +3.6V 0 0.8
CCIO
REM input 0 0.8
0.65 x V
CCIO
V
CCIO
V
CCIO
VCC +
V
+
0.3
+
0.3
0.3
0.3 x
CCIO
VV
V
����������������������������������������������������������������� Maxim Integrated Products 2
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9257A DC ELECTRICAL CHARACTERISTICS (continued)
(V
= +3.0V to +3.6V, V
CC_
at V
= +3.3V, TA = +25NC.) (Notes 2, 3)
CC_
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Current I
Input Clamp Voltage V
SINGLE-ENDED OUTPUTS
High-Level Output Voltage V
Low-Level Output Voltage V
Output Short-Circuit Current I
I2C/UART I/O
Input Leakage Current I
High-Level Input Voltage SDA/RX V
Low-Level Input Voltage SDA/RX V
Low-Level Output Voltage SCL, SDA
LVDS OUTPUTS (SDO+, SDO-)
Differential Output Voltage V
Change in VOD Between Complementary Output States
Common-Mode Voltage V
Change in VOS Between Complementary Output States
Output Short-Circuit Current I
Magnitude of Differential Output Short-Circuit Current
CONTROL CHANNEL TRANSCEIVER
Differential Output Voltage V
Input Hysteresis (Figure 2)
= +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are
CCIO
IN
CL
VIN = 0 to V
VIN = 0 to V
ICL = -18mA -1.5 V
CCIO
REM input -20 +20
CC,
IOH = -100FA
OH
IOH = -2mA
IOL = 100FA
OL
OS
ILKG
IH2
IL2
V
OL2
OD
DV
OS
DV
OS
I
OSD
OD
VHYST+
V
HYST-
IOL = 2mA 0.3
V
= +1.71V to +3V -40 -4
CCIO
V
= +3V to +3.6V -50 -10
CCIO
V
= +1.71V to +3V 4 40
CCIO
V
= +3V to +3.6V 10 50
CCIO
CCIO
OD
Shorted to GND
Shorted to V
VI = V
R
PULLUP
CCIO
CCIO
= 1.6kI to V
Preemphasis off (Figure 1)
OS
V
or V
SDO+
V
= 0V 15 mA
OD
= 0 or 3.6V -15 +15 mA
SDO-
Differential low-to-high threshold 25 90 165
Differential high-to-low threshold -25 -90 -165
-20 +20
V
-
CCIO
0.1
V
-
CCIO
0.35
0.1
-1 +1
0.7 x
V
CCIO
0.3 x
V
CCIO
0.4 V
250 350 460 mV
25 mV
1.050 1.25 1.375 V
30 mV
250 350 460 mV
FA
V
V
mA
FA
V
V
mV
����������������������������������������������������������������� Maxim Integrated Products 3
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9257A DC ELECTRICAL CHARACTERISTICS (continued)
(V
= +3.0V to +3.6V, V
CC_
at V
= +3.3V, TA = +25NC.) (Notes 2, 3)
CC_
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
Worst-Case Supply Current (Figure 3) CL = 8pF, 12 bits
Sleep Mode Supply Current I
= +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are
CCIO
Q2% spread, preemphasis off, PRATE = 60MHz, SRATE = 840Mbps
No spread, preemphasis off, PRATE = 60MHz, SRATE = 840Mbps
No spread, preemphasis = 20%, PRATE = 60MHz, SRATE = 840Mbps
No spread, preemphasis = 60%, PRATE = 60MHz, SRATE = 840Mbps
No spread, preemphasis = 100%, PRATE = 60MHz, SRATE = 840Mbps
Q2% spread, preemphasis off, PRATE = 28.57MHz, SRATE = 400Mbps
No spread, preemphasis off, PRATE = 28.57MHz, SRATE = 400Mbps
No spread, preemphasis = 100%, PRATE = 28.57MHz, SRATE = 400Mbps
I
CCW
CCS
Q2% spread, preemphasis off, PRATE = 14.29MHz, SRATE = 200Mbps
No spread, preemphasis off, PRATE = 14.29MHz, SRATE = 200Mbps
No spread, preemphasis = 100%, PRATE = 14.29MHz, SRATE = 200Mbps
Q2% spread, preemphasis off, PRATE = 7.14MHz, SRATE = 100Mbps
No spread, preemphasis off, PRATE = 7.14MHz, SRATE = 100Mbps
No spread, preemphasis = 100%, PRATE = 7.14MHz, SRATE = 100Mbps
Q2% spread, preemphasis off, PRATE = 5MHz, SRATE = 70Mbps
No spread, preemphasis off, PRATE = 5MHz, SRATE = 70Mbps
No spread, preemphasis = 100%, PRATE = 5MHz, SRATE = 70Mbps
Sleep mode 92
102 138
101 130
102 135
111
113 139
80 104
79 100
88 111
56 74
55 72
61 78
45 59
44 57
47 61
34 45
34 44
36 47
137
mA
FA
����������������������������������������������������������������� Maxim Integrated Products 4
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

MAX9257A AC ELECTRICAL CHARACTERISTICS

(V
= +3.0V to +3.6V, V
CC_
at V
= +3.3V, TA = +25NC.) (Notes 5, 9)
CC_
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PCLK�IN TIMING REQUIREMENTS
Clock Period t
Clock Frequency f
Clock Duty Cycle DC t
Clock Transition Time tR, t
SWITCHING CHARACTERISTICS
LVDS Output Rise Time t
LVDS Output Fall Time t
Control Transceiver Transition Time
Input Setup Time t
Input Hold Time t
Parallel-to-Serial Delay
PLL Lock Time t
Random Jitter t
Deterministic Jitter t
SCL/TX, SDA/RX
Rise Time t
Fall Time t
Pulse Width of Spike Suppressed in SDA
Data Setup Time t
Data Hold Time t
= +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are
CCIO
T
1/t
T
or t
HIGH/tT
(Figure 7) 4 ns
F
20% to 80% (Figure 4) 315 370 ps
R
20% to 80% (Figure 4) 315 370 ps
F
, t
F1A
20% to 80% (Figure 16)
F2
, t
F1B
(Figure 5) 0 ns
S
(Figure 5) 3 ns
H
LOW/tT
Spread off (Figure 6)
Q4% spread
Combined FPLL and SPLL; PCLK_IN stable
420MHz LVDS output, spread off, FPLL = bypassed
18
2
- 1 PRBS, SRATE = 840Mbps, 18 bits,
no spread
0.3 x V V
CCIO
0.7 x V
to 0.7 x
CCIO
, CL = 30pF
to 0.3 x V
CCIO
CCIO, CL
t
R1A
t
R1B
CLK
t
PSD1
t
PSD2
LOCK
RJ
DJ
RS
FS
95kbps to 400kbps 100
t
SPK
400kbps to 1000kbps 50
1000kbps to 4250kbps 10
DC to 10Mbps (bypass mode) 10
400kbps 100
SETUP
4.25Mbps, CL = 10pF 60
400kbps 100
HOLD
4.25Mbps, CL = 10pF 0
MAX9257A/MAX9258A
14.28 200.00 ns
5 70 MHz
35 50 65 %
642 970 1390
810 1140 1420
290 386 490
(4.55 x t
(36.55 x t
32,768
R
R
PULLUP
PULLUP
= 10kI
= 1.6kI
= 30pF 40 ns
+ 11
+ 11
x t
T
12
142 ps (P-P)
400
60
pstR2, t
T)
ns
T)
ns
ps
(RMS)
ns
ns
ns
ns
����������������������������������������������������������������� Maxim Integrated Products 5
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9257A AC ELECTRICAL CHARACTERISTICS (continued)
(V
= +3.0V to +3.6V, V
CC_
at V
= +3.3V, TA = +25NC.) (Notes 5, 9)
CC_
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
I2C TIMING (Note 8)
Maximum SCL Clock Frequency f
Minimum SCL Clock Frequency f
Start Condition Hold Time t
Low Period of SCL Clock t
High Period of SCL Clock t
Repeated START Condition Setup Time
Data Hold Time t
Data Setup Time t
Setup Time for STOP Condition t
Bus Free Time t
= +1.71V to +3.6V, RL = 50I Q1%, TA = -40NC to +105NC, unless otherwise noted. Typical values are
CCIO
SCL
SCL
HD:STA
LOW
HIGH
t
SU:STA
HD:DAT
SU:DAT
SU:STO
BUF
(Figure 30) 0.6
(Figure 30) 1.1
(Figure 30) 0.6
(Figure 30) 0.5
(Figure 30) 0 0.9
(Figure 30) 100 ns
(Figure 30) 0.5
(Figure 30) 1.1
4.25 MHz
95 kHz
Fs
Fs
Fs
Fs
Fs
Fs
Fs

MAX9258A DC ELECTRICAL CHARACTERISTICS

(V
= +3.0V to +3.6V, V
CC_
mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at V = 0.2V, VCM = 1.2V, TA = +25NC) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SINGLE-ENDED INPUTS
High-Level Input Voltage V
Low-Level Input Voltage V
Input Current I
Input Clamp Voltage V
= +1.71V to +3.6V, RL = 50I Q1%, differential input voltage |VID| = 0.05V to 1.2V, input common-
CCIO
0.65 x
V
CCOUT
-20 +20
IN
CL
V
IH
V
V
IL
V
VIN = 0 to V
ICL = -18mA -1.5 V
= +1.71V to +3V
CCOUT
= +3V to +3.6V 2.0
CCOUT
= +1.71V to +3V 0
CCOUT
= +3V to +3.6V 0 0.8
CCOUT
CCOUT
TXIN -60 +60
PD
= +3.3V, |VID|
CC_
V
CCOUT
+ 0.3
V
CCOUT
+ 0.3
0.3 x
V
CCOUT
V
V
FA
����������������������������������������������������������������� Maxim Integrated Products 6
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9258A DC ELECTRICAL CHARACTERISTICS (continued)
(V
= +3.0V to +3.6V, V
CC_
mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at V = 0.2V, VCM = 1.2V, TA = +25NC) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SINGLE-ENDED OUTPUTS
High-Level Output Voltage V
Low-Level Output Voltage V
High-Impedance Output Current I
Output Short-Circuit Current I
OPEN-DRAIN OUTPUTS
Output Low Voltage V
Leakage Current I
LVDS INPUTS (SDI+, SDI-)
Differential Input High Threshold V
Differential Input Low Threshold V
Input Current I
Power-Off Input Current I
Activity-Detector Input Offset V
CONTROL CHANNEL TRANSCEIVER
Differential Output Voltage V
Input Hysteresis (Figure 2)
= +1.71V to +3.6V, RL = 50I Q1%, differential input voltage |VID| = 0.05V to 1.2V, input common-
CCIO
V
IOH = -100FA
OH
IOH = -2mA
OL
OZ
OS
OL
LEAK
IN+, IIN-
INO+, IINO-VCC_
OFFSET
OD
V
HYST+
V
HYST-
IOL = 100FA
IOL = 2mA 0.3
PD = low, VO = 0 to V
VO = 0V (Note 4)
PCLK_OUT, VO = 0V
V
CCOUT
V
CCOUT
VO = 0V or V
TH
TL
ACTOFFSET = 00 23
ACTOFFSET = 01 11
ACTOFFSET = 10 59
ACTOFFSET = 11 75
Differential low-to-high threshold 25 90 165
Differential high-to-low threshold -25 -90 -165
CCOUT
V
V
V
V
= +3V, IOL = 6.4mA 0.55
= +1.71V, IOL = 1.95mA 0.3
CCOUT
= 0 or open -70 +70
= +1.71V to +3V -4 -44
CCOUT
= +3V to +3.6V -16 -65
CCOUT
= +1.71V to +3.6V -5 -55.1
CCOUT
= +3V to +3.6V -22 -80
CCOUT
CCOUT
- 0.1
V
CCOUT
-0.35
-1 +1
-50 mV
-60 +60
250 460 mV
= +3.3V, |VID|
CC_
0.1
1
50 mV
V
V
FA
mA
V
FA
FA
FA
mV
mV
����������������������������������������������������������������� Maxim Integrated Products 7
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9258A DC ELECTRICAL CHARACTERISTICS (continued)
(V
= +3.0V to +3.6V, V
CC_
mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at V = 0.2V, VCM = 1.2V, TA = +25NC) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
Worst-Case Supply Current CL = 8pF, 12 bits (Figure 8)
Power-Down Supply Current I
= +1.71V to +3.6V, RL = 50I Q1%, differential input voltage |VID| = 0.05V to 1.2V, input common-
CCIO
I
CCW
CCZ
Q4% spread, PRATE = 60MHz, SRATE = 840Mbps
Spread off, PRATE = 60MHz, SRATE = 840Mbps
Q4% spread, PRATE = 28.57MHz, SRATE = 400Mbps
Spread off, PRATE = 28.57MHz, SRATE = 400Mbps
Q4% spread, PRATE = 14.29MHz, SRATE = 200Mbps
Spread off, PRATE = 14.29MHz, SRATE = 200Mbps
Q4% spread, PRATE = 5MHz, SRATE = 70Mbps
Spread off, PRATE = 5MHz, SRATE = 70Mbps
PD = low
95 135
80 120
67 102
57
55 82
46 67
42 57
34 49
10 50
= +3.3V, |VID|
CC_
84
mA
FA

MAX9258A AC ELECTRICAL CHARACTERISTICS

(V
= +3.0V to +3.6V, V
CC_
common-mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at V +3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25NC) (Notes 5, 6 and 7)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SWITCHING CHARACTERISTICS
Output Transition Time t
Output Transition Time, PCLK_OUT
Output Transition Time t
Output Transition Time, PCLK_OUT
Control Channel Transition Time
Control Channel Transition Time t
PCLK_OUT High Time t
PCLK_OUT Low Time t
����������������������������������������������������������������� Maxim Integrated Products 8
= +1.71V to +3.6V, RL = 50I Q1%, CL = 8pF, differential input voltage |VID| = 0.1V to 1.2V, input
CCIO
R, tF
t
R, tF
R, tF
t
R, tF
t
R1A, tF1A,
t
R1B, tF1B
R2, tF2
HIGH
LOW
(Figure 9) 0.7 2.2 ns
(Figure 9) 0.5 1.5 ns
V
V
(Figure 16) 0.5 1.2 ns
(Figure 16) 0.6 1.3 ns
(Figure 10) 0.4 x t
(Figure 10) 0.4 x t
= 1.71V (Figure 9) 1.0 2.8 ns
CCOUT
= 1.71V (Figure 9) 0.7 2.2 ns
CCOUT
T
T
0.6 x t
0.6 x t
T
T
CC_
ns
ns
=
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9258A AC ELECTRICAL CHARACTERISTICS (continued)
(V
= +3.0V to +3.6V, V
CC_
common-mode voltage VCM = |VID/2| to VCC - |VID/2|, TA = -40NC to +105NC, unless otherwise noted. Typical values are at V +3.3V, |VID| = 0.2V, VCM = 1.2V, TA = +25NC) (Notes 5, 6 and 7)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Data Valid Before PCLK_ OUT t
Data Valid After PCLK_OUT t
Serial-to-Parallel Delay
Power-Up Delay t
Power-Down to High Impedance t
Jitter Tolerance t
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except VTH and VTL.
Note 3: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at TA = +105NC.
Note 4: One output at a time. Note 5: AC parameters are guaranteed by design and characterization, and are not production tested. Note 6: CL includes probe and test jig capacitance. Note 7: tT is the period of the PCLK_OUT. Note 8: For high-speed mode timing, see the Detailed Description section. Note 9: I2C timing parameters are specified for fast-mode I2C. Max data rate = 400kbps.
= +1.71V to +3.6V, RL = 50I Q1%, CL = 8pF, differential input voltage |VID| = 0.1V to 1.2V, input
CCIO
DVB
DVA
t
SPD1
t
SPD2
PUD
PDD
(Figure 11) 0.35 x t
(Figure 11) 0.35 x t
Spread off (Figure 14) 8t
Q4% spread
T
T
T
40t
T
(Figure 12) 100 ns
(Figure 13) 100 ns
Each half of the UI, 12 bit,
JT
SRATE = 840Mbps, PRBS
No spread 0.25 0.30 UI
pattern (Figure 15)
CC_
ns
ns
ns
=
(V
= +3.3V, RL = 50O, CL = 8pF, TA = +25NC, unless otherwise noted.)
CC_
MAX9257A SUPPLY CURRENT
MAX9257A SUPPLY CURRENT
vs. FREQUENCY
120
PRBS PATTERN 18-BIT
100
100% PREEMPHASIS
80
60
40
SUPPLY CURRENT (mA)
20
0
5 45
NO PREEMPHASIS
20 4025 3515 3010
PCLK FREQUENCY (MHz)
140
120
MAX9257A/58A toc01
100
80
60
SUPPLY CURRENT (mA)
40
20
0
PRBS PATTERN 10-BIT
100% PREEMPHASIS
5 7535 6525
����������������������������������������������������������������� Maxim Integrated Products 9

Typical Operating Characteristics

vs. FREQUENCY
NO PREEMPHASIS
5515 45
PCLK FREQUENCY (MHz)
120
100
MAX9257A/58A toc02
80
60
40
SUPPLY CURRENT (mA)
20
0
MAX9258A SUPPLY CURRENT
vs. FREQUENCY
PRBS PATTERN 18-BIT
4% SPREAD
5 452520 30
PCLK FREQUENCY (MHz)
MAX9257A/58A toc03
NO SPREAD
4010 3515
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
Typical Operating Characteristics (continued)
(V
= +3.3V, RL = 50O, CL = 8pF, TA = +25NC, unless otherwise noted.)
CC_
MAX9258A SUPPLY CURRENT
vs. FREQUENCY
120
PRBS PATTERN 10-BIT
100
80
60
4% SPREAD
SERIAL LINK SWITCHING PATTERN WITHOUT
PREEMPHASIS (BIT RATE = 840MHz, 2m STP CABLE)
MAX9257A/58A toc04
MAX9257A/MAX9258A
SERIAL LINK SWITCHING PATTERN WITH
PREEMPHASIS (BIT RATE = 840MHz, 2m STP CABLE)
MAX9257A/58A toc05
(PREEMPHASIS = 100%)
MAX9257A/58A toc06
40
SUPPLY CURRENT (mA)
20
0
5 452520 30
PCLK FREQUENCY (MHz)
MAX9257A OUTPUT POWER
SPECTRUM vs. PCLK FREQUENCY
20
10kHz BW
10
4% SPREAD
0
-10
-20
-30
-40
-50
-60
OUTPUT POWER SPECTRUM (dBm)
-70
-80 18 2220
PCLK FREQUENCY (MHz)
900
NO SPREAD
4010 3515
NO SPREAD
2% SPREAD
2119
20
0
MAX9257A/58A toc07
-20
-40
-60
OUTPUT POWER SPECTRUM (dBm)
-80
BIT ERROR RATE (< 10-9) vs.
CABLE LENGTH
MAX9257A OUTPUT POWER
SPECTRUM vs. PCLK FREQUENCY
10kHz BW
1.5% SPREAD
38 4642
PCLK FREQUENCY (MHz)
NO SPREAD
2% SPREAD
4440
900
MAX9258A OUTPUT POWER
SPECTRUM vs. PCLK FREQUENCY
20
10kHz BW
4% SPREAD
MAX9257A/58A toc08
0
-20
-40
-60
OUTPUT POWER SPECTRUM (dBm)
-80 38 4642
BIT ERROR RATE (< 10-9) vs.
CABLE LENGTH
NO SPREAD
2% SPREAD
MAX9257A/58A toc09
4440
PCLK FREQUENCY (MHz)
800
NO SPREAD STP CABLE
700
600
SERIAL-DATA RATE (Mbps)
500
BER CAN BE AS LOW AS 10 CABLE LENGTHS LESS THAN 10m.
400
0 862 4 10 12 14 16 18 20
100% PREEMPHASIS
NO PREEMPHASIS
-12
CABLE LENGTH (m)
MAX9257A/58A toc10
FOR
800
2% SPREAD ON MAX9257, STP CABLE
700
100% PREEMPHASIS
600
SERIAL-DATA RATE (Mbps)
500
400
NO PREEMPHASIS
BER CAN BE AS LOW AS 10 CABLE LENGTHS LESS THAN 10m.
0 862 4 10 12 14 16 18 20
CABLE LENGTH (m)
-12
FOR
MAX9257A/58A toc11
���������������������������������������������������������������� Maxim Integrated Products 10
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

Pin Configuration

TOP VIEW
DIN1
DIN2
V
GND
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8/GPIO0
N.C.
25
DIN0
CCIO
V
REM
GND
CCLVDS
V
SDO+
MAX9257A
DIN9/GPIO1
DIN10/GPIO2
SDO-
678
DIN11/GPIO3
LQFP
N.C.
CCLVDS
SDO+
V
REM
DIN0
31
32
33
CC
34
35
36
37
38
39
+
40
21 3 4 5 6 7 8 9 10
CCIO
GND
V
SDO-
27282930 22 21
2526
MAX9257A
DIN9/GPIO1
DIN10/GPIO2
DIN11/GPIO3
GNDSPLL
GNDLVDS
24
DIN13/GPIO5
DIN12/GPIO4
23
CCSPLL
V
DIN14/GPIO6
GPIO9
GNDFPLL
GPIO8
20
19
18
17
16
15
14
13
12
11
CCFPLL
V
V
CC
GND
V
CCIO
SDA/RX
SCL/TX
PCLK_IN
VSYNC_IN
HSYNC_IN
DIN15/GPIO7
GND
N.C.
DIN1
DIN2
V
GND
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8/GPIO0
N.C.
3635343332313029282726
37
38
39
40
CC
41
42
43
44
45
46
47
48
+
12345
N.C.
TQFN-EP
CONNECT EP TO GND
N.C.
DOUT7
DOUT8
DOUT9
DOUT10
DOUT11
DOUT12
DOUT13
3635343332313029282726
DOUT14
GNDSPLL
CCSPLL
V
GNDLVDS
GNDSPLL
DIN12/GPIO4
DIN13/GPIO5
CCSPLL
V
9
DIN14/GPIO6
GPIO9
GPIO8
101112
CCFPLL
V
GNDFPLL
N.C.
25
N.C.
24
23
22
21
20
19
18
17
16
15
14
13
N.C.
V
CC
GND
V
CCIO
SDA/RX
SCL/TX
PCLK_IN
VSYNC_IN
HSYNC_IN
DIN15/GPIO7
GND
N.C.
N.C.
GNDOUT
V
CCOUT
DOUT6
DOUT5
DOUT4
DOUT3
DOUT2
DOUT1
DOUT0
CCEN
GNDOUT
37
38
39
40
41
42
GND
MAX9258A
5
PD
CCLVDS
V
678
SDI-
SDI+
9
GNDPLL
GNDLVDS
101112
CCPLL
ERROR
V
N.C.
43
44
45
46
47
48
+
1
234
CC
V
N.C.
24
23
22
21
20
19
18
17
16
15
14
13
N.C.
GNDOUT
V
CCOUT
DOUT15
HSYNC_OUT
VSYNC_OUT
PCLK_OUT
LOCK
TX
RX
GND
N.C.
LQFP
���������������������������������������������������������������� Maxim Integrated Products 11
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel

MAX9257A Pin Description

PIN
TQFN LQFP
1, 18 2, 21 V
2, 11,
19, 34
3–8 4–9
9 10 GNDFPLL Filter PLL Ground
10 11 V
12 15 DIN15/GPIO7
13 16 HSYNC_IN Horizontal SYNC Input. HSYNC_IN is internally pulled down to ground.
14 17 VSYNC_IN Vertical SYNC Input. VSYNC_IN is internally pulled down to ground.
15 18 PCLK_IN
16 19 SCL/TX
17 20 SDA/RX
20, 33 23, 40 V
21 26 GPIO8 General Purpose Input/Output
22 27 GPIO9 General Purpose Input/Output
23 28 V
24 29 GNDSPLL SPLL Ground
25 30 GNDLVDS LVDS Ground
26 31 SDO- Serial LVDS Inverting Output
27 32 SDO+ Serial LVDS Noninverting Output
28 33 V
3, 14,
22, 41
NAME FUNCTION
Single-Ended Input/Output Buffer Supply Voltage. Bypass V
CCIO
GND Digital Supply Ground
DIN[9:14]/ GPIO[1:6]
CCFPLL
CC
CCSPLL
CCLVDS
0.001FF capacitors in parallel as close as possible to the device with the smallest value capacitor closest to V
Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits word length, DIN_ not programmed as data inputs becomes GPIO (Table 22). DIN[9:14] are inter­nally pulled down to ground.
Filter PLL Supply Voltage. Bypass V in parallel as close as possible to the device with the smallest value capacitor closest to V
Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits word length, DIN_ not programmed as data input becomes GPIO (Table 22). DIN15 is internally pulled down to ground.
Parallel Clock Input. PCLK_IN latches data and sync inputs and provides the PLL reference clock. PCLK_IN is internally pulled down to ground.
Open-Drain Control Channel Output. SCL/TX becomes SCL output when UART-to-I2C is active. SCL/TX becomes TX output when UART-to-I2C is bypassed. Externally pull up to VCC.
Open-Drain Control Channel Input/Output. SDA/RX becomes bidirectional SDA when UART­to-I2C is active. SDA/RX becomes RX input when UART-to-I2C is bypassed. SDA output requires a pullup to VCC.
Digital Supply Voltage. Bypass VCC to ground with 0.1FF and 0.001FF capacitors in parallel as close as possible to the device with the smallest value capacitor closest to VCC.
Spread PLL Supply Voltage. Bypass V tors in parallel as close as possible to the device with the smallest value capacitor closest to V
LVDS Supply Voltage. Bypass V in parallel as close as possible to the device with the smallest value capacitor closest to V
CCFPLL
CCSPLL
CCLVDS
.
.
.
CCIO
.
to GNDFPLL with 0.1FF and 0.001FF capacitors
CCFPLL
to GNDSPLL with 0.1FF and 0.001FF capaci-
CCSPLL
to GNDLVDS with 0.1FF and 0.001FF capacitors
CCLVDS
CCIO
to GND with 0.1FF and
���������������������������������������������������������������� Maxim Integrated Products 12
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9257A Pin Description (continued)
PIN
TQFN LQFP
29 34 REM
30, 31, 32,
35–39
35, 38, 39,
42–46
40 47 DIN8/GPIO0
1, 12, 13
—
24, 25, 36,
37, 48
— — EP Exposed Pad for TQFN Package Only. Connect EP to ground.
NAME
Remote Power-Up/Power-Down Select Input. Connect REM to ground for power-up to follow VCC. Connect REM high to VCC through 10kI resistor for remote power-up. REM is internally pulled down to GND.
DIN[0:7] Data Inputs. DIN[0:7] are internally pulled down to ground.
Data Input/General Purpose Input/Output. When a serial-data word is less than 18 bits word length, DIN_ not programmed as data input becomes GPIO (Table 22). DIN8 is internally pulled down to ground.
N.C. No Connection. Not internally connected.
FUNCTION

MAX9258A Pin Description

PIN NAME FUNCTION
1, 12, 13, 24,
25, 36, 37
2 V
3, 14 GND Digital Supply Ground
4
5 V
6 SDI- Serial LVDS Inverting Input
7 SDI+ Serial LVDS Noninverting Input
8 GNDLVDS LVDS Supply Ground
9 GNDPLL PLL Supply Ground
10 V
11 ERROR
15 RX LVCMOS/LVTTL Control Channel UART Output
N.C. No Connection. Not internally connected.
CC
PD
CCLVDS
CCPLL
Digital Supply Voltage. Bypass VCC to GND with 0.1FF and 0.001FF capacitors in parallel as close as possible to the device with the smallest value capacitor closest to VCC.
LVCMOS/LVTTL Power-Down Input. Drive PD high to power up the device and enable all outputs. Drive PD low to put all outputs in high impedance and reduce supply current. PD is internally pulled down to ground.
LVDS Supply Voltage. Bypass V as close as possible to the device with the smallest value capacitor closest to V
PLL Supply Voltage. Bypass V close to the device as possible with the smallest value capacitor closest to V
Active-Low, Open-Drain Error Output. ERROR asserts low to indicate a data transfer error was detected (parity, PRBS, or UART control channel error). ERROR is high to indicate no error detect­ed. ERROR resets when the error registers are read for parity, control channel errors, and when PRBS enable bit is reset for PRBS errors. Pull up to V
CCLVDS
to GNDPLL with 0.1FF and 0.001FF capacitors in parallel as
CCPLL
to GNDLVDS with 0.1FF and 0.001FF capacitors in parallel
CCOUT
CCPLL
with a 1kI resistor.
CCLVDS
.
.
���������������������������������������������������������������� Maxim Integrated Products 13
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
MAX9258A Pin Description (continued)
PIN NAME FUNCTION
16 TX LVCMOS/LVTTL Control Channel UART Input. TX is internally pulled up to V
Open-Drain Lock Output. LOCK asserts high to indicate PLLs are locked with correct serial-word
17 LOCK
18 PCLK_OUT LVCMOS/LVTTL Recovered Clock Output
19 VSYNC_OUT LVCMOS/LVTTL Vertical SYNC Output
20 HSYNC_OUT LVCMOS/LVTTL Horizontal SYNC Output
21, 28–35,
40–46
22, 39 V
23, 38, 48 GNDOUT Output Supply Ground
26 V
27 GNDSPLL SPLL Ground
47
DOUT[15:0] LVCMOS/LVTTL Data Outputs
CCOUT
CCSPLL
CCEN
boundary alignment. LOCK asserts low to indicate PLLs are not locked or incorrect serial-word boundary alignment was detected. Pull up to V
Output Supply Voltage. V with 0.1FF and 0.001FF capacitors in parallel as close as possible to the device with the smallest value capacitor closest to V
Spread-Spectrum PLL Supply Voltage. Bypass V capacitors in parallel as close as possible to the device with the smallest value capacitor closest to V
LVCMOS/LVTTL Control Channel Enabled Output. CCEN asserts high to indicate that control chan­nel is enabled.
CCSPLL
.
is the supply for all output buffers. Bypass V
CCOUT
.
CCOUT
with a 1kI resistor.
CCOUT
to GNDSPLL with 0.1FF and 0.001FF
CCSPLL
CCOUT
CCOUT
.
to GNDOUT
���������������������������������������������������������������� Maxim Integrated Products 14
SDO-
SDO+
(SDO+) - (SDO-)
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
/2
R
V
OD
((SDO+) + (SDO-))/2
L
V
GND
OS
V
(-)
OS
V
= 0V
OD
(-)
V
OD
/2
R
L
(-) VOS(+)
V
OS
V
= |VOS(+) - VOS(-)|
OS
(-)
V
OD
VOD = |VOD(+) - VOD(-)|
SDO+
SDO-
VOD(+)
Figure 1. MAX9257A LVDS DC Output Parameters
V
OUT
PCLK_IN
DIN
V
V
HYST+
HYST-
-V
ID
VID = 0V
+V
ID
NOTE: PCLK_IN PROGRAMMED FOR RISING LATCH EDGE.

Figure 2. Input Hysteresis Figure 3. MAX9257A Worst-Case Pattern Input

���������������������������������������������������������������� Maxim Integrated Products 15
MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I2C Control Channel
SDO+
R
L
SDO-
C
L
(SDO+) - (SDO-)
80%
C
L
t
RISE
Figure 4. MAX9257A LVDS Control Channel Output Load and Output Rise/Fall Times
PCLK_IN
V
ILMAX
t
FALL
V
80%
20%20%
IHMIN
DIN, VSYNC_IN, HSYNC_IN
Figure 5. MAX9257A Input Setup and Hold Times
���������������������������������������������������������������� Maxim Integrated Products 16
t
SET
V
IHMIN
V
ILMAX
NOTE: PCLK_IN PROGRAMMED FOR RISING LATCHING EDGE.
t
HOLD
V
V
IHMIN
ILMAX
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