The MAX9249 serializer with LVDS system interface
utilizes Maxim’s Gigabit multimedia serial link (GMSL)
technology. The MAX9249 serializer pairs with any
GMSL deserializer to form a complete digital serial link
for joint transmission of high-speed video, audio, and
control data.
The MAX9249 allows a maximum serial payload data rate
of 2.5Gbps for a 15m shielded twisted-pair (STP) cable.
The serializer operates up to a maximum clock rate of
104MHz (3-channel LVDS) or 78MHz (4-channel LVDS).
This serial link supports display panels from QVGA (320
x 240) to WXGA (1280 x 800) and higher with 24-bit color.
The 3-channel mode handles three lanes of LVDS data
(21 bits), UART control signals, and three audio signals.
The 4-channel mode handles four lanes of LVDS data
(28 bits), UART control signals, three audio signals,
and/or up to three auxiliary parallel inputs. The three
audio inputs form a standard I2S interface, supporting
sample rates from 8kHz to 192kHz and audio word
lengths of 4 to 32 bits. The embedded control channel forms a full-duplex, differential, 100kbps to 1Mbps
UART link between the serializer and deserializer. The
electronic control unit (ECU), or microcontroller (FC), can
be located on the MAX9249 side of the link (typical for
video display), on the deserializer side of the link (typical for image sensing), or on both sides. In addition, the
control channel enables ECU/FC control of peripherals
on the remote side, such as backlight control, grayscale
Gamma correction, camera module, and touch screen.
Base-mode communication with peripherals uses either
I2C or the GMSL UART format. A bypass mode enables
full-duplex communication using custom UART formats.
The MAX9249 serializer driver preemphasis, along with
the channel equalizer on the GMSL deserializer, extends
the link length and enhances the link reliability. Spread
spectrum is available on the MAX9249 to reduce EMI on
the serial link and the parallel output of the GMSL deserializer. The serial output complies with ISO 10605 and
IEC 61000-4-2 ESD protection standards.
The core supply for the MAX9249 is 1.8V. The I/O supply
ranges from 1.8V to 3.3V. The MAX9249 is available in
a 48-pin TQFP package (7mm x 7mm) with an exposed
pad. Electrical performance is guaranteed over the
-40NC to +105NC automotive temperature range.
Features
S Pairs with Any GMSL Deserializer
S 2.5Gbps Payload Rate AC-Coupled Serial Link
with 8B/10B Line Coding
S Supports Up to WXGA (1280 x 800) with 24-Bit
Color
S 8.33MHz to 104MHz (3-Channel LVDS) or 6.25MHz
to 78MHz (4-Channel LVDS) Input Clock
S 4-Bit to 32-Bit Word Length, 8kHz to 192kHz I
2
S
Audio Channel Supports High-Definition Audio
S Embedded Half-/Full-Duplex Bidirectional Control
Channel (100kbps to 1Mbps)
S Interrupt Supports Touch-Screen Functions for
Display Panels
S Remote-End I
S Preemphasis Line Driver
S Programmable Spread Spectrum on the Serial
2
C Master for Peripherals
Outputs for Reduced EMI
S Automatic Data-Rate Detection Allows “On-the-
Fly” Data-Rate Change
S Input Clock PLL Jitter Attenuator
S Built-In PRBS Generator for BER Testing of the
Serial Link
S Line-Fault Detector Detects Serial Link Shorts to
Ground, Battery, or Open Link
S ISO 10605 and IEC 61000-4-2 ESD Protection
S -40NC to +105NC Operating Temperature Range
S 1.8V to 3.3V I/O, 1.8V Core, and 3.3V LVDS
Supplies
S Patent Pending
Applications
High-Resolution Automotive Navigation
Rear-Seat Infotainment
Megapixel Camera Systems
Ordering Information
PARTTEMP RANGEPIN-PACKAGE
MAX9249GCM/V+
MAX9249GCM/V+T
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
17SCKI2S Serial-Clock Input with Internal Pulldown to GND
18WSI2S Word-Select Input with Internal Pulldown to GND
19CNTL1
RXIN_-,
RXIN_+
Differential LVDS Data Inputs. Set BWS = low (3-channel mode) to use RXIN0_ to RXIN2_. Set
BWS = high (4-channel mode) to use RXIN0_ to RXIN3_.
3.3V LVDS Power Supply. Bypass LVDSVDD to AGND with 0.1FF and 0.001FF capacitors as close
as possible to the device with the smaller value capacitor closest to LVDSVDD.
AGNDAnalog Ground
RXCLKIN-,
RXCLKIN+
LVDS Input for the LVDS Clock
1.8V Analog Power Supply. Bypass AVDD to AGND with 0.1FF and 0.001FF capacitors as close
as possible to the device with the smaller value capacitor closest to AVDD.
I2S Serial-Data Input with Internal Pulldown to GND. Disable I2S to use SD/CNTL0 as an additional
input.
Control Input 1 with Internal Pulldown to GND. Data is latched every RXCLKIN_ cycle (Figure 7).
CNTL1 is not available in 3-channel mode. Drive BWS high (4-channel mode) to use this input.
CNTL1 or RES (RES from VESA Standard Panel Specification) is mapped to DIN27 (see the
Reserved Bit (RES) section).
Gigabit Multimedia Serial Link
Serializer with LVDS System Interface
Pin Description (continued)
PINNAMEFUNCTION
Control Input 2 with Internal Pulldown to GND. Data is latched every RXCLKIN_ cycle (Figure 7).
20CNTL2
22, 39DVDD
MAX9249
23, 38GNDDigital and I/O Ground
24, 37IOVDD
25RX/SDA
26TX/SCL
27SSEN
28LMN1Line-Fault Monitor Input 1 (see Figure 3 for details)
30, 31
33LMN0Line-Fault Monitor Input 0 (see Figure 3 for details)
34
35INT
36DRS
40, 46N.C.Internally Not Connected. Connect to GND or leave unconnected.
41BWS
42
43CDS
44MS
OUT-,
OUT+
LFLT
PWDN
CNTL2 is not available in 3-channel mode. Drive BWS high (4-channel mode) to use this input.
CNTL2 is mapped to DIN28.
1.8V Digital Power Supply. Bypass DVDD to GND with 0.1FF and 0.001FF capacitors as close as
possible to the device with the smaller value capacitor closest to DVDD.
I/O Supply Voltage. 1.8V to 3.3V logic I/O power supply. Bypass IOVDD to GND with 0.1FF and
0.001FF capacitors as close as possible to the device with the smallest value capacitor closest to
IOVDD.
Receive/Serial Data. UART receive or I2C serial-data input/output with internal 30kI pullup to
IOVDD. In UART mode, RX/SDA is the Rx input of the MAX9249’s UART. In I2C mode, RX/SDA is
the SDA input/output of the MAX9249’s I2C master.
Transmit/Serial Clock. UART transmit or I2C serial-clock output with internal 30kI pullup to IOVDD.
In UART mode, TX/SCL is the Tx output of the MAX9249’s UART. In I2C mode, TX/SCL is the SCL
output of the MAX9249’s I2C master.
Spread-Spectrum Enable. Serial link spread-spectrum enable input requires external pulldown or
pullup resistors. The state of SSEN latches upon power-up or when resuming from power-down
mode (PWDN = low). Set SSEN = high for Q0.5% spread spectrum on the serial link. Set SSEN =
low to use the serial link without spread spectrum.
Differential CML Output+/-. Differential outputs of the serial link.
Line Fault. Active-low, open-drain line-fault output with a 60kI internal pullup resistor. LFLT = low
indicates a line fault. LFLT is high impedance when PWDN = low.
Interrupt Output to Indicate Remote Side Requests. INT = low upon power-up and when PWDN =
low. A transition on the INT input of the GMSL deserializer toggles the MAX9249’s INT output.
Data-Rate Select. Data-rate range-selection input requires external pulldown or pullup resistors.
Set DRS = high for RXCLKIN_ frequencies of 8.33MHz to 16.66MHz (3-channel mode) or 6.25MHz
to 12.5MHz (4-channel mode). Set DRS = low for RXCLKIN_ frequencies of 16.66MHz to 104MHz
(3-channel mode) or 12.5MHz to 78MHz (4-channel mode).
Bus-Width Select. Input width selection requires external pulldown or pullup resistors. Set BWS =
low for 3-channel mode. Set BWS = high for 4-channel mode.
Power-Down. Active-low power-down input requires external pulldown or pullup resistors.
Control Direction Selection. Control link direction selection input requires external pulldown or
pullup resistors. Set CDS = low for FC use on the MAX9249 side of the serial link. Set CDS = high
for FC use on the GMSL deserializer side of the serial link.
Mode Select. Control link mode-selection input requires external pulldown or pullup resistors. Set
MS = low to select base mode. Set MS = high to select the bypass mode.
resistors. Set AUTOS = high to power up the device with no link active. Set AUTOS = low to have
the MAX9249 power up the serial link with autorange detection (see Tables 8 and 9).
Exposed Pad. EP internally connected to AGND. MUST externally connect EP to the AGND plane
for proper thermal and electrical performance.