MAXIM MAX9248, MAX9250 User Manual

General Description

The MAX9248/MAX9250 digital video serial-to-parallel
converters deserialize a total of 27 bits during data and
control phases. In the data phase, the LVDS serial input is
converted to 18 bits of parallel video data and in the con­trol phase, the input is converted to 9 bits of parallel con­trol data. The separate video and control phases take
advantage of video timing to reduce the serial-data rate.
The MAX9248/MAX9250 pair with the MAX9247 serializer
to form a complete digital video transmission system. For
operating frequencies less than 35MHz, the MAX9248/
MAX9250 can also pair with the MAX9217 serializer.

The MAX9248 features spread-spectrum capability,
allowing output data and clock to spread over a speci­fied frequency range to reduce EMI. The data and
clock outputs are programmable for a spectrum spread
of ±4% or ±2%. The MAX9250 features output enable
input control to allow data busing.

Proprietary data decoding reduces EMI and provides
DC balance. The DC balance allows AC-coupling, pro­viding isolation between the transmitting and receiving
ends of the interface. The MAX9248/MAX9250 feature a
selectable rising or falling output latch edge.

ESD tolerance is specified for ISO 10605 with ±10kV
Contact Discharge and ±30kV Air-Gap Discharge.

The MAX9248/MAX9250 operate from a +3.3V ±10%
core supply and feature a separate output supply for
interfacing to 1.8V to 3.3V logic-level inputs. These
devices are available in a 48-lead LQFP package and
are specified from -40°C to +85°C or -40°C to +105°C.

Applications

Navigation System Displays

In-Vehicle Entertainment Systems

Video Cameras

LCD Displays

Features

♦ Programmable ±4% or ±2% Spread-Spectrum

Output for Reduced EMI (MAX9248)

♦ Proprietary Data Decoding for DC Balance and

Reduced EMI

♦ Control Data Deserialized During Video Blanking

♦ Five Control Data Inputs are Single-Bit-Error

Tolerant

♦ Output Transition Time is Scaled to Operating

Frequency for Reduced EMI

♦ Staggered Output Switching Reduces EMI

♦ Output Enable Allows Busing of Outputs

(MAX9250)

♦ Clock Pulse Stretch on Lock

♦ Wide ±2% Reference Clock Tolerance

♦ Synchronizes to MAX9247 Serializer Without

External Control

♦ ISO 10605 and IEC 61000-4-2 Level 4

ESD Protection

♦ Separate Output Supply Allows Interface to 1.8V

to 3.3V Logic

♦ +3.3V Core Power Supply

♦ Space-Saving LQFP Package

♦ -40°C to +85°C and -40°C to +105°C Operating

Temperature Ranges

MAX9248/MAX9250

27-Bit, 2.5MHz to 42MHz

DC-Balanced LVDS Deserializers

________________________________________________________________

Maxim Integrated Products

1

Ordering Information

19-3943; Rev 3; 4/09

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

+

Denotes a lead(Pb)-free/RoHS-compliant package.

/V denotes an automotive qualified part.

EVALUATION KIT

AVAILABLE

Pin Configuration appears at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

MAX9248ECM+ -40°C to +85°C 48 LQFP

MAX9248ECM/V+ -40°C to +85°C 48 LQFP

MAX9248GCM+ -40°C to +105°C 48 LQFP

MAX9248GCM/V+ -40°C to +105°C 48 LQFP

MAX9250ECM+ -40°C to +85°C 48 LQFP

MAX9250ECM/V+ -40°C to +85°C 48 LQFP

MAX9250GCM+ -40°C to +105°C 48 LQFP

MAX9250GCM/V+ -40°C to +105°C 48 LQFP

MAX9248/MAX9250

27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(V

CC_

= +3.0V to +3.6V, PWRDWN = high, differential input voltage ⏐VID⏐ = 0.05V to 1.2V, input common-mode voltage VCM= ⏐V

ID

/ 2⏐

to V

CC

- ⏐V

ID

/ 2⏐, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, ⏐VID⏐ = 0.2V, VCM= 1.2V,

T

A

= +25°C.) (Notes 1, 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

V

CC_

to _GND........................................................-0.5V to +4.0V

Any Ground to Any Ground...................................-0.5V to +0.5V

IN+, IN- to LVDSGND............................................-0.5V to +4.0V

IN+, IN- Short Circuit to LVDSGND or V

CCLVDS

........Continuous

(R/F, OUTEN, RNG_, REFCLK, SS

PWRDWN) to GND................................. -0.5V to (V

CC

+ 0.5V)

(RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT,

LOCK) to V

CCOGND

.............................-0.5V to (V

CCO

+ 0.5V)

Continuous Power Dissipation (T

A

= +70°C)

48-Lead LQFP (derate 21.7mW/°C above +70°C).....1739mW

ESD Protection

Machine Model (R

D

= 0Ω, CS= 200pF)

All Pins to GND............................................................±200V

Human Body Model (R

D

= 1.5kΩ, CS= 100pF)

All Pins to GND..............................................................±2kV

ISO 10605 (R

D

= 2kΩ, CS= 330pF)

Contact Discharge (IN+, IN-) to GND ............................±10kV

Air-Gap Discharge (IN+, IN-) to GND ............................±30kV

IEC 61000-4-2 (R

D

= 330Ω, CS= 150pF)

Contact Discharge (IN+, IN-) to GND ............................±10kV

Air-Gap Discharge (IN+, IN-) to GND ............................±15kV

Storage Temperature Range .............................-65°C to +150°C

Junction Temperature......................................................+150°C

Lead Temperature (soldering, 10s) .................................+300°C

SINGLE-ENDED INPUTS (R/F, OUTEN, RNG0, RNG1, REFCLK, PWRDWN, SS)

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I

Input Clamp Voltage V

SINGLE-ENDED OUTPUTS (RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT, LOCK)

Low-Level Output Voltage V

High-Impedance Output Current I

Output Short-Circuit Current I

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

IH

IL

IN

CL

OH

OL

OZ

OS

PWRDWN =
high or low

ICL = -18mA -1.5 V

IOH = -100µA V

IOH = -2mA, RNG1 = high V

IOH = -2mA, RNG1 = low V

IOL = 100µA 0.1

IOL = 2mA, RNG1 = high 0.3

IOL = 2mA, RNG1 = low 0.35

PWRDWN = low or OUTEN = low,

= -0.3V to (V

V

O

RNG1 = high, VO = 0 -10 -50

RNG1 = low, VO = 0 -7 -40

2.0 VCC + 0.3 V

-0.3 +0.8 V

V

= - 0.3V to 0 ( M AX 9248/

I N

M AX 9250E C M ) ,
V

= - 0.15V to 0 ( M AX 9248/

I N

M AX 9250G C M ) ,

= 0 to (VCC + 0.3V) -20 +20

V

IN

+ 0.3V)

CCO

-100 +20

- 0.1

CCO

- 0.35High-Level Output Voltage V

CCO

- 0.4

CCO

-10 +10 µA

µA

V

V

mA

MAX9248/MAX9250

27-Bit, 2.5MHz to 42MHz

DC-Balanced LVDS Deserializers

_______________________________________________________________________________________ 3

DC ELECTRICAL CHARACTERISTICS (continued)

(V

CC_

= +3.0V to +3.6V, PWRDWN = high, differential input voltage ⏐VID⏐ = 0.05V to 1.2V, input common-mode voltage VCM= ⏐V

ID

/ 2⏐

to V

CC

- ⏐V

ID

/ 2⏐, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, ⏐VID⏐ = 0.2V, VCM= 1.2V,

T

A

= +25°C.) (Notes 1, 2)

LVDS INPUT (IN+, IN-)

Differential Input High Threshold V

Differential Input Low Threshold V

Input Current I

Input Bias Resistor (Note 3) R

Power-Off Input Current I

POWER SUPPLY

Worst-Case Supply Current

Power-Down Supply Current I

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

TH

TL

IN+, IIN-

IB

INO+, IINO-

CCZ

(Note 3) 50 mV

(Note 3) -50 mV

PWRDWN = high or low (Note 3) -40 +40 µA
PWRDWN =

high or low

V

=

CC_

0 or open,
PWRDWN =
0 or open,
Figure 1

V

= 0 or open,

CC_

PWRDWN = 0 or open (Note 3)

MAX9250
C

= 8pF,

L

worst-case
pattern,
Figure 2

MAX9248

= 8pF,

C

L

worst-case
pattern,
Figure 2

(Note 4) 50 µA

MAX9248/MAX9250ECM 42 60 78

MAX9248/MAX9250GCM 42 60 88

MAX9248/MAX9250ECM 42 60 78

MAX9248/MAX9250GCM 42 60 88

RNG1 = low
RNG0 = low

RNG1 = low
RNG0 = high

RNG1 = high
RNG0 = low

RNG1 = high
RNG0 = high

RNG1 = low
RNG0 = low

RNG1 = low
RNG0 = high

RNG1 = high
RNG0 = low

RNG1 = high
RNG0 = high

2.5MHz 19

5MHz 33

5MHz 28

10MHz 49

10MHz 33

20MHz 59

20MHz 45

42MHz 89

2.5MHz 31

5MHz 48

5MHz 40

10MHz 70

10MHz 49

20MHz 87

20MHz 68

35MHz 100

42MHz 120

-60 +60 µA

kΩ

mA

MAX9248/MAX9250

27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS

(V

CC_

= +3.0V to +3.6V, CL= 8pF, PWRDWN = high, differential input voltage ⏐VID⏐ = 0.1V to 1.2V, input common-mode voltage

V

CM

= ⏐V

ID

/ 2⏐ to VCC- ⏐V

ID

/ 2⏐, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, ⏐VID⏐ = 0.2V,

V

CM

= 1.2V, TA= +25°C.) (Notes 3, 5)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

REFCLK TIMING REQUIREMENTS

Period t

Frequency f

Frequency Variation Δf

Duty Cycle DC 40 50 60 %

Transition Time t

SWITCHING CHARACTERISTICS

Output Rise Time t

Output Fall Time t

PCLK_OUT High Time t

PCLK_OUT Low Time t

Data Valid Before PCLK_OUT t

Data Valid After PCLK_OUT t

PLL Lock to REFCLK t

Spread-Spectrum Output
Frequency (MAX9248)

MAX9248/MAX9250ECM 23.8 400.0

T

MAX9248/MAX9250GCM 28.6 400.0

CLK

CLK

TRAN

HIGH

LOW

DVB

DVA

PLLREF

f

PCLK_OUT

MAX9248/MAX9250ECM 2.5 42.0

MAX9248/MAX9250GCM 2.5 35.0

REFCLK to serializer PCLK_IN -2.0 +2.0 %

20% to 80% 6 ns

MAX9248/

RNG1 = high

Figure 3

R

RNG1 = low

MAX9250ECM

MAX9248/
MAX9250GCM

MAX9248/
MAX9250ECM

MAX9248/
MAX9250GCM

RNG1 = high

Figure 3

R

RNG1 = low

MAX9248/
MAX9250ECM

MAX9248/
MAX9250ECM

MAX9248/
MAX9250GCM

Figure 4

Figure 4

2.2 4.6

2.2 4.9

2.8 5.2

2.8 6.1

1.9 4.0

2.3 4.3

2.3 5.2

0.4 x
t

0.4 x
t

Figure 5 0.35 x tT0.4 x t

Figure 5 0.35 x tT0.4 x t

MAX9248, Figure 8 33,600 x t

MAX9250, Figure 7 16,928 x t

SS = high,
Figure 11

SS = low,
Figure 11

Maximum output
frequency

Minimum output
frequency

Maximum output
frequency

Minimum output
frequency

f

REFCLK

+ 3.6%

f

REFCLK

- 4.4%

f

REFCLK

+ 1.8%

f

REFCLK

- 2.2%

0.45 x

T

t

T

0.45 x

T

t

T

f

REFCLK

+ 4.0%

f

REFCLK

T

T

f

+ 4.4%

f

- 4.0%

f

REFCLK

+ 2.0%

f

REFCLK

f

+ 2.2%

f

- 2.0%

0.6 x
t

T

0.6 x
t

T

REFCLK

REFCLK

- 3.6%

REFCLK

REFCLK

- 1.8%

ns

MHz

ns

ns

ns

ns

ns

ns

T

ns

T

MHz

MAX9248/MAX9250

27-Bit, 2.5MHz to 42MHz

DC-Balanced LVDS Deserializers

_______________________________________________________________________________________ 5

Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground

except V

TH

and VTL.

Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production

tested at T

A

= +25°C.

Note 3: Parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma.
Note 4: All LVTTL/LVCMOS inputs, except PWRDWN at ≤ 0.3V or ≥ V

CC

- 0.3V. PWRDWN is ≤ 0.3V, REFCLK is static.

Note 5: C

L

includes probe and test jig capacitance.

AC ELECTRICAL CHARACTERISTICS (continued)

(V

CC_

= +3.0V to +3.6V, CL= 8pF, PWRDWN = high, differential input voltage ⏐VID⏐ = 0.1V to 1.2V, input common-mode voltage

V

CM

= ⏐V

ID

/ 2⏐ to VCC- ⏐V

ID

/ 2⏐, TA= -40°C to +105°C, unless otherwise noted. Typical values are at V

CC_

= +3.3V, ⏐VID⏐ = 0.2V,

V

CM

= 1.2V, TA= +25°C.) (Notes 3, 5)

Spread-Spectrum Modulation
Frequency

Power-Down Delay t

SS Change Delay t

Output Enable Time t

Output Disable Time t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

f

SSM

PDD

ΔSSPLL

OE

OZ

Figure 11

Figures 7, 8 100 ns

MAX9248, Figure 17

MAX9250, Figure 8 10 30 ns

MAX9250, Figure 9 10 30 ns

f

REFCLK

1024

/

32,800

x t

T

kHz

ns

MAX9248/MAX9250

27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers

6 _______________________________________________________________________________________

Typical Operating Characteristics

(VCC_ = +3.3V, CL= 8pF, TA= +25°C, unless otherwise noted.)

WORST-CASE PATTERN SUPPLY CURRENT

vs. FREQUENCY

70

60

50

40

30

20

SUPPLY CURRENT (mA)

10

0

04045

OUTPUT POWER SPECTRUM vs. FREQUENCY

0

RESOLUTION BW = 30kHz
VIDEO BW = 100kHz

-10

-20

-30

-40

-50

POWER SPECTRUM (dBm)

-60

-70
39 45

MAX9248

MAX9250

3530510152025

FREQUENCY (MHz)

(REFCLK = 42MHz, NO SPREAD,

4%, AND 2% SPREAD)

NO SPREAD

2% SPREAD

4% SPREAD

43 44424140

FREQUENCY (MHz)

MAX9248/50 toc01

1.00E-14

MAX9248/50 toc04

1.00E-13

1.00E-12

BIT-ERROR RATE

1.00E-11

1.00E-10

OUTPUT TRANSITION TIME

vs. OUTPUT SUPPLY VOLTAGE (V

6

5

4

3

t

2

OUTPUT TRANSITION TIME (ns)

1

0

1.8 3.3

t

R

F

RNG1 = HIGH

OUTPUT SUPPLY VOLTAGE (V)

)

CCO

3.02.72.42.1

10

MAX9248/50 toc02

OUTPUT TRANSITION TIME (ns)

OUTPUT TRANSITION TIME

vs. OUTPUT SUPPLY VOLTAGE (V

9

8

7

6

5

4

t

3

2

1

0

F

1.8 3.3
OUTPUT SUPPLY VOLTAGE (V)

CABLE LENGTH vs. FREQUENCY

BIT-ERROR RATE vs. CABLE LENGTH

MAX9248/50 toc05

FREQUENCY (MHz)

45

40

35

30

25

20

15

10

5

CAT5 CABLE

REFCLK = 42MHz
840Mbps DATA RATE
FOR CABLE LENGTH < 10m

-12

BER < 10

012

CAT5 CABLE LENGTH (m)

810642

BIT-ERROR RATE < 10

t

R

RNG1 = LOW

CABLE LENGTH (m)

)

CCO

MAX9248/50 toc03

3.02.72.42.1

-9

MAX9248/50 toc06

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