MAXIM MAX9242, MAX9244, MAX9246, MAX9254 User Manual

General Description

The MAX9242/MAX9244/MAX9246/MAX9254 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A separate parallel-rate LVDS clock provides the timing for deserialization. The MAX9242/ MAX9244/MAX9246/MAX9254 feature spread-spectrum capability, allowing the output data and clock frequency to spread over a specified range to reduce EMI. The single-ended data and clock outputs are programmable for a frequency spread of ±2%, ±4%, or no spread. The spread-spectrum function is also available when the MAX9242/MAX9244/MAX9246/MAX9254 operate in nonDC-balanced mode. The modulation rate of the spread is 32kHz for a 33MHz LVDS clock input and scales linearly with frequency. The single-ended outputs have a separate supply, allowing +1.8V to +5V output logic levels.

The MAX9254 features high output drive current for both data and clock outputs for faster transition times in the presence of heavy capacitive loads.

The MAX9242/MAX9244/MAX9246/MAX9254 feature programmable DC balance, allowing isolation between a serializer and deserializer using AC-coupling. The MAX9242/MAX9244/MAX9246/MAX9254 operate with the MAX9209/MAX9213 serializers and are available with a rising-edge strobe (MAX9242) or falling-edge strobe (MAX9244/MAX9246/MAX9254). The LVDS inputs meet ISO 10605 ESD specifications with ±30kV Air-Gap Discharge and ±6kV Contact Discharge ratings.

Applications

Automotive Navigation Systems

Automotive DVD Entertainment Systems

Digital Copiers

Laser Printers

Features

♦ Programmable ±4%, ±2%, or OFF Spread-Spectrum

Output for Reduced EMI

♦ Programmable DC-Balanced or Non-DC-Balanced

Modes

♦ DC Balance Allows AC-Coupling for Wider Input

Common-Mode Voltage Range

♦ Spread Spectrum Operates in DC-Balanced or

Non-DC-Balanced Mode

♦ High Output Drive (MAX9254)

♦ππ/ 4 Deskew by Oversampling

(MAX9242/MAX9244/MAX9254)

♦ 16MHz-to-34MHz (DC-Balanced) and 20MHz-to-

40MHz (Non-DC-Balanced) Operation (MAX9242/MAX9244/MAX9254)

♦ 6MHz-to-18MHz (DC-Balanced) and 8MHz-to-20MHz

(Non-DC-Balanced) Operation (MAX9246)

♦ Rising-Edge (MAX9242) or Falling-Edge

(MAX9244/MAX9246/MAX9254) Output Strobe

♦ High-Impedance Outputs when PWRDWN is Low

Allow Output Busing

♦ Separate Output Supply Allows Interface to +1.8V,

+2.5V, +3.3V, and +5V Logic

♦ LVDS Inputs Meet ISO 10605 ESD Protection at

±30kV Air-Gap Discharge and ±6kV Contact Discharge

♦ LVDS Inputs Meet IEC 61000-4-2 Level 4 ESD

Protection at ±15kV Air-Gap Discharge and ±8kV Contact Discharge

♦ LVDS Inputs Conform to ANSI TIA/EIA-644 Standard ♦ +3.3V Main Power Supply

MAX9242/MAX9244/MAX9246/MAX9254

21-Bit Deserializers with Programmable

Spread Spectrum and DC Balance

________________________________________________________________

Maxim Integrated Products

Ordering Information

19-3954; Rev 4; 7/09

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Denotes a lead(Pb)-free/RoHS-compliant package. /V denotes an automotive qualified part. Note: All devices are available in lead(Pb)-free/RoHS-compliant packaging. Specify lead(Pb)-free/RoHS compliant by adding a + symbol at the end of the part number when ordering.

Selector Guide

Pin Configuration appears at end of data sheet.

Ordering Information continued at end of data sheet.

EVALUATION KIT

AVAILABLE

FREQUENCY RANGE

PART

MAX9242 Rising Yes 20 to 40 16 to 34

MAX9244 Falling Yes 20 to 40 16 to 34

MAX9246 Falling No 8 to 20 6 to 18

MAX9254 Falling Yes 20 to 40 16 to 34

STROBE

EDGE

OVER-

SAMPLING

NON-DC

BALANCE

(MHz)

BALANCE

(MHz)

PART TEMP RANGE PIN-PACKAGE

MAX9242EUM -40°C to +85°C 48 TSSOP

MAX9242EUM/V+ -40°C to +85°C 48 TSSOP

MAX9242GUM -40°C to +105°C 48 TSSOP

MAX9242GUM/V+ -40°C to +105°C 48 TSSOP

MAX9244EUM -40°C to +85°C 48 TSSOP

MAX9244EUM/V+ -40°C to +85°C 48 TSSOP

MAX9244GUM -40°C to +105°C 48 TSSOP

MAX9244GUM/V+ -40°C to +105°C 48 TSSOP

MAX9242/MAX9244/MAX9246/MAX9254

21-Bit Deserializers with Programmable Spread Spectrum and DC Balance

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, V

CCO

= +3.0V to +5.5V, PWRDWN = high; SSG = high, open, or low; DCB = high or

low, differential input voltage |V

| = 0.05V to 1.2V, input common-mode voltage VCM= |V

/ 2| to 2.4V - |V

/ 2|, unless otherwise

noted. Typical values are at V

= V

CCO

= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

(All voltages referenced to GND.) V

, LVDSVCC, PLLVCC.......................................-0.5V to +4.0V

CCO

......................................................................-0.5V to +6.0V

RxIN__, RxCLKIN_.................................................-0.5V to +4.0V

PWRDWN ..............................................................-0.5V to +6.0V

SSG, DCB...................................................-0.5V to (V

+ 0.5V)

RxOUT_, RxCLKOUT ...............................-0.5V to (V

CCO

+ 0.5V)

Continuous Power Dissipation (T

= +70°C)

48-Pin TSSOP (derate 16mW/°C above +70°C) ........1282mW

ESD Protection

Human Body Model (R

= 1.5kΩ, CS= 100pF)

All Pins to GND .............................................................±2.5kV

IEC 61000-4-2 (R

= 330Ω, CS= 150pF)

LVDS Inputs to GND (Air-Gap Discharge).....................±15kV

LVDS Inputs to GND (Contact Discharge).......................±8kV

ISO 10605 (R

= 2.0kΩ, CS= 330pF)

LVDS Inputs to GND (Air-Gap Discharge).....................±30kV

LVDS Inputs to GND (Contact Discharge).......................±6kV

Operating Temperature Range .........................-40°C to +105°C

Storage Temperature Range .............................-65°C to +150°C

Junction Temperature......................................................+150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER SUPPLY

Power-Supply Range

Output-Supply Range V

Worst-Case Supply Current I

LVDSV

PLLV

CCO

CCW

DC-balanced mode (SSG = low)

CL = 8pF, worst-case pattern,

= V

to 3.6V, Figure 2 (MAX9242, MAX9244, MAX9254)

CCO

= 3.0V

Non-DC-balanced mode (SSG = low)

D C - b al anced m od e ( S SG = hi g h or op en)

N on- D C -b al anced m ode ( S SG = hi g h or op en)

16MHz 50 68

34MHz 81 108

20MHz 55 73

33MHz 75 97

40MHz 83 110

16MHz 62 85

34MHz 101 135

20MHz 67 91

33MHz 93 123

40MHz 107 134

3.0 3.6 V

1.8 5.5 V

MAX9242/MAX9244/MAX9246/MAX9254

21-Bit Deserializers with Programmable

Spread Spectrum and DC Balance

_______________________________________________________________________________________ 3

DC ELECTRICAL CHARACTERISTICS (continued)

(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, V

CCO

= +3.0V to +5.5V, PWRDWN = high; SSG = high, open, or low; DCB = high or

low, differential input voltage |V

| = 0.05V to 1.2V, input common-mode voltage VCM= |V

/ 2| to 2.4V - |V

/ 2|, unless otherwise

noted. Typical values are at V

= V

CCO

= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Worst-Case Supply Current I

Power-Down Supply Current I

5V-TOLERANT LOGIC INPUT (PWRDWN)

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I

Input Clamp Voltage V

THREE-LEVEL LOGIC INPUTS (DCB, SSG)

High-Level Input Voltage V

Mid-Level Input Current I

Low-Level Input Voltage V

Input Current I

Input Clamp Voltage V

SINGLE-ENDED OUTPUTS (RxOUT_, RxCLKOUT)

High-Level Output Voltage V

Low-Level Output Voltage V

CCW

CCZ

DC-balanced mode (SSG = low)

CL = 8pF, worst-case pattern, V

= V

to 3.6V, Figure 2 (MAX9246)

PWRDWN = low 50 µA

PWRDWN = high or low level -20 +20 µA

ICL = -18mA -1.5 V

D C B, S S G op en or connected to a d r i ver w i th outp ut i n hi g h- i m p ed ance state ( N ote 3)

DCB, SSG = high or low level, PWRDWN = high or low

ICL = -18mA -1.5 V

IOH = -100µA

IOH = -2mA

IOL = 100µA 0.1

IOL = 2mA

CCO

= 3.0V

Non-DC-balanced mode (SSG = low)

D C -b al anced m od e ( S SG = hi g h or op en)

N on- D C -b al anced m ode ( S SG = hi g h or op en)

RxCLKOUT (Note 4)

RxOUT_

RxCLKOUT (Note 4) 0.2

RxOUT_

6MHz 29 45

8MHz 33 49

18MHz 48 69

8MHz 33 47

10MHz 37 52

20MHz 52 73

6MHz 37 54

8MHz 41 62

18MHz 65 91

8MHz 41 58

10MHz 46 65

20MHz 66 92

2.0 5.5 V

-0.3 +0.8 V

2.5

-10 +10 µA

-0.3 +0.8 V

-20 +20 µA

CCO

- 0.1

CCO

- 0.25

CCO

- 0.43

MAX9254

MAX9254 0.2

CCO

- 0.25

0.3

0.26

MAX9242/MAX9244/MAX9246/MAX9254

21-Bit Deserializers with Programmable Spread Spectrum and DC Balance

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS

(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, V

CCO

= +3.0V to +3.6V, CL= 8pF, PWRDWN = high; SSG = high, open, or low;

DCB = high or low, differential input voltage |V

| = 0.1V to 1.2V, input common-mode voltage VCM= |V

/ 2| to 2.4V - |V

/ 2|, unless

otherwise noted. Typical values are at V

= V

CCO

= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 6, 7, 8)

DC ELECTRICAL CHARACTERISTICS (continued)

(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, V

CCO

= +3.0V to +5.5V, PWRDWN = high; SSG = high, open, or low; DCB = high or

low, differential input voltage |V

| = 0.05V to 1.2V, input common-mode voltage VCM= |V

/ 2| to 2.4V - |V

/ 2|, unless otherwise

noted. Typical values are at V

= V

CCO

= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

High-Impedance Output Current I

Output Short-Circuit Current (Note 5)

Output Short-Circuit Current (MAX9254) (Note 5)

LVDS INPUTS (RxIN__, RxCLKIN_)

Differential Input High Threshold V

Differential Input Low Threshold V

Input Current I

Power-Off Input Current I

Input Resistor 1 R

Input Resistor 2 R

IN+

INO+

, I

IN-

, I

INO-VCC

IN1

IN2

PWRDWN = low, V

= 3.0V to 3.6V,

CCO

= 0V

OUT

= 4.5V to 5.5V,

CCO

= 0V

OUT

= 3.0V to 3.6V,

CCO

= 0V

OUT

= 4.5V to 5.5V,

CCO

= 0V

OUT

= -0.3V to (V

OUT

CCO

RxCLKOUT (Note 4) -10 -40

RxOUT_ -5 -20

RxCLKOUT (Note 4) -28 -75

RxOUT_ -13 -37

RxOUT_

RxCLKOUT (Note 4)

RxOUT_

RxCLKOUT (Note 4)

+ 0.3V) -30 +30 µA

-16 -51

-34 -93

(Note 6) 50 mV

(Note 6) -50 mV PWRDWN = high or low -25 +25 µA

= V

PWRDWN = high or low, V

= V

Figure 1 PWRDWN = high or low,

= V

Figure 1

= 0V or open -40 +40 µA

CCO

-40°C to +85°C 42 78

= 0V or open,

CCO

-40°C to +105°C 42 85

-40°C to +85°C 246 410

= 0V or open,

CCO

-40°C to +105°C 246 440

kΩ

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Output Rise Time CLHT

Output Fall Time CHLT

Output Rise Time (MAX9254) CLHT

Output Fall Time (MAX9254) CHLT

RxIN__ Skew Margin (Note 9) RSKM

0.1 x V

C C O

to 0.9 x V

Fi g ur e 3

0.9 x V

C C O

to 0.1 x V

Fi g ur e 3

0.1 x V

C C O

to 0.9 x V

Fi g ur e 3

0.9 x V

C C O

to 0.1 x V

Fi g ur e 3

DC-balanced mode, Figure 4

Non-DC-balanced mode, Figure 4

RxOUT_ 2.9 4.7 6.5

C C O

RxCLKOUT 2.0 3.3 4.1

RxOUT_ 2.1 3.0 4.2

C C O

RxCLKOUT 1.10 1.94 2.70

C C O

RxOUT_ 1.4 2.2 3.3 ns

C C O

RxCLKOUT 1.1 1.8 2.8 ns

16MHz 2560 3142

34MHz 900 1386

20MHz 2500 3164

40MHz 960 1371

MAX9242/MAX9244/MAX9246/MAX9254

21-Bit Deserializers with Programmable

Spread Spectrum and DC Balance

_______________________________________________________________________________________ 5

Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground,

except V

and VTL.

Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production

tested at T

= +25°C.

Note 3: To provide a mid level, leave the input open, or, if driven, put driver in high impedance. High-impedance leakage current

must be less than ±10µA.

Note 4: RxCLKOUT limits are scaled based on RxOUT_ measurements, design, and characterization data. Note 5: One output shorted at a time. Current out of the pin. Note 6: V

, VTL, and AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set

at ±6 sigma.

Note 7: C

includes probe and test jig capacitance.

Note 8: RCIP is the period of RxCLKIN_. RCOP is the period of RxCLKOUT. Note 9: RSKM is measured with less than 150ps cycle-to-cycle jitter on RxCLKIN_.

AC ELECTRICAL CHARACTERISTICS (continued)

(VCC= LVDSVCC= PLLVCC= +3.0V to +3.6V, V

CCO

= +3.0V to +3.6V, CL= 8pF, PWRDWN = high; SSG = high, open, or low;

DCB = high or low, differential input voltage |V

| = 0.1V to 1.2V, input common-mode voltage VCM= |V

/ 2| to 2.4V - |V

/ 2|, unless

otherwise noted. Typical values are at V

= V

CCO

= LVDSVCC= PLLVCC= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 6, 7, 8)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RxCLKOUT High Time RCOH Figures 5a, 5b

RxCLKOUT Low Time RCOL Figures 5a, 5b

RxOUT_ Setup to RxCLKOUT RSRC Figures 5a, 5b

RxOUT_ Hold from RxCLKOUT RHRC Figures 5a, 5b

RxCLKIN_ to RxCLKOUT Delay RCCD SSG = low, Figures 6a, 6b

Deserializer Phase-LockedLoop Set

Deserializer Power-Down Delay RPDD Figure 8 100 ns

Deserializer Phase-LockedLoop Set from SSG Change

Spread-Spectrum Output Frequency

Spread-Spectrum Modulation Frequency

RPLLS Figure 7

RPLLS2 Figure 9

RxCLKOUT

SSM

0.35 x RCOP

0.3 x

RCOP

0.45 x RCOP

4.5 +

(RCIP / 2)

M axi m um outp ut

SSG = high, Figure 10

SSG = open, Figure 10

SSG = low f

Figure 10

fr eq uency

Minimum output frequency

M axi m um outp ut fr eq uency

Minimum output frequency

RxCLKIN_

+ 3.6%

RxCLKIN_

- 4.4%

RxCLKIN_

+ 1.8%

RxCLKIN_

- 2.2%

RxCLKIN_

6.5 +

(RCIP / 2)

RxCLKIN_

+ 4.0%

RxCLKIN_

- 4.0%

RxCLKIN_

+ 2.0%

RxCLKIN_

- 2.0%

RxCLKIN_

1016

(RCIP / 2)

65,600 x

32,800 x

RxCLKIN_

+ 4.4%

RxCLKIN_

- 3.6%

RxCLKIN_

+ 2.2%

RxCLKIN_

- 1.8%

RxCLKIN_

8.2 +

RCIP

MHz

MAX9242/MAX9244/MAX9246/MAX9254

21-Bit Deserializers with Programmable Spread Spectrum and DC Balance

6 _______________________________________________________________________________________

Test Circuits/Timing Diagrams

Figure 1. LVDS Input Circuits

Figure 2. Worst-Case Test Pattern

Figure 3. Output Load and Transition Times

Figure 4. LVDS Receiver Input Skew Margin

Figure 5a. Rising-Edge Output Setup/Hold and High/Low Times

RxIN_ + OR

RxCLKIN+

IN1

RxIN_ - OR

RxCLKIN-

FAIL-SAFE

IN2

COMPARATOR

VCC - 0.3V

RxOUT_ OR RxCLKOUT

RxIN_ + OR

RxCLKIN+

IN1

RxIN_ - OR

RxCLKIN-

8pF

RCOP

RxCLKOUT

1.2V

DC-BALANCED MODENON-DC-BALANCED MODE

ODD RxOUT

EVEN RxOUT

90%90%

RxOUT_ OR RxCLKOUT

10%10%

IDEAL SERIAL BIT TIME

RSKM RSKM

IDEAL

MIN MAX

INTERNAL STROBE

IDEAL

1.3V

1.1V

RCOP

RxCLK OUT

RxOUT_

2.0V

0.8V

0.8V 0.8V

CHLTCLHT

2.0V

0.8V

2.0V

RCOHRCOL

RHRCRSRC

MAX9242/MAX9244/MAX9246/MAX9254

21-Bit Deserializers with Programmable

Spread Spectrum and DC Balance

_______________________________________________________________________________________ 7

Test Circuits/Timing Diagrams (continued)

Figure 6a. Clock-IN to Clock-OUT Delay (MAX9244/MAX9246/ MAX9254)

Figure 7. Phase-Locked-Loop Set Time

Figure 8. Power-Down Delay

Figure 6b. Clock-IN to Clock-OUT Delay (MAX9242)

Figure 5b. Falling-Edge Output Setup/Hold and High/Low Times

RCOP

RxCLKOUT

RxOUT_

RxCLKIN_

RxCLKOUT

2.0V 2.0V

0.8V 0.8V 0.8V

RCOH RCOL

2.0V

0.8V

RCIP

VID = 0V

RCCD

1.5V

RHRCRSRC

2.0V

0.8V

RCIP

RxCLKIN_

RxCLKOUT

VID = 0V

RCCD

1.5V

PWRDWN

RPLLS

PWRDWN

1.5V

RxCLKIN_

RPDD

RxOUT_

RxCLKOUT

1.5V HIGH IMPEDANCE

RxCLKIN_

RxCLKOUT

HIGH IMPEDANCE

1.5V

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