MAXIM MAX9209, MAX9213 User Manual

General Description

The MAX9209/MAX9213 serialize 21 bits of LVTTL/
LVCMOS parallel input data to three LVDS outputs. A
parallel rate clock on a fourth LVDS output provides
timing for deserialization.

The MAX9209/MAX9213 feature programmable DC bal­ance, which allows isolation between the serializer and
deserializer using AC-coupling. The DC balance circuits
on each channel code the data, limiting the imbalance
of transmitted ones and zeros to a defined range. The
companion MAX9210/MAX9214 deserializers decode
the data. When DC balance is not programmed, the
serializers are compatible with non-DC-balanced, 21-bit
serializers such as the DS90CR215 and DS90CR217.

Two frequency ranges and two DC-balance default
conditions are available for maximum replacement flexi­bility and compatibility with existing non-DC-balanced
serializers.

The MAX9209/MAX9213 are available in TSSOP and
space-saving TQFN packages.

Applications

Automotive Navigation Systems

Automotive DVD Entertainment Systems

Digital Copiers

Laser Printers

Features

o Programmable DC-Balanced or Non-DC-Balanced

Operation

o DC Balance Allows AC-Coupling for Ground-Shift

Tolerance

o As Low as 8MHz Operation

o Pin Compatible with DS90CR215 and DS90CR217

in Non-DC-Balanced Mode

o Integrated 110Ω (DC-Balanced) and 410Ω (Non-

DC-Balanced) Output Resistors

o 5V Tolerant LVTTL/LVCMOS Data Inputs

o PLL Requires No External Components

o Up to 1.785Gbps Throughput

o LVDS Outputs Meet IEC 61000-4-2 and ISO 10605

Requirements

o LVDS Outputs Conform to ANSI TIA/EIA-644

LVDS Standard

o Low-Profile 48-Lead TSSOP and Space-Saving

TQFN Packages

o -40°C to +85°C Operating Temperature Range

o +3.3V Supply

MAX9209/MAX9213

Programmable DC-Balanced

21-Bit Serializers

________________________________________________________________

Maxim Integrated Products

1

Ordering Information

19-2828; Rev 5; 3/12

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

+

Denotes a lead(Pb)-free/RoHS-compliant package.

/V denotes an automotive qualified part.

*EP = Exposed pad.

EVALUATION KIT

AVAILABLE

PART TEMP. RANGE PIN-PACKAGE

-40°C to +85°C 48 TSSOP

-40°C to +85°C 48 TSSOP

-40°C to +105°C 48 TSSOP

MAX9213ETM+ -40°C to +85°C 48 TQFN-EP*

MAX9213EUM+ -40°C to +85°C 48 TSSOP

Pin Configurations appear at end of data sheet.

Functional Diagram

MAX9209
MAX9213

TxIN 0 - 20 21

DCB/NC

TxCLK IN

TIMING

CONTROL

PLL

7X OR 9X

PARALLEL-TO-

SERIAL

CONVERTER

DC-BALANCE

LOGIC

CLOCK

GENERATOR

LVDS DRIVER 0

LVDS DRIVER 1

AND

LVDS DRIVER 2

LVDS CLK

TxOUT0+

TxOUT0-

TxOUT1+

TxOUT1-

TxOUT2+

TxOUT2-

TxCLK OUT+

TxCLK OUT-

MAX9209EUM+

MAX9209EUM/V+

MAX9209GUM+

MAX9209/MAX9213

Programmable DC-Balanced
21-Bit Serializers

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, RL= 100Ω±1%, PWRDWN = high, DCB/NC = high or low, unless otherwise noted. Typical values are at V

CC

= +3.3V, TA= +25°C.) (Notes 1, 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VCCto GND...........................................................-0.5V to +4.0V

LVDS Outputs (TxOUT_, TxCLK OUT_) to GND ...-0.5V to +4.0V
5V Tolerant LVTTL/LVCMOS Inputs

(TxIN_, TxCLK IN, PWRDWN) to GND ..............-0.5V to +6.0V

(DCB/NC) to GND ......................................-0.5V to (V

CC

+ 0.5V)

LVDS Outputs (TxOUT_, TxCLK OUT_)

Short to GND and Differential Short .......................Continuous

Continuous Power Dissipation (multilayer board, T

A

= +70°C)

48-Pin TSSOP (derate 16mW/°C above +70°C) ....... 1282mW

48-Pin TQFN (derate 40mW/°C above +70°C) ..........3200mW

Storage Temperature Range .............................-65°C to +150°C

Junction Temperature......................................................+150°C

ESD Protection

Human Body Model (R

D

= 1.5kΩ, CS= 100pF)

All Pins to GND..............................................................±2kV

IEC 61000-4-2 (R

D

= 330Ω, CS= 150pF)

Contact Discharge (TxOUT_, TxCLK OUT_) to GND ....±8kV

Air Gap Discharge (TxOUT_, TxCLK OUT_) to GND ..±15kV

ISO 10605 (R

D

= 2kΩ, CS= 330pF)

Contact Discharge (TxOUT_, TxCLK OUT_) to GND ....±8kV

Air Gap Discharge (TxOUT_, TxCLK OUT_) to GND ..±25kV

Lead Temperature (soldering, 10s) .................................+300°C

Soldering Temperature (reflow) .......................................+260°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SINGLE-ENDED INPUTS (TxIN_, TxCLK IN, PWRDWN, DCB/NC)

TxIN_, TxCLK IN, PWRDWN 2.0 5.5

High-Level Input Voltage V

Low-Level Input Voltage V

Input Current I

Input Clamp Voltage V

LVDS OUTPUTS (TxOUT_, TxCLK OUT)

Differential Output Voltage V

Change in VOD Between
Complementary Output States

Output Offset Voltage V

Change in VOS Between
Complementary Output States

Output Short-Circuit Current I

Magnitude of Differential Output
Short-Circuit Current

Differential Output Resistance R

∆V

∆V

I

IH

IL

IN

CL

OD

OD

OS

OS

OS

OSD

O

DCB/NC 2.0

V

= hi g h or l ow , P WRDWN = hi g h or l ow -20 +20 µA

IN

ICL = -18mA -0.9 -1.5 V

Figure 1 250 350 450 mV

Figure 1 2 25 mV

Figure 1 1.125 1.25 1.375 V

Figure 1 10 30 mV

V

or V

OUT+

non-DC-balanced mode

V

OUT+

DC-balanced mode

V

OD

(Note 3)

V

OD

DC-balanced mode

Non-DC-balanced
mode

OUT-

or V

OUT-

= 0V, non-DC-balanced mode

= 0V, DC-balanced mode (Note 3) 8.2 15

= 0V or V

= 0V or VCC,

CC,

-40°C to +105°C 78 110 150

-40°C to +105°C 292 410 564

-0.3 +0.8 V

-10 ±5.7 +10

-15 ±8.2 +15

5.7 10

78 110 147

292 410 547

V

+

CC

0.3

V

mA

mA

Ω

MAX9209/MAX9213

Programmable DC-Balanced

21-Bit Serializers

_______________________________________________________________________________________ 3

DC ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.0V to +3.6V, RL= 100Ω±1%, PWRDWN = high, DCB/NC = high or low, unless otherwise noted. Typical values are at V

CC

= +3.3V, TA= +25°C.) (Notes 1, 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Output High-Impedance Current I

Worst-Case Supply Current I

Power-Down Supply Current I

OZ

CCW

CCZ

PWRDWN = low or VCC = 0V,
V

= 0V or 3.6V, V

OUT+

DC-balanced mode,
worst-case pattern,
C

= 5pF, Figure 2

L

Non-DC-balanced
mode, worst-case
pattern, C
Figure 2

PWRDWN = low 17 50 µA

= 5pF,

L

= 0V or 3.6V

OUT-

8MHz MAX9209 40 54

16MHz MAX9209 48 68

34MHz MAX9209 71 90

16MHz MAX9213 46 64

34MHz MAX9213 59 87

66MHz MAX9213 94 108

10MHz MAX9209 30 39

20MHz MAX9209 37 53

33MHz MAX9209 49 70

40MHz MAX9209 56 75

20MHz MAX9213 36 49

33MHz MAX9213 45 62

40MHz MAX9213 49 70

66MHz MAX9213 68 89

85MHz MAX9213 83 100

-0.5 ±0.1 +0.5 µA

mA

MAX9209/MAX9213

Programmable DC-Balanced
21-Bit Serializers

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +3.6V, RL= 100Ω±1%, CL= 5pF, PWRDWN = high, DCB/NC = high or low, unless otherwise noted. Typical values
are at V

CC

= +3.3V, TA= +25°C.) (Notes 4, 5)

LVDS Low-to-High Transition
Time

LVDS High-to-Low Transition
Time

TxCLK IN Transition Time TCIT Figure 4 4 ns

Output Pulse Position TPPosN

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

LLHT Figure 3

LHLT Figure 3

N = 0, 1, 2, 3,
4, 5, 6
non-DC­balanced mode,
Figure 5 (Note 6)

N = 0, 1, 2, 3,
4, 5, 6, 7, 8
DC-balanced
mode, Figure 6
(Note 6)

MAX9209 150 280 400

MAX9213 150 260 350

MAX9209 150 280 400

MAX9213 150 260 350

10MHz MAX9209

20MHz MAX9209

40MHz MAX9209

20MHz MAX9213

40MHz MAX9213

85MHz MAX9213

8MHz MAX9209

16MHz MAX9209

34MHz MAX9209

16MHz MAX9213

34MHz MAX9213

66MHz MAX9213

N/7 x TCIP

- 0.25

N/7 x TCIP

- 0.15

N/7 x TCIP

- 0.1

N/7 x TCIP

- 0.25

N/7 x TCIP

- 0.15

N/7 x TCIP

- 0.1

N/9 x TCIP

- 0.25

N/9 x TCIP

- 0.15

N/9 x TCIP

- 0.1

N/9 x TCIP

- 0.25

N/9 x TCIP

- 0.15

N/9 x TCIP

- 0.1

N/7 x TCIP

N/7 x TCIP

N/7 x TCIP

N/7 x TCIP

N/7 x TCIP

N/7 x TCIP

N/9 x TCIP

N/9 x TCIP

N/9 x TCIP

N/9 x TCIP

N/9 x TCIP

N/9 x TCIP

N/7 x TCIP

+ 0.25

N/7 x TCIP

+ 0.15

N/7 x TCIP

+ 0.1

N/7 x TCIP

+ 0.25

N/7 x TCIP

+ 0.15

N/7 x TCIP

+ 0.1

N/9 x TCIP

+ 0.25

N/9 x TCIP

+ 0.15

N/9 x TCIP

+ 0.1

N/9 x TCIP

+ 0.25

N/9 x TCIP

+ 0.15

N/9 x TCIP

+ 0.1

ps

ps

ns

MAX9209/MAX9213

Typical Operating Characteristics

(VCC= +3.3V, RL= 100Ω±1%, CL= 5pF, PWRDWN = high, TA= +25°C, unless otherwise noted.)

AC ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.0V to +3.6V, RL= 100Ω±1%, CL= 5pF, PWRDWN = high, DCB/NC = high or low, unless otherwise noted. Typical values
are at V

CC

= +3.3V, TA= +25°C.) (Notes 4, 5)

Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground

except V

OD

, ∆VOD, and ∆VOS.

Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production

tested at T

A

= +25°C.

Note 3: Guaranteed by design.
Note 4: TCIP is the period of TxCLK IN.
Note 5: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma.
Note 6: Pulse position TPPosN is characterized using 2

7

- 1 PRBS data.

Programmable DC-Balanced

21-Bit Serializers

_______________________________________________________________________________________ 5

TxCLK IN High Time TCIH Figure 7 0.3 x TCIP 0.7 x TC IP ns

TxCLK IN Low Time TCIL Figure 7 0.3 x TCIP 0.7 x TC IP ns

TxIN to TxCLK IN Setup TSTC Figure 7 2.2 ns

TxIN to TxCLK IN Hold THTC Figure 7 0 ns

TxCLK IN to TxCLK OUT Delay TCCD

Serializer Phase-Locked Loop Set TPLLS Figure 9

Serializer Power-Down Delay TPDD Figure 10 14 50 ns

TxCLK IN Cycle-to-Cycle Jitter
(Input Clock Requirement)

Magnitude of Differential Output
Voltage

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Non-DC-balanced mode, Figure 8 3.5 4.5 6.0

DC-balanced mode, Figure 8 4.7 5.9 7.2

32800 x

TCIP

TJIT 2ns

595Mbps data rate, worst-case
pattern

250 mV

V

OD

ns

ns

WORST-CASE PATTERN AND PRBS
SUPPLY CURRENT vs. FREQUENCY

100

MAX9209
DC-BALANCED MODE

80

60

SUPPLY CURRENT (mA)

40

20

050

WORST-CASE
PATTERN

FREQUENCY (MHz)

27 - 1 PRBS

40302010

MAX9209 toc01

WORST-CASE PATTERN AND PRBS
SUPPLY CURRENT vs. FREQUENCY

100

MAX9209
NON-DC-BALANCED MODE

80

60

SUPPLY CURRENT (mA)

40

20

060

WORST-CASE
PATTERN

FREQUENCY (MHz)

MAX9209 toc02

27 - 1 PRBS

5040302010

WORST-CASE AND PRBS SUPPLY CURRENT

120

100

80

60

SUPPLY CURRENT (mA)

40

20

vs. FREQUENCY

MAX9213
NON-DC-BALANCED MODE

WORST-CASE
PATTERN

27 - 1 PRBS

15 90

FREQUENCY (MHz)

75604530

MAX9209 toc03

MAX9209/MAX9213

Programmable DC-Balanced
21-Bit Serializers

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VCC= +3.3V, RL= 100Ω±1%, CL= 5pF, PWRDWN = high, TA= +25°C, unless otherwise noted.)

WORST-CASE PATTERN AND PRBS

SUPPLY CURRENT vs. FREQUENCY

120

MAX9213
DC-BALANCED MODE

100

WORST-CASE

80

60

SUPPLY CURRENT (mA)

40

20

15 75

PATTERN

27 - 1 PRBS

604530

FREQUENCY (MHz)

MAX9209 toc04

100mV/div

MAX9213

EYE DIAGRAM—NON-DC-BALANCED MODE

100mV/div

TxCLK IN = 85MHz
DC-COUPLED

0V
DIFFERENTIAL

10m OF CAT-5
UTP CABLE

EYE DIAGRAM—NON-DC-BALANCED MODE

MAX9213

TxCLK IN = 85MHz
DC-COUPLED

ALL-CHANNELS
SWITCHING

300ps/div

2m OF CAT-5
UTP CABLE

0V
DIFFERENTIAL

27 - 1 PRBS PATTERN
100Ω TERMINATION

EYE DIAGRAM—DC-BALANCED MODE

TxCLK IN = 66MHz AC-COUPLED
USING 0.1µF CAPACITORS

MAX9209 TOC07

100mV/div

MAX9209 TOC05

100mV/div

EYE DIAGRAM—NON-DC-BALANCED MODE

MAX9213

TxCLK IN = 85MHz
DC-COUPLED

ALL-CHANNELS
SWITCHING

0V
DIFFERENTIAL

300ps/div

5m OF CAT-5
UTP CABLE

27 - 1 PRBS PATTERN
100Ω TERMINATION

MAX9213

2m OF CAT-5
UTP CABLE

MAX9209 TOC08

0V
DIFFERENTIAL

MAX9209 TOC06

27 - 1 PRBS PATTERN
100Ω TERMINATION

300ps/div

MAX9213

0V
DIFFERENTIAL

27 - 1 PRBS PATTERN
100Ω TERMINATION

300ps/div

5m OF CAT-5
UTP CABLE

MAX9209 TOC09

100mV/div

ALL-CHANNELS
SWITCHING

27 - 1 PRBS PATTERN
100Ω TERMINATION

300ps/div

MAX9213

EYE DIAGRAM—DC-BALANCED MODE

TxCLK IN = 66MHz AC-COUPLED
USING 0.1µF CAPACITORS

0V
DIFFERENTIAL

ALL-CHANNELS
SWITCHING

300ps/div

10m OF CAT-5
UTP CABLE

27 - 1 PRBS PATTERN
100Ω TERMINATION

100mV/div

ALL-CHANNELS
SWITCHING

EYE DIAGRAM—DC-BALANCED MODE

TxCLK IN = 66MHz AC-COUPLED
USING 0.1µF CAPACITORS

ALL-CHANNELS
SWITCHING

MAX9209 TOC10