MAXIM MAX9174, MAX9175 User Manual

General Description
The MAX9174/MAX9175 are 670MHz, low-jitter, low­skew 1:2 splitters ideal for protection switching, loop­back, and clock and signal distribution. The devices feature ultra-low 1.0ps
(RMS)
random jitter (max) that ensures reliable operation in high-speed links that are highly sensitive to timing errors.
The MAX9174 has a fail-safe LVDS input and LVDS out­puts. The MAX9175 has an anything differential input (CML/LVDS/LVPECL) and LVDS outputs. The outputs can be put into high impedance using the power-down inputs. The MAX9174 features a fail-safe circuit that dri­ves the outputs high when the input is open, undriven and shorted, or undriven and terminated. The MAX9175 has a bias circuit that forces the outputs high when the input is open. The power-down inputs are compatible with standard LVTTL/LVCMOS logic. The power-down inputs tolerate undershoot of -1V and overshoot of V
CC
+ 1V. The MAX9174/MAX9175 are available in 10-pin µMAX and 10-lead thin QFN with exposed pad pack­ages, and operate from a single +3.3V supply over the
-40°C to +85°C temperature range.
Applications
Protection Switching Loopback Clock Distribution
Features
1.0ps
(RMS)
Jitter (max) at 670MHz
80ps
(P-P)
Jitter (max) at 800Mbps Data Rate
+3.3V Supply
LVDS Fail-Safe Inputs (MAX9174)
Anything Input (MAX9175) Accepts Differential
CML/LVDS/LVPECL
Power-Down Inputs Tolerate -1.0V and VCC+ 1.0V
Low-Power CMOS Design
10-Lead µMAX and Thin QFN Packages
-40°C to +85°C Operating Temperature Range
Conform to ANSI TIA/EIA-644 LVDS Standard
IEC 61000-4-2 Level 4 ESD Rating
MAX9174/MAX9175
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
CLK IN
ASIC
CLOCK DISTRIBUTION
CLK IN
ASIC
CLK1
CLK2
MAX9174
MAX9174
MAX9176
MAX9176
Typical Application Circuit
19-2827; Rev 1; 4/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX9174EUB -40°C to +85°C 10 µMAX
MAX9174ETB* -40°C to +85°C 10 Thin QFN-EP** MAX9175EUB -40°C to +85°C 10 µMAX MAX9175ETB* -40°C to +85°C 10 Thin QFN-EP**
*Future product—contact factory for availability. **EP = Exposed paddle.
Functional Diagram and Pin Configurations appear at end of data sheet.
MAX9174/MAX9175
670MHz LVDS-to-LVDS and Anything-to-LVDS 1:2 Splitters
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND..………………………………………...-0.3V to +4.0V
IN+, IN- to GND...........................................……...-0.3V to +4.0V
OUT_+, OUT_- to GND..........................................-0.3V to +4.0V
PD0, PD1 to GND.......................................-1.4V to (VCC+ 1.4V)
Single-Ended and Differential Output
Short-Circuit Duration (OUT_+, OUT_-) .....................Continuous
Continuous Power Dissipation (T
A
= +70°C)
10-Pin µMAX (derate 5.6mW/°C above +70°C) ...........444mW
10-Lead QFN (derate 24.4mW/°C above +70°C) ......1951mW
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (R
D
= 1.5k, CS= 100pF)
IN+, IN-, OUT_+, OUT_-...............................................…±2kV
Other Pins (V
CC
, PD0, PD1) ...............................................2kV
IEC 61000-4-2 Level 4 (R
D
= 330, CS= 150pF)
Contact Discharge IN+, IN-, OUT_+, OUT_- ...................±8kV
Air-Gap Discharge IN+, IN-, OUT_+, OUT_- .................±15kV
Lead Temperature (soldering, 10s) .................................+300°C
DC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 100Ω ±1%, PD_ = high, differential input voltage |VID| = 0.05V to 1.2V, MAX9174 input common-mode voltage V
CM
= |VID/2| to (2.4V - |VID/2|), MAX9175 input common-mode voltage VCM= |VID/2| to (VCC- | VID/2|), TA= -40°C to
+85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2, 3)
PARAMETER
CONDITIONS
UNITS
DIFFERENTIAL INPUT (IN+, IN-)
V
TH
+50 mV
Differential Input Low Threshold V
TL
-50 mV
Input Current
Figure 1 -20 +20 µA MAX9174 V
CC
= 0V or open, Figure 1
Power-Off Input Current
I
IN+,
I
IN- MAX9175
V
IN+
= 3.6V or 0V, V
IN-
= 3.6V
or 0V, V
CC
= 0V or open,
Figure 1
-20 +20 µA
R
IN1
60 108
Fail-Safe Input Resistors (MAX9174)
R
IN2
V
CC
= 3.6V, 0V or open, Figure 1
200 394
k
Input Resistors (MAX9175)
R
IN3
V
CC
= 3.6V, 0V or open, Figure 1 212 450 k
Input Capacitance C
IN
IN+ or IN- to GND (Note 4) 4.5 pF
LVTTL/LVCMOS INPUTS (PPPPDDDD0000, PPPPDDDD1111)
Input High Voltage V
IH
2.0
V
CC
+
1
V
Input Low Voltage V
IL
V
-1.0V PD_ ≤ 0V
mA
0V PD_ V
CC
-20 +20 µAInput Current I
IN
VCC PD_ VCC + 1.0V
mA
LVDS OUTPUTS (OUT_+, OUT_-)
Differential Output Voltage V
OD
Figure 2 250
475 mV
Change in Differential Output Voltage Between Logic States
V
OD
Figure 2
15 mV
Offset Voltage V
OS
Figure 3
V
SYMBOL
Differential Input High Threshold
MIN TYP MAX
I
IN
+,
I
IN
-
-1.0 +0.8
-1.5
1.125 1.29 1.375
393
1.0
+1.5
MAX9174/MAX9175
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC= +3.0V to +3.6V, RL= 100Ω ±1%, PD_ = high, differential input voltage |VID| = 0.05V to 1.2V, MAX9174 input common-mode voltage V
CM
= |VID/2| to (2.4V - |VID/2|), MAX9175 input common-mode voltage VCM= |VID/2| to (VCC- | VID/2|), TA= -40°C to
+85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 1, 2, 3)
PARAMETER
CONDITIONS
Change in Offset Voltage Between Logic States
V
OS
Figure 3
15 mV
Fail-Safe Differential Output Voltage (MAX9174)
V
OD
Figure 2 250
475 mV
Differential Output Resistance R
DIFF
V
CC
= 3.6V or 0V 86
160
V
OUT_+
= open,
V
OUT_-
= 3.6V or 0V
Power-Down Single-Ended Output Current
I
PD
PD_ = low
V
OUT_-
= open,
_
µA
V
OUT_+
= open,
_
Power-Off Single-Ended Output Current
I
OFF
PD0, PD1 = low, V
CC
= 0V or open
V
OUT_-
= open,
_
µA
VID = +50mV or -50mV, V
OUT_+
= 0V or
V
CC
Output Short-Circuit Current I
OS
_
-15 +15 mA
Differential Output Short-Circuit Current Magnitude
I
OSD
15 mA
PD0 = VCC, PD1 = 0V or PD0 = 0V, PD1 = V
CC
17 26
Supply Current I
CC
PD0 = Vcc, PD1 = Vcc 25 35
mA
Power-Down Supply Current I
CCPD
PD1, PD0
= 0V
20 µA
Output Capacitance C
O
OUT_+ or OUT_- to GND (Note 4) 5.2 pF
SYMBOL
MIN TYP MAX UNITS
1.0
393
119
-1.0 ±0.03 +1.0
V
OUT
V
OUT
V
OUT
VID = +50mV or -50mV, V
OUT
3.6V or 0V
+ =
3.6V or 0V
- =
3.6V or 0V
+ =
= 0V or V
-
-1.0 ±0.03 +1.0
CC
VID = +50mV or -50mV, VOD = 0V (Note 4)
0.5
MAX9174/MAX9175
670MHz LVDS-to-LVDS and Anything-to-LVDS 1:2 Splitters
4 _______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 100±1%, CL= 5pF, differential input voltage |VID| = 0.15V to 1.2V, MAX9174 input common-mode volt­age, V
CM
= |VID/2| to (2.4V - |VID/2|), MAX9175 input common-mode voltage VCM= |VID/2| to (VCC- |VID/2|), PD_ = high, TA= -40°C
to +85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |VID| = 0.2V, VCM= +1.25V, TA= +25°C.) (Notes 5, 6, 7)
PARAMETER
CONDITIONS
UNITS
High-to-Low Propagation Delay t
PHL
Figures 4, 5
ns
Low-to-High Propagation Delay t
PLH
Figures 4, 5
ns
Added Deterministic Jitter t
DJ
Figures 4, 5 (Note 8) 80
ps
(P-P)
Added Random Jitter t
RJ
Figures 4, 5 1.0
ps
(RMS)
Pulse Skew  t
PLH
- t
PHL
t
SKP
Figures 4, 5 10
ps
Output-to-Output Skew t
SKOO
Figure 6 14 45 ps
t
SKPP1
Figures 4, 5 (Note 9) 0.4 1.3
Part-to-Part Skew
t
SKPP2
Figures 4, 5 (Note 10) 1.9
ns
Rise Time t
R
Figures 4, 5
ps
Fall Time t
F
Figures 4, 5
ps
Power-Down Time t
PD
Figures 7, 8 10 13 ns PD0, PD1 = L → H, Figures 7, 8
18 35 µs
PD0 = H, PD1 = L → H, Figures 7, 8 92
Power-Up Time t
PU
PD1 = H, PD0 L H, Figures 7, 8 92
ns
Maximum Data Rate D
RMAX
Figures 4, 5, VOD ≥ 250mV (Note 11)
Mbps
Maximum Switching Frequency f
MAX
Figures 4, 5, VOD ≥ 250mV (Note 11)
MHz
fIN = 670MHz 55 65
Switching Supply Current I
CCSW
fIN = 155MHz 35 44
mA
PRBS Supply Current I
CCPR
DR = 800Mbps, 223 - 1 PRBS input 37 46 mA
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, VTL, VID, VOD, and ∆VOD.
Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are 100% tested at
T
A
= +25°C.
Note 3: Tolerance on all external resistors (including figures) is ±1%. Note 4: Guaranteed by design. Note 5: AC parameters are guaranteed by design and characterization and are not production tested. Limits are set at ±6 sigma. Note 6: C
L
includes scope probe and test jig capacitance.
Note 7: Pulse-generator output for differential inputs IN+, IN- (unless otherwise noted): f = 670MHz, 50% duty cycle, R
O
= 50, tR=
700ps, and t
F
= 700ps (0% to 100%). Pulse-generator output for single-ended inputs PD0, PD1: tR= tF= 1.5ns (0.2VCCto
0.8V
CC
), 50% duty cycle, VOH= VCC+ 1.0V settling to VCC, VOL= -1.0V settling to zero, f = 10kHz.
Note 8: Pulse-generator output for t
DJ
: |VOD| = 0.15V, VOS= 1.25V, data rate 800Mbps, 223- 1 PRBS, RO= 50, tR= 700ps, and t
F
= 700ps (0% to 100%).
Note 9: t
SKPP1
is the magnitude of the difference of any differential propagation delays between devices operating under identical
conditions.
Note 10: t
SKPP2
is the magnitude of the difference of any differential propagation delays between devices operating over rated con-
ditions.
Note 11: Meets all AC specifications.
SYMBOL
MIN TYP MAX
1.33 2.38 3.23
1.33 2.39 3.23
110 257 365 110 252 365
141
103 103
800
670
MAX9174/MAX9175
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
_______________________________________________________________________________________ 5
SUPPLY CURRENT vs. TEMPERATURE
MAX9174 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
603510-15
33
34
35
36
37
38
32
-40 85
fIN = 155MHz
DIFFERENTIAL OUTPUT VOLTAGE
vs. FREQUENCY
MAX9174 toc02
FREQUENCY (MHz)
DIFFERENTIAL OUTPUT VOLTAGE (mV)
700600400 500200 300100
310
320
330
340
350
360
370
380
390
400
410
300
0 800
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9174 toc03
TEMPERATURE (°C)
RISE/FALL TIME (ps)
603510-15
220
230
240
250
260
270
280
290
300
210
-40 85
fIN = 155MHz
t
R
t
F
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
MAX9174 toc04
TEMPERATURE (°C)
DIFFERENTIAL PROPAGATION DELAY (ns)
603510-15
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
2.0
2.1
-40 85
fIN = 155MHz
t
PHL
t
PLH
OUTPUT-TO-OUTPUT SKEW
vs. TEMPERATURE
MAX9174 toc05
TEMPERATURE (°C)
OUTPUT-TO-OUTPUT SKEW (ps)
603510-15
2
4
6
8
10
12
14
16
18
20
0
-40 85
fIN = 155MHz
SUPPLY CURRENT vs. FREQUENCY
MAX9174 toc06
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
700600100 200 300 400 500
25
30
35
40
45
50
55
60
20
0 800
SUPPLY CURRENT vs. DATA RATE
MAX9174 toc07
DATA RATE (Mbps)
SUPPLY CURRENT (mA)
700600500400300200100
25
30
35
40
45
15
20
0 800
PRBS 223 - 1
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX9174 toc08
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
3.53.43.33.23.1
31
32
33
34
35
36
37
38
39
40
30
3.0 3.6
fIN = 155MHz
OUTPUT RISE/FALL TIME
vs. SUPPLY VOLTAGE
MAX9174 toc09
SUPPLY VOLTAGE (V)
RISE/FALL TIME (ps)
3.53.43.33.23.1
210
220
230
240
250
260
270
280
290
300
200
3.0 3.6
fIN = 155MHz
t
F
t
R
Typical Operating Characteristics
((MAX9174) VCC= +3.3V, |VID| = 0.15V, VCM= 1.25V, TA= +25°C, RL= 100Ω ±1%, CL= 5pf, PD_ = VCC, unless otherwise noted.)
Loading...
+ 9 hidden pages