MAXIM MAX9156 User Manual

General Description
The MAX9156 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between LVPECL and LVDS interfaces in systems that require minimum jitter, noise, power, and space.
Ultra-low, 23ps
added deterministic jitter and
0.6ps
RMS
added random jitter ensure reliable commu­nication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-and­data recovery, PLLs, serializers, or deserializers. The MAX9156’s switching performance guarantees a 200Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time.
The MAX9156 operates from a single +3.3V supply and consumes only 10mA supply current over a -40°C to +85°C temperature range. It is available in a tiny 6-pin SC70 package (half the size of a SOT23). Refer to the MAX9155 data sheet for a low-jitter, low-noise LVDS repeater in an SC70 package.
Applications
Digital Cross-Connects
Add/Drop Muxes
Network Switches/Routers
Cellular Phone Base Stations
DSLAMs
Multidrop Buses
Features
Tiny SC70 Package
Ultra-Low Jitter
23ps
p-p
Added Deterministic Jitter
(2
23
-1 PRBS)
0.6ps
RMS
Added Random Jitter
0.5ns (min) Transition Time Minimizes Radiated
Noise
200Mbps Guaranteed Data Rate
Low 10mA Supply Current
Output Conforms to ANSI/EIA/TIA-644 LVDS
Standard
High-Impedance Inputs and Outputs in
Power-Down Mode
MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
Translator in an SC70 Package
________________________________________________________________ Maxim Integrated Products 1
Pin Configuration
19-2216; Rev 0; 10/01
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
Typical Operating Circuit
PART TEMP. RANGE
MAX9156EXT-T -40°C to +85°C 6 SC70-6 ABD
PIN -
PA C K A G E
TOP
M ARK
TOP VIEW
V
CC
OUT-
GND
LVPECL DRIVER
3.3V
IN+
IN-
MAX9156
GND
OUT+
OUT-
LVDS
SIGNALS
MAX9156
1 6 OUT+
2
34
SC70
5V
CC
IN+IN-
MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +4.0V
IN+, IN- to GND.....................................................-0.3V to +4.0V
OUT+, OUT- to GND .............................................-0.3V to +4.0V
Short-Circuit Duration (OUT+, OUT-) .........................Continuous
Continuous Power Dissipation (T
A
= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
ESD Protection
Human Body Model, IN+, IN-, OUT+, OUT- ....................±8kV
Lead Temperature (soldering, 10s) .................................+300°C
DC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 100Ω ±1%, |V
ID
|
= 0.05V to VCC, VCM= |VID/ 2|to VCC- |VID/ 2|, TA= -40°C to +85°C, unless otherwise
noted. Typical values at V
CC
= +3.3V, TA= +25°C.) (Notes 1, 2)
LVPECL INPUT
Differential Input High Threshold V
Differential Input Low Threshold V
Input Resistor R
Input Current I
Power-Off Input Current I
LVDS OUTPUT
Differential Output Voltage V
Differential Output Voltage ∆V
Offset (Common-Mode) Voltage V
Change in VOS for Complementary Output States
Output High Voltage V
Output Low Voltage V
Differential Output Voltage V
Power-Off Output Leakage Current
Differential Output Resistance RO
Output Short Current I
POWER SUPPLY
Supply Current I
PARAMETER SYMBOL CONDITIONS MIN TYP MAX U N I T S
TH
TL
Figure 1 360 1328 k
IN
IN+ = 3.6V, IN- = 0 -10 2.7 10
, I
IN+
IN-
IN+ = 0, IN- = 3.6V -10 2.7 10
, I
IN+
OD
OD
OS
V
OS
OH
OL
OD+
IO
OFF
DIFFVCC
SC
CC
VCC = 0,
IN-
Figure 1
Figure 2 250 360 450 mV
Figure 2 0.008 25 mV
Figure 2 1.125 1.25 1.375 V
Figure 2 0.005 25 mV
IN+, IN- open +250 +360 +450 mV
VCC = 0
= +3.6V or 0 100 260 400
VID = +50mV, OUT+ = GND -5 -15
VID = -50mV, OUT- = GND -5 -15
750mV
-50 -7 mV
IN+ = 3.6V, IN- = 0 -10 2.7 10
IN+ = 0, IN- = 3.6V -10 2.7 10
1.44 1.6 V
0.9 1.08 V
O U T+ = 3.6V , other outp ut op en -10 0.02 10
O U T- = 3.6V , other outp ut op en -10 0.02 10
10 15 mA
µA
µA
µA
mA
MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
Translator in an SC70 Package
_______________________________________________________________________________________ 3
Note 1: All devices are 100% tested at TA= +25°C. Limits over temperature are guaranteed by design and characterization. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, VTL, VOD, and ∆VOD.
Note 3: Guaranteed by design and characterization. Note 4: Signal generator output (unless otherwise noted): frequency = 100MHz, 50% duty cycle, R
O
= 50, tR= 1.5ns, and tF=
1.5ns (0% to 100%).
Note 5: C
L
includes scope probe and test jig capacitance.
Note 6: Signal generator output for t
DJ
: VOD= 150mV, VOS= 1.2V, tDJincludes pulse (duty cycle) skew.
Note 7: Signal generator output for t
RJ
: VOD= 150mV, VOS= 1.2V.
Note 8: t
SKPP1
is the magnitude difference of any differential propagation delays between devices operating over rated conditions
at the same supply voltage, input common-mode voltage, and ambient temperature.
Note 9: t
SKPP2
is the magnitude difference of any differential propagation delays between devices operating over rated conditions.
Note 10: Device meets V
OD
DC specification and AC specifications while operating at f
MAX
.
Note 11: Jitter added to the input signal.
AC ELECTRICAL CHARACTERISTICS
(VCC= +3.0V to +3.6V, RL= 100±1%, CL= 10pF, |V
ID
|
= 0.15V to VCC, VCM= |VID/ 2|to VCC- |VID/ 2|, TA= -40°C to +85°C, unless
otherwise noted. Typical values at V
CC
= +3.3V, TA= +25°C.) (Notes 3, 4, 5) (Figures 3, 4)
p-p
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Added Deterministic Jitter (Notes 6, 11)
Added Random Jitter (Notes 7, 11) t
Differential Part-to-Part Skew (Note 8) t
Differential Part-to-Part Skew (Note 9) t
Switching Supply Current I
Rise Time t
Fall Time t
Input Frequency (Note 10) f
PARAMETER SYMBOL CONDITIONS MIN TYP MAX U N I T S
t
PHLD
t
PLHD
t
DJ
RJ
SKPP1
SKPP2
CCSW
TLH
THL
MAX
1.3 2.0 2.8 ns
1.3 2.0 2.8 ns
200Mbps 223-1 PRBS data pattern 23 100 ps
fIN = 100MHz 0.6 2.9 ps
0.17 0.6 ns
1.5 ns
11.3 18 mA
0.5 0.66 1.0 ns
0.5 0.64 1.0 ns
100 MHz
RMS
MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package
4 _______________________________________________________________________________________
Typical Operating Characteristics
(VCC= +3.3V, RL= 100±1%, CL= 10pF, |V
ID
|
= 0.2V, VCM= 1.2V, TA= +25°C, unless otherwise noted. Signal generator output:
frequency = 100MHz, 50% duty cycle, R
O
= 50, tR= 1.5ns, and tF= 1.5ns (0% to 100%), unless otherwise noted.)
SUPPLY CURRENT
21
18
15
12
9
6
SUPPLY CURRRENT (mA)
3
0
VS. INPUT FREQUENCY
0 10050 150 20025 12575 175 225 250
INPUT FREQUENCY (MHz)
OUTPUT SHORT-CIRCUIT CURRENT
5.10
5.09
5.08
5.07
5.06
OUTPUT SHORT-CIRCUIT CURRENT (mA)
5.05
3.0 3.23.1 3.3 3.4 3.5 3.6
VS. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
12.00
11.75
MAX9156 toc01
11.50
11.25
11.00
10.75
SUPPLY CURRENT (mA)
10.50
10.25
10.00
SWITCHING SUPPLY CURRENT
VS. TEMPERATURE
MAX9156 toc02
-40 -15 10 35 60 85 TEMPERATURE (°C)
MAX9156 toc03
OUTPUT LOW VOLTAGE
1.12
1.11
1.10
1.09
1.08
1.07
OUTPUT LOW VOLTAGE (V)
1.06
1.05
3.0 3.23.1 3.3 3.4 3.5 3.6
VS. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY
2.5
2.3
2.1
1.9
1.7
DIFFERENTIAL PROPAGATION DELAY (ns)
1.5
-40 10-15 35 60 85
VS. TEMPERATURE
TEMPERATURE (°C)
t
PLHD
t
PHLD
1.550
1.525
MAX9156 toc04
1.500
1.475
1.450
1.425
OUTPUT HIGH VOLTAGE (V)
1.400
1.375
1.350
3.0 3.23.1 3.3 3.4 3.5 3.6
MAX9156 toc07
OUTPUT HIGH VOLTAGE
VS. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY
2.1
MAX9156 toc05
2.0
1.9
1.8
DIFFERENTIAL PROPAGATION DELAY (ns)
1.7
3.0 3.33.1 3.2 3.4 3.5 3.6
VS. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
TRANSITION TIME
750
725
700
675
650
625
TRANSITION TIME (ps)
600
575
550
3.0 3.23.1 3.3 3.4 3.5 3.6
VS. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
t
PLHD
t
PHLD
t
THL
MAX9156 toc08
t
TLH
MAX9156 toc06
Detailed Description
The LVDS interface standard is a signaling method intended for point-to-point communication over a con­trolled-impedance medium, as defined by the ANSI/ TIA/EIA-644 and IEEE 1596.3 standards. The LVDS standard uses a lower voltage swing than other com­mon communication standards, achieving higher data rates with reduced power consumption while reducing EMI emissions and system susceptibility to noise.
The MAX9156 is a 200Mbps LVDS translator intended for high-speed, point-to-point, low-power applications. The MAX9156 accepts differential LVPECL inputs and produces an LVDS output. The input voltage range includes signals from GND up to VCC, allowing interop­eration with 3.3V LVPECL devices.
The MAX9156 provides a high output when the inputs are open. See Table 1.
MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
Translator in an SC70 Package
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VCC= +3.3V, RL= 100±1%, CL= 10pF, |V
ID
|
= 0.2V, VCM= 1.2V, TA= +25°C, unless otherwise noted. Signal generator output:
frequency = 100MHz, 50% duty cycle, R
O
= 50, tR= 1.5ns, and tF= 1.5ns (0% to 100%), unless otherwise noted.)
Pin Description
Note: VID= (IN+ - IN-), VOD= (OUT+ - OUT-)
High = 450mV ≥ V
OD
250mV
Low = -250mV ≥ V
OD
-450mV
Table 1. Function Table (Figure 2)
800
750
700
650
600
550
TRANSITION TIME (ps)
500
450
400
-40 -15 10 35 60 85
PIN NAME FUNCTION
1 OUT- Inverting LVDS Output
2 GND Ground
3 IN- Inverting LVPECL-Compatible Input
4 IN+
5V
6 OUT+ Noninverting LVDS Output
50mV > VID > -50mV Indeterminate
CC
INPUT, V
ID
> 50mV High
< -50mV Low
Open High
TRANSITION TIME
VS. TEMPERATURE
t
TLH
TEMPERATURE (°C)
Noninverting LVPECL-Compatible Input
Power Supply. Bypass VCC to GND with a 0.01µF ceramic capacitor.
, t
THL
OUTPUT, V
OD
MAX9156 toc09
DIFFERENTIAL OUTPUT VOLTAGE
600
500
400
300
200
100
DIFFERENTIAL OUTPUT VOLTAGE (mV)
0
25 150
VS. LOAD RESISTOR
MAX9156 toc10
7550 100 125
LOAD RESISTOR ()
MAX9156
Applications Information
Supply Bypassing
Bypass VCCwith a high-frequency surface-mount ceramic 0.01µF capacitor as close to the device as possible.
Differential Traces
Input and output trace characteristics affect the perfor­mance of the MAX9156. Use controlled-impedance dif­ferential traces. Ensure that noise couples as common mode by running the traces within a differential pair close together.
Maintain the distance within a differential pair to avoid discontinuities in differential impedance. Avoid 90° turns and minimize the number of vias to further prevent impedance discontinuities.
Cables and Connectors
The LVDS standards define signal levels for intercon­nect with a differential characteristic impedance and termination of 100. Interconnects with a characteristic impedance and termination of 90to 132impedance are allowed, but produce different signal levels (see Termination).
LVPECL signals are typically specified for 50single­ended characteristic impedance interconnect terminat­ed through 50to VCC- 2V.
Use cables and connectors that have matched differen­tial impedance to minimize impedance discontinuities.
Termination
For point-to-point LVDS links, the termination resistor should be located at the LVDS receiver input and
match the differential characteristic impedance of the transmission line.
Each line of a differential LVPECL link should be termi­nated through 50to V
CC
- 2V or be replaced by the
Thevinin equivalent.
The LVDS output voltage level depends upon the differ­ential characteristic impedance of the interconnect and the value of the termination resistance. The MAX9156 is guaranteed to produce LVDS output levels into 100Ω. With the typical 3.6mA output current, the MAX9156 pro­duces an output voltage of 360mV when driving a 100 transmission line terminated with a 100termination resistor (3.6mA ✕100= 360mV). For typical output lev­els with different loads, see the Differential Output Voltage vs. Load Resistor typical operating curve.
Chip Information
TRANSISTOR COUNT: 401
PROCESS: CMOS
Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package
6 _______________________________________________________________________________________
MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level
Translator in an SC70 Package
_______________________________________________________________________________________ 7
Figure 2. DC Load Test Circuit
Figure 3. Transition Time and Propagation Delay Test Circuit
Test Circuits and Timing Diagrams
Figure 1. LVPECL Input Bias
Figure 4. Transition Time and Propagation Delay Timing Diagram
IN+
IN-
1.25V
1.20V
1.25V
1.20V
IN+
IN-
V
CC
R
IN
OUT+
OUT-
R
IN
OUT+
/2
R
L
V
OD
RL/2
OUT-
V
OS
OUT+
C
L
PULSE
GENERATOR
IN+
IN-
R
L
5050
C
L
OUT-
V
= ((IN+) + (IN-))/2
CM
IN+
OUT-
OUT+
V
DIFF
IN-
O (DIFFERENTIAL)
t
PLHD
O (DIFFERENTIAL)
80% 80%
O (DIFFERENTIAL)
20% 20%
t
TLH
V
V
= (OUT+) - (OUT-)
DIFF
ID
O (DIFFERENTIAL)
t
PHLD
O (DIFFERENTIAL)
O (DIFFERENTIAL)
t
THL
MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
SC70, 6L.EPS
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