The MAX913 single and MAX912 dual high-speed,
low-power comparators have differential inputs and
complementary TTL outputs. Fast propagation delay
(10ns typ), extremely low supply current, and a wide
common-mode input range that includes the negative
rail make the MAX912/MAX913 ideal for low-power,
high-speed, single +5V (or ±5V) applications such as
V/F converters or switching regulators.
The MAX912/MAX913 outputs remain stable through
the linear region. This feature eliminates output instability
common to high-speed comparators when driven with a
slow-moving input signal.
The MAX912/MAX913 can be powered from a single
+5V supply or a ±5V split supply. The MAX913 is an
improved plug-in replacement for the LT1016. It provides significantly wider input voltage range and equiva-
lent speed at a fraction of the power. The MAX912 dual
comparator has equal performance to the MAX913 and
includes independent latch controls.
________________________Applications
Zero-Crossing Detectors
Ethernet Line Receivers
Switching Regulators
High-Speed Sampling Circuits
High-Speed Triggers
Extended Range V/F Converters
Fast Pulse Width/Height Discriminators
____________________________Features
♦ Ultra Fast (10ns)
♦ Single +5V or Dual ±5V Supply Operation
♦ Input Range Extends Below Negative Supply
♦ Low Power: 6mA (+5V) Per Comparator
♦ No Minimum Input Signal Slew-Rate Requirement
♦ No Power-Supply Current Spiking
♦ Stable in the Linear Region
♦ Inputs Can Exceed Either Supply
♦ Low Offset Voltage: 0.8mV
______________Ordering Information
PARTTEMP. RANGEPIN-PACKAGE
MAX912CPE
MAX912CSE0°C to +70°C16 Narrow SO
MAX912C/D0°C to +70°CDice*
MAX912EPE-40°C to +85°C16 Plastic DIP
MAX912ESE-40°C to +85°C16 Narrow SO
MAX912MJE-55°C to +125°C16 CERDIP
MAX913CPA
MAX913CSA0°C to +70°C8 SO
MAX913C/D0°C to +70°CDice*
MAX913EPA-40°C to +85°C8 Plastic DIP
MAX913ESA-40°C to +85°C8 SO
MAX913MJA-55°C to +125°C8 CERDIP
* Dice are specified at TA= +25°C, DC parameters only.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
MAX912/MAX913
(V+ = +5V, V- = -5V, VQ= 1.4V, VLE= 0V, TA= T
PARAMETER
Input Offset Voltage (Note 1)V
Offset DriftTCV
Input Offset Current (Note 1)I
Input Bias CurrentI
Input Voltage RangeV
Common-Mode Rejection RatioCMRR
Power-Supply Rejection RatioPSRR
Small-Signal Voltage GainA
Output Voltage
Positive Supply Current Per
Comparator
Negative Supply Current Per
Comparator
Latch-Pin High Input VoltageV
Latch-Pin Low Input VoltageV
Latch-Pin CurrentI
SYMBOLMINTYPMAX
OS
OS
OS
B
CM
V
V
OH
V
OL
I+
I-0.42mA
IH
IL
IL
to T
MIN
MAX
RS≤ 100Ω
C, E temp. ranges8
M temp. range10
C, E temp. ranges
M temp. range
Latch Setup Time (Note 3)ns
Latch Hold Time (Note 3)ns
Latch Propagation Delay (Note 4)ns
SU
H
LPD
Note 1: Input Offset Voltage (VOS) is defined as the average of the two input offset voltages, measured by forcing first one output,
then the other to 1.4V. Input Offset Current (I
Note 2: Propagation Delay (tPD) and Differential Propagation Delay (∆tPD) cannot be measured in automatic handling equipment
with low input overdrive values. The MAX912/MAX913 are sample tested to 0.1% AQL with a 1V step and 500mV overdrive
at +25°C only. Correlation tests show that t
formed to guarantee that all internal bias conditions are correct. For low overdrive conditions, VOSis added to the overdrive. Differential Propagation Delay is defined as: ∆tPD= t
Note 3: Input latch setup time (tSU) is the interval in which the input signal must be stable prior to asserting the latch signal.
The hold time (t
guaranteed by design.
Note 4: Latch Propagation Delay (t
See Timing Diagram.
) is the interval after the latch is asserted in which the input signal must be stable. These parameters are
H
) is the delay time for the output to respond when the latch-enable pin is deasserted.
LPD
to T
MIN
, unless otherwise noted).
MAX
CONDITIONS
∆VIN= 100mV,
VOD= 5mV
∆VIN= 100mV,
VOD= 20mV
∆VIN= 100mV,
VOD= 5mV
∆VIN= 100mV,
VOD= 5mV
(MAX912 only)
) is defined the same way.
OS
and ∆t
PD
can be guaranteed with this test, if additional DC tests are per-