MAXIM MAX8556, MAX8557 Technical data

General Description
The MAX8556/MAX8557 low-dropout linear regulators operate from input voltages as low as 1.425V and are able to deliver up to 4A of continuous output current with a typical dropout voltage of only 100mV. The out­put voltage is adjustable from 0.5V to V
IN
Designed with an internal p-channel MOSFET pass tran­sistor, the MAX8556/MAX8557 maintain a low 800µA typi­cal supply current, independent of the load current and dropout voltage. Using a p-channel MOSFET eliminates the need for an additional external supply or a noisy inter­nal charge pump. Other features include a logic-con­trolled shutdown mode, built-in soft-start, short-circuit protection with foldback current limit, and thermal-over­load protection. The MAX8556 features a POK output that transitions high when the regulator output is within ±10% of its nominal output voltage. The MAX8557 offers a power-on reset output that transitions high 140ms after the output has achieved 90% of its nominal output voltage.
The MAX8556/MAX8557 are available in a 16-pin thin QFN 5mm x 5mm package with exposed paddle.
Applications
Servers and Storage Devices
Networking
Base Stations
Optical Modules
Point-of-Load Supplies
ATE
Features
o 1.425V to 3.6V Input Voltage Range
o Guaranteed 4A Output Current
o ±1% Output Accuracy Over Load/Line/
Temperature
o 100mV Dropout at 4A Load (typ)
o Built-In Soft-Start
o 800µA (typ) Operating Supply Current
o 150µA (max) Shutdown Supply Current
o Short-Circuit Current Foldback Protection
o Thermal-Overload Protection
o ±10% Power-OK (MAX8556)
o 140ms Power-On Reset Output (MAX8557)
o Fast Transient Response
o 16-Pin Thin QFN (5mm x 5mm) Package
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage
LDO Regulators
________________________________________________________________
Maxim Integrated Products
1
Pin Configuration
Ordering Information
IN
EN
GND
OUT
FB
N.C.
POK (POR)
V
IN
1.425V TO 3.6V
V
OUT
0.5V TO VIN - 0.2V
MAX8556
(MAX8557)
Typical Operating Circuit
19-3257; Rev 1; 8/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
+
Denotes a lead-free/RoHS-compliant package.
PART TEMP RANGE
MAX8556ETE+ -40°C to +85°C
MAX8557ETE+ -40°C to +85°C
PIN­PACKAGE
16 Thin QFN 5mm x 5mm 16 Thin QFN 5mm x 5mm
FEATURE
POK
POR
TOP VIEW
GND
N.C.
13
FB
14
15
16
EN
+
OUT
POK (POR)
12 11 10 9
MAX8556
(MAX8557)
1234
IN
IN
THIN QFN
5mm x 5mm
OUT
IN
OUT
IN
OUT
8
OUT
7
IN
6
IN
5
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage LDO Regulators
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
EN
= V
IN
= 1.8V, V
OUT
= 1.5V, I
OUT
= 2mA, TA = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
IN, EN, POK, POR to GND .......................................-0.3V to +4V
FB, OUT to GND ..........................................-0.3V to (V
IN
+ 0.3V)
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (T
A
= +70°C) 16-Pin Thin QFN (derate 33.3mW/°C
above +70°C) (Note 1)............................................2666.7mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Maximum power dissipation is obtained using JEDEC JESD51-5 and JESD51-7 standards.
IN
Input Voltage Range 1.425 3.600 V
Input Undervoltage Lockout
OUT
Output Voltage Range 0.5 3.4 V
Load Regulation I
Line Regulation V
Dropout Voltage V
Regulated Output-Voltage Current Limit
Load Capacitance ESR < 50mA 16 120 µF
FB
FB Threshold Accuracy (Note 3)
FB Input Bias Current V
GND
GND Supply Current
GND Shutdown Current V
POK
FB Power-OK Fault Threshold
POK Output Voltage, Low V
PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN rising, 70mV hysteresis 1.30 1.35 1.40
falling 1.23 1.28 1.33
V
IN
= 2mA to 4A 0.1 %/A
OUT
= 1.425V to 3.6V, V
IN
= 1.425V, I
IN
V
= 3.6V, V
IN
V
= 1.225V to 3V, V
OUT
I
= 2mA to 4A
OUT
= 0.5V, V
FB
V
= 1.425V to 3.6V, V
IN
Dropout, V
IN
FB moving out of regulation, V
IN
FB
IN
= 3.6V, EN = GND 150 µA
= 1.425V to 3.6V, 10mV hysteresis
= 0.4V or 0.6V, I
= 4A, V
OUT
= 3V, V
OUT
= 3.6V 0.001 1 µA
IN
= 3.6V, V
POK
= 1.225V -0.15 0 +0.15 %/V
OUT
= 480mV 100 200 mV
FB
= 460mV 5 7 9 A
FB
= V
IN
OUT
= 480mV 1000 2000
FB
= 2mA 25 200 mV
+ 0.2V to 3.6V,
OUT
= 1.225V 800 1600
FB high 540 550 560
FB low 440 450 460
495 500 505 mV
V
µA
mV
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage
LDO Regulators
_______________________________________________________________________________________ 3
Note 2: Specifications to TA= -40°C are guaranteed by design and not production tested. Note 3: Minimum supply voltage for output accuracy must be at least 1.425V.
ELECTRICAL CHARACTERISTICS (continued)
(V
EN
= V
IN
= 1.8V, V
OUT
= 1.5V, I
OUT
= 2mA, TA = -40°C to +85°C, typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
Typical Operating Characteristics
(V
EN
= VIN= +1.8V, V
OUT
= +1.5V, I
OUT
= 4A, C
OUT
= 20µF, CIN= 20µF, and TA= +25°C, unless otherwise noted.)
OUTPUT VOLTAGE vs. INPUT VOLTAGE
MAX8556 toc01
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
3.02.41.8
1.35
1.40
1.45
1.50
1.55
1.30
1.2 3.6
TA = -25°C T
A
= -40°C
TA = -85°C
I
LOAD
= 2A
OUTPUT VOLTAGE vs. LOAD CURRENT
MAX8556 toc02
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)
321
1.4980
1.4985
1.4990
1.4995
1.5000
1.5005
1.5010
1.5015
1.5020
1.5025
1.4975 04
TA = -40°C
TA = +85°C
TA = +25°C
GND CURRENT vs. INPUT VOLTAGE
MAX8556 toc03
INPUT VOLTAGE (V)
GND CURRENT (μA)
2.41.2
100
200
300
400
500
600
700
800
900
1000
0
0 3.6
I
LOAD
= 4A
I
LOAD
= 2A
I
LOAD
= 0A
PARAMETER CONDITIONS MIN TYP MAX UNITS
POK Output Current, High V
POK Delay Time From FB rising to POK high 25 50 100 µs
EN
Enable Input Threshold V
Enable Input Bias Current V
THERMAL SHUTDOWN
Thermal-Shutdown Threshold Output on and off
POR
FB Power-On Reset Fault Threshold FB falling, V
POR Output Voltage, Low V
POR Output Current, High V
POR Rising Delay Time FB rising to POR high impedance 100 140 200 ms
SOFT-START
Soft-Start Time 100 µs
= 3.6V V
POK
= 1.425V to 3.6V
IN
= 0V or 3.6V -1 +1 µA
EN
= 0.5 0.001 1 µA
FB
EN rising 1.25
EN falling 0.4
TJ rising +160
falling +115
T
J
= 1.425V to 3.6V, 10mV hysteresis 440 450 460 mV
IN
= 0.4V, I
FB
= 3.6V, VFB = 0.5V 0.001 1 µA
POR
= 2mA 25 200 mV
POR
V
°C
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage LDO Regulators
4 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
EN
= VIN= +1.8V, V
OUT
= +1.5V, I
OUT
= 4A, C
OUT
= 20µF, CIN= 20µF, and TA= +25°C, unless otherwise noted.)
GND CURRENT vs. TEMPERATURE
MAX8556 toc04
TEMPERATURE (°C)
GND CURRENT (μA)
603510-15
100
200
300
400
500
600
700
800
900
0
-40 85
I
LOAD
= 2A
I
LOAD
= 0A
DROPOUT VOLTAGE vs. LOAD CURRENT
MAX8556 toc05
LOAD CURRENT (A)
DROPOUT VOLTAGE (mV)
3.53.02.0 2.51.0 1.50.5
10
20
30
40
50
60
70
80
90
0
0 4.0
VIN = 1.5V
LINE-TRANSIENT RESPONSE
MAX8556 toc06
100μs/div
1.8V
10mV/div
2.5V V
IN
V
OUT
(AC-COUPLED)
4A LOAD-TRANSIENT RESPONSE
MAX8556 toc07
40μs/div
2A/div
50mV/div
V
OUT
(AC-COUPLED)
I
OUT
2A LOAD-TRANSIENT RESPONSE
MAX8556 toc08
40μs/div
1A/div
50mV/div
V
OUT
(AC-COUPLED)
I
OUT
ENABLE WAVEFORMS
MAX8556 toc09
100μs/div
1V/div
2V/div
V
EN
V
OUT
SHORT-CIRCUIT WAVEFORMS
MAX8556 toc10
200μs/div
1V/div
5A/div
2V/div
V
IN
3.6V
V
OUT
I
OUT
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage
LDO Regulators
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(V
EN
= VIN= +1.8V, V
OUT
= +1.5V, I
OUT
= 4A, C
OUT
= 20µF, CIN= 20µF, and TA= +25°C, unless otherwise noted.)
PSRR vs. FREQUENCY
90
80
70
60
50
40
PSRR (dB)
30
20
10
0
1 1000
FREQUENCY (kHz)
EXPOSED PADDLE TEMPERATURE
vs. AMBIENT TEMPERATURE
100
90
80
70
60
50
40
30
20
EXPOSED PADDLE TEMPERATURE (°C)
10
0
085
DATA TAKEN USING MAX8556 EVALUATION KIT
AMBIENT TEMPERATURE (°C)
VIN = 2.5V
= 1A
I
LOAD
10010
MAX8556 toc11
MAX8556 toc13
68513417
STARTUP WAVEFORMS
V
IN
I
IN
V
OUT
100μs/div
FB REGULATION vs. TEMPERATURE
0.510
0.505
0.500
FB (V)
0.495
I
0.490
-40 85 TEMPERATURE (°C)
LOAD
MAX8556 toc12
2V/div
2A/div
1V/div
MAX8556 toc14
= 50mA
603510-15
FOLDBACK CURRENT-LIMIT WAVEFORMS
V
OUT
I
OUT
100μs/div
MAX8556 toc15
500mV/div
5A/div
8.0
7.8
7.6
7.4
7.2
7.0
6.8
6.6
CURRENT-LIMIT THRESHOLD (A)
6.4
6.2
6.0
-40 85
vs. TEMPERATURE
MAX8556 toc16
603510-15
TEMPERATURE (°C)
CURRENT-LIMIT THRESHOLD
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage LDO Regulators
6 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1–6 IN
LDO Input. Connect to a 1.425V to 3.6V input voltage. Bypass with a 22µF ceramic capacitor to GND.
7–11 OUT
LDO Output. Bypass with 2 x 10µF ceramic capacitors to GND. A smaller capacitance can be used if the maximum load current is less than 4A.
POK
Power-OK Output. Open-drain output that pulls low when V
OUT
is outside ±10% of the expected
regulation voltage or when EN is low. POK is high impedance when V
OUT
is within ±10% of the
nominal output voltage. Connect a resistor from POK to a logic supply of less than 3.6V.
12
POR
Power-On Reset. Open-drain output goes high impedance 140ms after the output is above 90% of its nominal regulation voltage. POR pulls low immediately after an output fault or when EN is low. Connect a resistor from POR to a logic supply of less than 3.6V.
13 FB
Feedback Input. V
FB
is regulated to 0.5V. Connect to the center tap of a resistor-divider from output
to GND to set the desired output voltage.
14 GND Ground
15 N.C. Connect to GND or Floating
16 EN
Enable Input. Connect to GND or a logic low to shut down the device. Connect to IN or a logic high for normal operation.
EP Exposed Paddle. Connect to GND and to a ground plane for heatsinking.
Block Diagram
(MAX8556)
(MAX8557)
IN
THRESHOLD
THERMAL­OVERLOAD
PROTECTION
EN
GND
SHUTDOWN
LOGIC
MAX8556
(MAX8557)
REF
0.50V
0.45V
0.55V
UNDERVOLTAGE
LOCKOUT
ERROR
AMP
CURRENT-
LIMIT
COMPARATOR
POK (POR) CIRCUITRY
P
OUT
FB
POK (POR)
N
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage
LDO Regulators
_______________________________________________________________________________________ 7
Detailed Description
The MAX8556/MAX8557 low-dropout linear regulators are capable of delivering up to 4A from low-input volt­age supplies ranging from 1.425V to 3.6V with only 200mV of dropout (max). The PMOS output stage can be driven from input voltages down to 1.425V without sacrificing stability or transient performance. Supply current is not a significant function of load or input head­room because this regulator has a PMOS output device.
The MAX8556/MAX8557 are fully protected from an out­put short circuit by current-limiting and thermal-overload circuitry. The low-power shutdown mode reduces sup­ply current to 0.2µA (typ) to maximize battery life in portable applications. The MAX8556 includes an open­drain power-OK signal (POK) that goes high when the regulator output is within ±10% of its nominal output voltage. The MAX8557 includes an open-drain power­on-reset output (POR) that goes high 140ms after the output has risen above 90% of its nominal value.
Internal P-Channel Pass Transistor
The MAX8556/MAX8557 feature a 25mΩ p-channel MOSFET pass transistor. Unlike similar designs using pnp pass transistors, p-channel MOSFETs require no base drive, which reduces quiescent current; pnp­based regulators also waste considerable current in dropout when the pass transistor saturates, and use high base-drive currents under large loads. The MAX8556/MAX8557 do not suffer from these problems and consume only 800µA (typ) of quiescent current under heavy loads, as well as in dropout.
Short-Circuit/Thermal Fault Protection
The MAX8556/MAX8557 are fully protected from output short circuits through current-limiting and thermal-over­load circuitry. When the output is shorted to ground, the output current is foldback limited to 3A (max). Under these conditions, the device quickly heats up. When the junction temperature reaches +160°C, the thermal­overload circuitry turns off the output, allowing the device to cool. When the junction cools to +115°C, the output turns back on and attempts to establish regula­tion. Current limiting and thermal protection continue until the fault is removed.
Shutdown Mode
The MAX8556/MAX8557 feature a low-power shutdown mode that reduces quiescent current to 0.2µA (typ). Drive EN low to disable the voltage reference, error amplifier, gate-drive circuitry, and pass transistor, and pull the output low with 5kΩ impedance. Drive EN high or connect to IN for normal operation.
Power-OK Output (POK, MAX8556 Only)
The MAX8556 features a power-OK (POK) output to indicate the status of the output. POK is high impedance when the regulator output is within ±10% of its nominal output voltage. If the output voltage falls/rises outside this range or the IC experiences thermal fault, POK is internally pulled low. This open-drain output requires an external pullup resistor to VINor another logic supply below 3.6V. For glitch immunity, an internal delay circuit prevents the output from switching for 50µs (typ) after the trip threshold is initially reached. POK is low when the IC is in shutdown mode.
Power-On Reset (POR, MAX8557 Only)
The MAX8557 features a power-on reset output that goes high impedance 140ms (typ) after the output reaches 90% of its nominal value. This open-drain out­put requires an external pullup resistor to VINor another logic supply less than 3.6V. When the output falls below 90% of the nominal output voltage or the IC experi­ences a thermal fault, POR immediately transitions low. POR is low when the IC is in shutdown mode.
Operating Region and Power Dissipation
The maximum power dissipation depends on the ther­mal resistance of the IC package and the circuit board, the temperature difference between the die junction and ambient air, and the rate of ambient airflow. The power dissipated by the IC is P = I
OUT
x (VIN- V
OUT
). Proper PC board layout can increase the allowed power dissi­pation by dissipating heat in the board instead of the package. See the
Thermal Considerations in PC Board
Layout
section for more details.
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage LDO Regulators
8 _______________________________________________________________________________________
Applications Information
Output Voltage Selection
The MAX8556/MAX8557 feature an adjustable output voltage from 0.5V to 3.4V. Set the output voltage using an external resistor-divider from the output to GND with FB connected to the center tap as shown in Figures 1 and 2. Choose R3 1kΩ for light-load stability. Determine R2 using the following equation:
where V
OUT
is the desired output voltage and V
FB
is 0.5V.
Capacitor Selection and
Regulator Stability
Capacitors are required at the MAX8556/MAX8557 inputs and outputs for stable operation over the full temperature range and with load currents up to 4A. Connect 2 x 10µF capacitors between IN and GND and 2 x 10µF low equivalent-series-resistance (ESR) capac­itors between OUT and GND. The input capacitor (CIN) lowers the source impedance of the input supply. If the MAX8556/MAX8557s’ input is close to the output of the source supply, a smaller input capacitance can be used. Otherwise, 2 x 10µF ceramic input capacitors are recommended. The output capacitor’s (C
OUT
) ESR affects output noise and may affect output stability. Use output capacitors with an ESR of 0.05Ω or less to ensure stability and optimum transient dropout. For good output transient performance, use the following formula to select a minimum output capacitance:
C
OUT
= I
OUT(MAX)
x 1µF/200mA
Noise, PSRR, and Transient Response
The MAX8556/MAX8557 are designed to operate with low-dropout voltages and low quiescent currents while still maintaining low noise, good transient response, and high AC rejection (see the
Typical Operating
Characteristics
for a plot of Power-Supply Rejection Ratio (PSRR) vs. Frequency). When operating from noisy sources, improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output bypass capacitors and through passive filtering techniques. The MAX8556/ MAX8557 load-transient response graphs (see the
Typical Operating Characteristics
) show two compo­nents of the output response: a DC shift from the output impedance due to the load current change, and the transient response. A typical transient overshoot for a step change in the load current from 40mA to 4A is 40mV. Use an output capacitance from 20µF to 120µF to attenuate the overshoot.
Figure 2. MAX8557 Typical Application Circuit
Figure 1. MAX8556 Typical Application Circuit
V
RRx
23 1 =−
OUT
⎜ ⎝
V
FB
⎞ ⎟
V
IN
1.425V TO 3.6V
C1
2 x 10μF
POK
SHUTDOWN
100k
R1
Ω
ENABLED
1–6
IN
U1
MAX8556
12
POK
18
EN
N.C.
15
OUT
GND
7–11
13
FB
14
V
IN
1.7V TO 3.6V
C1
2 x 10μF
POR
SHUTDOWN
100k
ENABLED
1–6
IN
R1
Ω
12
18
U2
MAX8557
POR
EN
N.C.
15
OUT
GND
7–11
13
FB
14
R2
1.4k
R3 1k
R2 2k
R3 1k
Ω
Ω
Ω
Ω
V
OUT
1.2V AT 4A
V
OUT
1.5V AT 4A
C2 2 x 10μF
C2 2 x 10μF
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage
LDO Regulators
_______________________________________________________________________________________ 9
Thermal Considerations
in PC Board Layout
How much power the package can dissipate strongly depends on the mounting method of the IC to the PC board and the copper area for cooling. Using the JEDEC test standard, the maximum power dissipation allowed in the package is 2667mW. This data is obtained with +70°C ambient temperature and +150°C maximum junction temperature. The test board has dimensions of 3in x 3in with four layers of 2oz copper and FR-4 material with 62mil finished thickness. Nine thermal vias are used under the thermal paddle with a diameter of 12mil and 1mil plated copper thickness. Top and bottom layers are used to route the traces. Two middle layers are solid copper and isolated from the nine thermal vias.
More power dissipation can be handled by the pack­age if great attention is given during PC board layout. For example, using the top and bottom copper as a heatsink and connecting the thermal vias to one of the middle layers (GND) transfers the heat from the pack­age into the board more efficiently, resulting in lower junction temperature at high power dissipation in some MAX8556/MAX8557 applications. Furthermore, the sol­der mask around the IC area on both top and bottom layers can be removed to radiate the heat directly into the air. The maximum allowable power dissipation in the IC is as follows:
where T
J(MAX)
is the maximum junction temperature
(+150°C), TAis the ambient air temperature, θ
JC
(1.7°C/W for the 16-pin TQFN) is the thermal resistance from the junction to the case, and θCAis the thermal resistance from the case to the surrounding air through the PC board, copper traces, and the package materi­als. θCAis directly related to system level variables and can be modified to increase the maximum power dissi­pation. The TQFN package has an exposed thermal pad on its underside. This pad provides a low thermal resistance path for heat transfer into the PC board. This low thermally resistive path carries a majority of the heat away from the IC. The PC board is effectively a heatsink for the IC.
The exposed paddle should be connected to a large ground plane for proper thermal and electrical perfor­mance. The minimum size of the ground plane is dependent upon many system variables. To create an efficient path, the exposed paddle should be soldered to a thermal landing, which is connected to the ground plane by thermal vias. The thermal landing should be at least as large as the exposed paddle and can be made larger depending on the amount of free space from the exposed paddle to the other pin landings.
A sample layout is available on the MAX8556 evalua­tion kit to speed designs.
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 TQFN T1655-2
21-0140
Chip Information
TRANSISTOR COUNT: 3137 PROCESS: BiCMOS
P
MAX
TT
(
()
J MAX A
=
+θθ
JC CA
)
MAX8556/MAX8557
4A Ultra-Low-Input-Voltage LDO Regulators
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
0 4/04 Initial release
1 8/08 Revised Pin Configuration.1
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
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