The MAX8537/MAX8539 controllers provide a complete
power-management solution for both double-data-rate
(DDR) and combiner supplies. The MAX8537 and
MAX8539 are configured for out-of-phase and in-phase
DDR power-supply operations, respectively, and generate three outputs: the main memory voltage (V
DDQ
), the
tracking sinking/sourcing termination voltage (V
TT
), and
the termination reference voltage (V
TTR
). The MAX8538
is configured as a dual out-of-phase controller for pointof-load supplies. Each buck controller can source or
sink up to 25A of current, while the termination reference can supply up to 15mA output.
The MAX8537/MAX8538/MAX8539 use constantfrequency voltage-mode architecture with operating
frequencies of 200kHz to 1.4MHz. An internal highbandwidth (25MHz) operational amplifier is used as an
error amplifier to regulate the output voltage. This
allows fast transient response, reducing the number of
output capacitors. An all-N-FET design optimizes efficiency and cost. The MAX8537/MAX8538/MAX8539
have a 1% accurate reference. The second synchronous buck controller in the MAX8537/MAX8539 and the
VTTR amplifier generate 1/2 V
DDQ
voltage for VTTand
V
TTR
, and track the V
DDQ
within ±1%.
This family of controllers uses a high-side current-sense
architecture for current limiting. ILIM pins allow the setting of an adjustable, lossless current limit for different
combinations of load current and R
DSON
. Alternately,
more accurate overcurrent limit is achieved by using
a sense resistor in series with the high-side FET.
Overvoltage protection is achieved by latching off the
high-side MOSFET and latching on the low-side MOSFET
when the output voltage exceeds 17% of its set output.
Independent enable, power-good, and soft-start features
enhance flexibility.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V+ to GND ..............................................................-0.3V to +25V
AVL, VL to GND........................................................-0.3V to +6V
PGND to GND .......................................................-0.3V to +0.3V
FB_, EN_, POK_ to GND...........................................-0.3V to +6V
REFIN, VTTR, FREQ, SS_, COMP_ to GND....-0.3V to (AVL + 0.3V)
BST_, ILIM_ to GND ...............................................-0.3V to +30V
DH1 to LX1 ...............................................-0.3V to (BST1 + 0.3V)
DH2 to LX2 ...............................................-0.3V to (BST2 + 0.3V)
LX_ to BST_ ..............................................................-6V to +0.3V
LX_ to GND................................................................-2V to +25V
DL_ to PGND ................................................-0.3V to (VL + 0.3V)
PARAMETERCONDITIONSMINTYPMAXUNITSV+ Operating RangeVL regulator drops out below 5.5V (Note 1)4.7523.00VFB_ Input-Voltage Set PointOver line and load0.7880.8000.812VFB2 Input-Voltage Set PointMAX8537/MAX8539, REFIN = 0.9V0.8910.9000.909VVTTR Output Accuracy-15mA < I
2DH2DH2High-Side Gate-Driver Output for Step-Down 2. Swings from LX2 to BST2.
3LX2LX2
4ILIM2ILIM2
5POK1POK1
6DL2DL2Low-Side Gate-Driver Output for Step-Down 2. Swings from PGND to VL.
7POK2POK2
8EN2EN2Enable Input for Step-Down 2 (also for VTTR for the MAX8537 and MAX8539)
9EN1EN1Enable Input for Step-Down 1
10FREQFREQ
11COMP2COMP2Compensation Pin for Step-Down 2. Connect to compensation networks.
12FB2FB2
13SS2SS2Soft-Start for Step-Down 2. Connect a capacitor to GND to set the soft-start time.
14
15GNDGNDAnalog Ground for Internal Circuitry
16SS1SS1Soft-Start for Step-Down 1. Connect a capacitor to GND to set the soft-start time.
17FB1FB1
18COMP1COMP1Compensation Pin for Step-Down 1. Connect to compensation networks.
19
20AVLAVL
21V+V+Input Supply Voltage
(MAX8537/
MAX8539)
REFIN—
—N.C.For the MAX8538, connect pin 14 to GND.
VTTR—
—GNDAnalog Ground for Internal Circuitry
NAME
(MAX8538)
FUNCTION
Bootstrap Input to Power Internal High-Side Driver for Step-Down 2. Connect to an
external capacitor and diode according to Figure 1.
External Inductor Input for Step-Down 2. Connect to the switched side of the inductor.
LX2 serves as the lower supply-voltage rail for the DH2 high-side gate driver and the
current-limit circuitry.
Output Current-Limit Setting for Step-Down 2. Connect a resistor from ILIM2 to the
drain of the step-down 2 high-side MOSFET, or to the junction of the source of the
high-side MOSFET and the current-sense resistor to set the current-limit threshold.
See the Current-Limit Setting section.
Open-Drain Output. High impedance when step-down 1 is within 12% of its regulation
voltage. POK1 is pulled low in shutdown.
Open-Drain Output. High impedance when step-down 2 is within 12% of its regulation
voltage. POK2 is pulled low in shutdown or if REFIN is undervoltage.
Frequency Adjust. Connect a resistor from this pin to ground to set the frequency. The
range of the FREQ resistor is 163kΩ, 20kΩ, and 100kΩ (corresponding to 1.4MHz,
1.0MHz, and 200kHz).
Feedback Input for Step-Down 2 with V
impedance <40kΩ.
Reference Input for V
common-mode voltage range is 0.5V to 2.5V. Current through the divider-resistors
must be ≥100µA.
Feedback Input for Step-Down 1 with 0.8V Threshold. User must have impedance
<40kΩ.
VTTR Output Capable of Sourcing and Sinking Up to 15mA. Always bypass with a 1µF
ceramic capacitor (or larger) to GND.
Analog VL Input Pin. Connect to VL through a 4.7Ω resistor. Bypass with a 0.1µF (or
larger) ceramic capacitor to GND.
TT
and V
. Connect it to a resistor-divider from V
TTR
as the Threshold. User must have
REFIN
DDQ
. REFIN
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