The MAX705-MAX708/MAX813L microprocessor (µP)
supervisory circuits reduce the complexity and number
of components required to monitor power-supply and
battery functions in µP systems. These devices significantly improve system reliability and accuracy compared to separate ICs or discrete components.
The MAX705/MAX706/MAX813L provide four functions:
1) A reset output during power-up, power-down, and
brownout conditions.
2) An independent watchdog output that goes low if
the watchdog input has not been toggled within 1.6
seconds.
3) A 1.25V threshold detector for power-fail warning,
low-battery detection, or for monitoring a power supply other than +5V.
4) An active-low manual-reset input.
The MAX707/MAX708 are the same as the MAX705/
MAX706, except an active-high reset is substituted for
the watchdog timer. The MAX813L is the same as the
MAX705, except RESET is provided instead of RESET.
Two supply-voltage monitor levels are available: The
MAX705/MAX707/MAX813L generate a reset pulse when
the supply voltage drops below 4.65V, while the
MAX706/MAX708 generate a reset pulse below 4.40V.
All four parts are available in 8-pin DIP, SO and µMAX
packages.
_______________________Applications
Computers
Controllers
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
__________Typical Operating Circuit
___________________________Features
♦ µMAX Package: Smallest 8-Pin SO
♦ Guaranteed RESET Valid at VCC= 1V
♦ Precision Supply-Voltage Monitor
Note 1: The input voltage limits on PFI and MR can be exceeded if the input current is less than 10mA.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC= 4.75V to 5.5V for MAX705/MAX707/MAX813L, VCC= 4.5V to 5.5V for MAX706/MAX708, TA= T
Manual-Reset Input triggers a reset pulse when
pulled below 0.8V. This active-low input has an inter-
MR111333
4
5
6
7
8
V
CC
PFI444
PFO555
WDI6-6
nal 250µA pull-up current. It can be driven from a TTL
or CMOS logic line as well as shorted to ground with
a switch.
+5V Supply Input
0V Ground Reference for all signalsGND333
Power-Fail Voltage Monitor Input. When PFI is less
than 1.25V, PFO
when not used.
V
CC
Power-Fail Output goes low and sinks current when
PFI is less than 1.25V; otherwise PFO
Watchdog Input. If WDI remains high or low for
1.6sec, the internal watchdog timer runs out and
WDO goes low (Figure 1). Floating WDI or connecting WDI to a high-impedance three-state buffer disables the watchdog feature. The internal watchdog
timer clears whenever reset is asserted, WDI is threestated, or WDI sees a rising or falling edge.
No ConnectN.C.-6Active-Low Reset Output pulses low for 200ms when
triggered, and stays low whenever V
reset threshold (4.65V in the MAX705 and 4.40V in the
MAX706). It remains low for 200ms after V
above the reset threshold or MR
(Figure 3). A watchdog timeout will not trigger RESET
unless WDO is connected to MR.
Watchdog Output pulls low when the internal watchdog timer finishes its 1.6sec count and does not go
high again until the watchdog is cleared. WDO
goes low during low-line conditions. Whenever V
below the reset threshold, WDO
unlike RESET
width. As soon as V
old, WDO
Active-High Reset Output is the inverse of RESET.
Whenever RESET
versa (Figure 2). The MAX813L has a RESET output
only.
, WDO does not have a minimum pulse
rises above the reset thresh-
goes high with no delay.
CC
is high, RESET is low, and vice
stays low; however,
is below the
CC
goes from low to high
CC
rises
also
CC
is
Low-Cost, µP Supervisory Circuits
WATCHDOG
6
1
2
4
TRANSITION
DETECTOR
V
CC
250µA
4.65V*
1.25V
WDI
MR
V
CC
PFI
* 4.40V FOR MAX7O6.
( ) ARE FOR MAX813L ONLY.
WATCHDOG
TIMER
TIMEBASE FOR
RESET AND
WATCHDOG
RESET
GENERATOR
MAX705
MAX706
MAX813L
GND
3
8
7
5
WDO
RESET
(RESET)
PFO
V
CC
1
MR
2
V
CC
4
PFI
* 4.40V FOR MAX7O6.
250µA
4.65V*
1.25V
RESET
GENERATOR
3
MAX707
MAX708
GND
8
RESET
7
RESET
5
PFO
Figure 1. MAX705/MAX706/MAX813L Block Diagram
_______________Detailed Description
MAX705–MAX708/MAX813L
A microprocessor’s (µP’s) reset input starts the µP in a
known state. Whenever the µP is in an unknown state, it
should be held in reset. The MAX705-MAX708/MAX813L
assert reset during power-up and prevent code execution errors during power-down or brownout conditions.
On power-up, once VCCreaches 1V, RESET is a guaranteed logic low of 0.4V or less. As VCCrises, RESET stays
low. When VCCrises above the reset threshold, an internal timer releases RESET after about 200ms. RESET pulses low whenever VCCdips below the reset threshold, i.e.
brownout condition. If brownout occurs in the middle of
a previously initiated reset pulse, the pulse continues for
at least another 140ms. On power-down, once VCCfalls
below the reset threshold, RESET stays low and is guaranteed to be 0.4V or less until VCCdrops below 1V.
Reset Output
Figure 2. MAX707/MAX708 Block Diagram
WDI input is three-stated, the watchdog timer will stay
cleared and will not count. As soon as reset is released
and WDI is driven high or low, the timer will start counting.
Pulses as short as 50ns can be detected.
Typically, WDO will be connected to the non-maskable
interrupt input (NMI) of a µP. When VCCdrops below
the reset threshold, WDO will go low whether or not the
watchdog timer has timed out yet. Normally this would
trigger an NMI interrupt, but RESET goes low simultaneously, and thus overrides the NMI interrupt.
If WDI is left unconnected, WDO can be used as a lowline output. Since floating WDI disables the internal
timer, WDO goes low only when VCCfalls below the
reset threshold, thus functioning as a low-line output.
The MAX705/MAX706 have a watchdog timer and a
RESET output. The MAX707/MAX708 have both activehigh and active-low reset outputs. The MAX813L has
both an active-high reset output and a watchdog timer.
The MAX707/MAX708/MAX813L active-high RESET output
is simply the complement of the RESET output, and is
guaranteed to be valid with VCCdown to 1.1V. Some µPs,
such as Intel’s 80C51, require an active-high reset pulse.
Watchdog Timer
The MAX705/MAX706/MAX813L watchdog circuit monitors the µP’s activity. If the µP does not toggle the watchdog input (WDI) within 1.6sec and WDI is not three-stated, WDO goes low. As long as RESET is asserted or the
The manual-reset input (MR) allows reset to be triggered by a pushbutton switch. The switch is effectively
debounced by the 140ms minimum reset pulse width.
MR is TTL/CMOS logic compatible, so it can be driven
by an external logic line. MR can be used to force a
watchdog timeout to generate a reset pulse in the
MAX705/MAX706/MAX813L. Simply connect WDO to
MR.
The power-fail comparator can be used for various purposes because its output and noninverting input are
not internally connected. The inverting input is internally connected to a 1.25V reference.
t
WP
t
WD
+5V
WDI
0V
+5V
WDO
0V
+5V
RESET
0V
RESET EXTERNALLY
V
RT
TRIGGERED BY MR
V
RT
+5V
(RESET)
0V
( ) ARE FOR MAX813L ONLY.
Figure 3. MAX705/MAX706/MAX813L Watchdog TIming
V
CC
+5V
RESET
0V
+5V
MR
0V
+5V
WDO
0V
Figure 4. MAX705/MAX706 RESET, MR, and WDO Timing with
WDI Three-Stated. The MAX707/MAX708/MAX813L RESET
output is the inverse of RESET shown.
t
WD
t
RS
MR EXTERNALLY DRIVEN LOW
t
WD
t
RS
t
RS
t
MD
t
MR
To build an early-warning circuit for power failure, connect the PFI pin to a voltage divider (see
Operating Circuit
). Choose the voltage divider ratio so
Typical
that the voltage at PFI falls below 1.25V just before the
+5V regulator drops out. Use PFO to interrupt the µP
so it can prepare for an orderly power-down.
__________Applications Information
Ensuring a Valid RESET
Output Down to VCC= 0V
When VCCfalls below 1V, the MAX705-MAX708 RESET
output no longer sinks current—it becomes an open circuit. High-impedance CMOS logic inputs can drift to
undetermined voltages if left undriven. If a pull-down
resistor is added to the RESET pin as shown in Figure 5,
any stray charge or leakage currents will be drained to
ground, holding RESET low. Resistor value (R1) is not
critical. It should be about 100kΩ, large enough not to
load RESET and small enough to pull RESET to ground.
Monitoring Voltages Other Than the
Unregulated DC Input
Monitor voltages other than the unregulated DC by
connecting a voltage divider to PFI and adjusting the
ratio appropriately. If required, add hysteresis by connecting a resistor (with a value approximately 10 times
the sum of the two resistors in the potential divider network) between PFI and PFO. A capacitor between PFI
and GND will reduce the power-fail circuit’s sensitivity
to high-frequency noise on the line being monitored.
RESET can be asserted on other voltages in addition to
the +5V VCCline. Connect PFO to MR to initiate a RESET
pulse when PFI drops below 1.25V. Figure 6 shows the
MAX705-MAX708 configured to assert RESET when the
+5V supply falls below the reset threshold, or when the
+12V supply falls below approximately 11V.
Monitoring a Negative Voltage
The power-fail comparator can also monitor a negative
supply rail (Figure 7). When the negative rail is good (a
negative voltage of large magnitude), PFO is low, and
when the negative rail is degraded (a negative voltage
of lesser magnitude), PFO is high. By adding the resistors and transistor as shown, a high PFO triggers reset.
As long as PFO remains high, the MAX705MAX708/MAX813L will keep reset asserted (RESET =
low, RESET = high). Note that this circuit’s accuracy
depends on the PFI threshold tolerance, the VCCline,
and the resistors.
Figure 8. Interfacing to µPs with Bidirectional Reset I/O
µPs with bidirectional reset pins, such as the Motorola
GND
Interfacing to µPs with
Bidirectional Reset Pins
68HC11 series, can contend with the MAX705-MAX708
Figure 7. Monitoring a Negative Voltage
RESET output. If, for example, the RESET output is driven
high and the µP wants to pull it low, indeterminate logic
levels may result. To correct this, connect a 4.7kΩ
resistor between the RESET output and the µP reset I/O,
as in Figure 8. Buffer the RESET output to other system
components.
8 Plastic DIP-40°C to +85°CMAX705EPA
8SO-40°C to +85°CMAX705ESA
8 CERDIP**-55°C to +125°CMAX705MJA
MAX706CPA
MAX707CPA
MAX708CPA
MAX813LCPA
*Dice are specified at TA= +25°C.
**Contact factory for availability and processing to MIL-STD-883.
8 Plastic DIP0°C to +70°C
8SO0°C to +70°CMAX706CSA
8 µMAX0°C to +70°CMAX706CUA
Dice*0°C to +70°CMAX706C/D
8 Plastic DIP-40°C to +85°CMAX706EPA
8SO-40°C to +85°CMAX706ESA
8 CERDIP**-55°C to +125°CMAX706MJA
8 Plastic DIP0°C to +70°C
8SO0°C to +70°CMAX707CSA
8 µMAX0°C to +70°CMAX707CUA
Dice*0°C to +70°CMAX707C/D
8 Plastic DIP-40°C to +85°CMAX707EPA
8SO-40°C to +85°CMAX707ESA
8 CERDIP**-55°C to +125°CMAX707MJA
8 Plastic DIP0°C to +70°C
8SO0°C to +70°CMAX708CSA
8 µMAX0°C to +70°CMAX708CUA
Dice*0°C to +70°CMAX708C/D
8 Plastic DIP-40°C to +85°CMAX708EPA
8SO-40°C to +85°CMAX708ESA
8 CERDIP**-55°C to +125°CMAX708MJA
8 Plastic DIP0°C to +70°C
8SO0°C to +70°CMAX813LCSA
8 µMAX0°C to +70°CMAX813LCUA
Dice*0°C to +70°CMAX813LC/D
8 Plastic DIP-40°C to +85°CMAX813LEPA
8SO-40°C to +85°CMAX813LESA
8 CERDIP**-55°C to +125°CMAX813LMJA
_______Pin Configuration (continued)
TOP VIEW
(RESET) RESET
WDO
MR
V
1
2
MAX705
3
MAX706
MAX813L
4
CC
WDI
8
7
PFO
PFI
6
GND
5
µMAX
RESET
RESET
MR
V
1
2
MAX707
3
MAX708
4
CC
N.C.
8
PFO
7
PFI
6
5
GND
µMAX
( ) ARE FOR MAX813L ONLY.
____________________Chip Topography
MR
V
CC
GND
( ) ARE FOR MAX813L ONLY.
TRANSISTOR COUNT: 572
SUBSTRATE MUST BE LEFT UNCONNECTED.
Prices provided are for design guidance and are FOB USA (unless otherwise noted). International prices will differ due to local duties, taxes, and exchange rates.
Future product—contact factory for pricing and availability. Specifications are preliminary.
†
††
* 25,000 pc. price, factory direct
Low-Cost, µP Supervisory Circuits
MAX705–MAX708/MAX813L
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
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