Maxim MAX806TMJA, MAX806TCPA, MAX806TCSA, MAX806TEPA, MAX806SCSA Datasheet

...
19-0243; Rev 1; 9/94
3.0V/3.3V Microprocessor Supervisory Circuits
_______________General Description
These microprocessor (µP) supervisory circuits reduce the complexity and number of components required for power-supply monitoring and battery-control functions in µP systems. They significantly improve system relia­bility and accuracy compared to separate ICs or discrete components.
These devices are designed for use in systems powered by 3.0V or 3.3V supplies. See the selector guide in the back of this data sheet for similar devices designed for 5V systems. The suffixes denote different reset threshold voltages: 3.075V (T), 2.925V (S), and 2.625V (R) (see
Reset Threshold
section in the
Detailed Description
). All these parts are available in 8-pin DIP and SO packages. Functions offered in this series are as follows:
Active-High Reset
Active-Low Reset
Part
MAX690 MAX704 MAX802 MAX804 MAX805 MAX806
Watchdog Input
✓✓ ✓ ✓✓✓ ✓✓ ✓
✓✓
✓✓ ✓ ✓✓
Threshold Accuracy
Backup-Battery
Manual Reset
Switch
Input
Comparator
Power-Fail
Power-Fail
±4% ±4% ±2% ±2% ±4% ±2%
Reset Window
±75mV
±75mV
±2%
±2%
±75mV
±2%
________________________Applications
Battery-Powered Computers and Controllers Embedded Controllers Intelligent Instruments Automotive Systems Critical µP Power Monitoring Portable Equipment
__________________Pin Configuration
TOP VIEW
1
V
OUT
MAX690T/S/R
2
MAX704T/S/R
V
CC
MAX802T/S/R
3
GND
MAX804T/S/R MAX805T/S/R
4
PFI
MAX806T/S/R
( )
ARE FOR MAX804T/S/R, MAX805T/S/R
< > ARE FOR MAX704T/S/R, MAX806T/S/R
DIP/SO
8
VBATT
7
RESET (RESET)
6
WDI
<MR>
5
PFO
____________________________Features
♦–R—E—S—E—T–and RESET Outputs ♦ Manual Reset InputPrecision Supply-Voltage Monitor200ms Reset Time DelayWatchdog Timer (1.6sec timeout)Battery-Backup Power Switching—
Battery Can Exceed VCCin Normal Operation
40µA VCCSupply Current ♦ 1µA Battery Supply CurrentVoltage Monitor for Power-Fail or
Low-Battery Warning
Guaranteed –R—E—S—E—T– Assertion to VCC= 1V ♦ 8-Pin DIP and SO Packages
______________Ordering Information
PART** TEMP. RANGE
MAX690_CPA
MAX690_CSA 0°C to +70°C MAX690_C/D 0°C to +70°C Dice* MAX690_EPA -40°C to +85°C MAX690_ESA -40°C to +85°C MAX690_MJA -55°C to +125°C 8 CERDIP
0°C to +70°C
Ordering Information continued on last page.
* Contact factory for dice specifications. ** These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into the blank to complete the part number.
PIN-PACKAGE
8 Plastic DIP 8 SO
8 Plastic DIP 8 SO
_________Typical Operating Circuits
REGULATED +3.3V OR +3.0V
V
UNREGULATED 
DC
0.1µF
R1
3.6V
R2
LITHIUM BATTERY
( ) ARE FOR MAX804T/S/R, MAX805T/S/R
See last page for MAX704T/S/R, MAX806T/S/R.
PFI
VBATT
0.1µF
V
CC
MAX690T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R
GND
RESET
(RESET)
PFO
V
WDI
OUT
0.1µF
CC
RESET NMI
I/O LINE
BUS
V
CC
CMOS RAM
µP
GND
GND
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
________________________________________________________________
Maxim Integrated Products
Call toll free 1-800-998-8800 for free samples or literature.
1
3.0V/3.3V Microprocessor Supervisory Circuits
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage (with respect to GND)
.........................................................................-0.3V to 6.0V
V
CC
VBATT....................................................................-0.3V to 6.0V
All Other Inputs ...................-0.3V to the higher of V
Continuous Input Current
..................................................................................100mA
V
CC
VBATT...............................................................................18mA
or VBATT
CC
GND..................................................................................18mA
Output Current
–R—E—S—E—T–, –P—F—O–
V
OUT
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
....................................................................18mA
................................................................................100mA
ELECTRICAL CHARACTERISTICS
(VCC= 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC= 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC= 2.72V to
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; T
Operating Voltage Range,
, VBATT (Note 1)
V
CC
MAX690_C, MAX704_C, MAX80_ _C MAX690_E/M, MAX704_E/M, MAX80_ _E/M
–M—R– VCCSupply Current (excluding I
OUT
)
I
SUPPLY
(MAX704_/
MAX806_)
–M—R– VCCSupply Current in Battery­Backup Mode (excluding I
OUT
)
VBATT Supply Current, Any Mode (excluding I
OUT
) (Note 2)
Battery Leakage Current (Note 3)
(MAX704_/
MAX806_)
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
MAX690_C/E, MAX704_C/E, MAX80_ _C/E,
I
OUT
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
I
OUT
V
Output Voltage V
OUT
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
MAX690_M, MAX704_M, MAX80_ _M
I
OUT
MAX690_M, MAX704_M, MAX80_ _M
I
OUT
I
OUT
A
= V
CC
= V
CC
= 5mA (Note 4)
= 50mA
= 5mA (Note 4)
= 50mA
= 250µA, VCC> 2.5V (Note 4)
Continuous Power Dissipation (T
Plastic DIP (derate 9.09mW/°C above +70°C) ..............727mW
= +70°C)
A
SO (derate 5.88mW/°C above +70°C)...........................471mW
CERDIP (derate 8.00mW/°C above +70°C)...................640mW
Operating Temperature Ranges
MAX690_C_ _/MAX704_C_ _/MAX80_ _C_ _........0°C to +70°C
MAX690_E_ _/MAX704_E_ _/MAX80_ _E_ _......-40°C to +85°C
MAX690_M_ _/MAX704_M_ _/MAX80_ _M_ _...-55°C to +125°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C
= T
to T
MIN
; unless otherwise noted. Typical values are at TA= +25°C.)
MAX
CONDITIONS
1.0 5.5
1.1 5.5
MAX690_C/E, MAX704_C/E, MAX80_ _C/E, VCC< 3.6V
MAX690_C/E, MAX704_C/E, MAX80_ _C/E, VCC< 5.5V
MAX690_M, MAX704_M, MAX80_ _M, VCC< 3.6V
MAX690_M, MAX704_M, MAX80_ _M, V
CC
< 5.5V
40 50
50 65
40 55
50 70
VCC= 2.0V, VBATT = 2.3V
0.4 1
0.4 10
0.01 0.5
0.01 5
V
-V
CC
CC
0.03 0.015
V
-V
CC
CC
0.3 0.15
V
-V
CC
CC
0.035 0.015 V
-V
CC
CC
0.35 0.15
V
-V
CC
CC
0.0015 0.0006
UNITSMIN TYP MAXSYMBOLPARAMETER
V
µA
µA25 50
µA
µA
-
-
-
-
-
2 _______________________________________________________________________________________
3.0V/3.3V Microprocessor Supervisory Circuits
ELECTRICAL CHARACTERISTICS (continued)
(VCC= 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC= 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC= 2.72V to
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; T
I
V
in Battery-Backup Mode
OUT
Battery Switch Threshold, VCCFalling
Battery Switch Threshold, VCCRising (Note 7)
OUT
I
OUT
VBATT - V VBATT > VCC(Note 6)
SW
This value is identical to the reset threshold, VCCrising
MAX690T/704T/805T
MAX802T/804T/806T
MAX690S/704S/805S
Reset Threshold (Note 8)
V
RST
MAX802S/804S/806S
MAX690R/704R/805R
MAX802R/804R/806S
Reset Timeout Period –P—F—O–, –R—E—S—E—T–
–P—F—O–, –R—E—S—E—T–
Output Voltage
Output Short to
GND Current (Note 4) –P—F—O–, –R—E—S—E—T–
, RESET
Output Voltage
VCC< 3.6V
WP
V
I
OH
SOURCE
VCC= 3.3V, VOH= 0V
OS
I
SINK
MAX690_/704_/802_/806_, VCC= V
OL
MAX804_/805_, VCC= V VBATT = 0V, VCC= 1.0V, I
–P—F—O–, –R—E—S—E—T–
Output Voltage
MAX690_C, MAX704_C, MAX80_ _C
V
OL
VBATT = 0V, VCC= 1.2V, I MAX690_E/M, MAX704_E/M, MAX80_ _E/M
RESET Output Leakage Current (Note 9)
VBATT = 0V, VCC= V V
RESET
= T
to T
A
MIN
MAX
CONDITIONS
= 250µA, VBATT = 2.3V
= 1mA, VBATT = 2.3V
> VCC> 1.75V (Note 5)
CC,VSW
= 50µA
= 1.2mA;
RST
MAX804_C,
min;
RST
= 0V, V
CC
MAX805_C MAX804_E/M,
MAX805_E/M
; unless otherwise noted. Typical values are at TA= +25˚C.)
UNITSMIN TYP MAXSYMBOLPARAMETER
VBATT VBATT
- 0.1 - 0.034 VBATT
- 0.14 mV65 25
VCCfalling VCCrising VCCfalling VCCrising VCCfalling VCCrising VCCfalling VCCrising VCCfalling VCCrising VCCfalling VCCrising
3.00 3.075 3.15
3.00 3.085 3.17
3.00 3.075 3.12
3.00 3.085 3.14
2.85 2.925 3.00
2.85 2.935 3.02
2.88 2.925 3.00
2.88 2.935 3.02
2.55 2.625 2.70
2.55 2.635 2.72
2.59 2.625 2.70
2.59 2.635 2.72 ms140 200 280t
V
V
CC
CC
- 0.3 - 0.05
µV180 500I
min;
RST
max
= 40µA,
SINK
SINK
= 200µA,
0.13 0.3
0.17 0.3
-1 1 µA
-10 10
V
V2.30 2.40 2.50V V
V
V
V0.06 0.3V
V
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
_______________________________________________________________________________________ 3
3.0V/3.3V Microprocessor Supervisory Circuits
ELECTRICAL CHARACTERISTICS (continued)
(VCC= 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC= 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC= 2.72V to
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; T
SYMBOLPARAMETER UNITS
VCC< 3.6V
PFI Input Threshold
PFI Input Current
PFI Hysteresis, PFI Rising
PFI Input Current
–M—R–
Input Threshold
–M—R–
Pulse Width
–M—R–
to Reset Delay
–M—R–
Pull-Up Current
WDI Input Threshold
V
PFT
V
falling
PFI
MAX690_C/E, MAX704_C/E, MAX80_ _C/E MAX690_M, MAX704_M, MAX80_ _M
V
VCC< 3.6V
PFH
MAX690_C/E, MAX704_C/E, MAX80_ _C/E MAX690_M, MAX704_M, MAX80_ _M
V
IH
MAX704_/MAX806_ only
V
IL
MAX704_/MAX806_ only
MR
MAX704_/MAX806_ only
MD
MAX704_/MAX806_ only, –M—R–= 0V, VCC= 3V
V
IH
MAX690_/MAX802_/MAX804_/MAX805_ only
V
IL
0V< VCC< 5.5V
Watchdog Timeout Period
WD
VCC< 3.6V MAX690_/MAX802_/MAX804_/MAX805_ only
Note 1: VCCsupply current, logic input leakage, watchdog functionality (MAX690_/802_/805_/804_), –M—R–functionality
(MAX704_/806_), PFI functionality, state of –R—E—S—E—T–(MAX690_/704_/802_/806_), and RESET (MAX804_/805_) tested at VBATT = 3.6V, and V
Note 2: Tested at VBATT = 3.6V, V
= 1.9V.
V
Note 3: Leakage current into the battery is tested under the worst-case conditions at V
CC
= 5.5V. The state of –R—E—S—E—T–or RESET and –P—F—O–is tested at VCC= VCCmin.
CC
= 3.5V and 0V. The battery current will rise to 10µA over a narrow transition window around
CC
VBATT= 1.0V.
Note 4: Guaranteed by design. Note 5: When V
has a small 25mV typical hysteresis to prevent oscillation. For V
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
voltage on VBATT.
Note 6: When VBATT > V Note 7: V
V switchover occurs 200ms prior to reset.
> VCC> VBATT, V
SW
> VSW, V
switches from VBATT to VCCwhen VCCrises above the reset threshold, independent of VBATT. Switchover back to
OUT
occurs at the exact voltage that causes –R—E—S—E—T–to go high (on the MAX804_/805_, RESET goes low); however
CC
CC
remains connected to VCCuntil VCCdrops below VBATT. The VCC-to-VBATT comparator
OUT
remains connected to VCCuntil VCCdrops below the battery switch threshold (VSW).
OUT
Note 8: The reset threshold tolerance is wider for V
prevents internal oscillation.
Note 9: The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance).
= T
to T
A
MIN
CONDITIONS
MAX802_C/E, MAX804_C/E, MAX806_C/E
MAX690_/MAX704_/MAX805_
; unless otherwise noted. Typical values are at TA= +25˚C.)
MAX
MIN TYP MAX
1.212 1.237 1.262
1.187 1.237 1.287
-25 2 25
-500 2 500
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
10 20 10 25
-25 2 25
-500 2 500
0.7 x V
CC
0.3 x V
CC
0.7 x V
CC
0.3 x V
CC
MAX690_C/E, MAX802_C/E, MAX804_C/E, MAX805_C/E
MAX690_M, MAX802_M, MAX804_M, MAX805_M
MAX690/MAX802/MAX804/ MAX805 only
CC
< 1.75V (typ), V
CC
rising than for VCCfalling to accommodate the 10mV typical hysteresis, which
CC
-1 0.01 1
-10 0.01 10
1.12 1.60 2.24
= 5.5V, VBATT = 1.8V and at VCC= 1.5V,
switches to VBATT regardless of the
OUT
V
nA
mV
nA
V
ns100 20t ns60 500t µA20 60 350
V
µAWDI Input Current
sect
ns100 20WDI Pulse Width
4 _______________________________________________________________________________________
3.0V/3.3V Microprocessor Supervisory Circuits
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
VCC-to-V
5
VBATT = 3.0V
4
3
ON-RESISTANCE ()
2
OUT
-to-V 1
CC
V
0
–60 –20 60 140
ON-RESISTANCE
OUT
vs. TEMPERATURE
= 2.5V
V
CC
VCC = 5V
20 100–40 0 8040 120
TEMPERATURE (°C)
BATTERY SUPPLY CURRENT
vs. TEMPERATURE
10,000
VCC = 0V PFI = GND
1000
100
10
1
BATTERY SUPPLY CURRENT (nA)
0.1 –60 –20 60 140
VBATT = 3V
TEMPERATURE (°C)
VBATT = 5V
VBATT = 2V
20 100–40 0 8040 120
1.240
1.238
1.236
1.234
PFI THRESHOLD (V)
1.232
1.230 –60 –20 60 140
_______________________________________________________________________________________
= 3.3V
V
CC
PFI THRESHOLD
vs. TEMPERATURE
= 3.3V
V
CC
V
= 2.5V
CC
VBATT = 3.0V
TEMPERATURE (°C)
VBATT-to-V
180
VCC = 0V
MAX690-806 TOC01
140
100
ON-RESISTANCE ()
OUT
60
VBATT-to-V
20
–60 –20 60 140
216
212
MAX690-806 TOC04
208
VBATT = 3.0V
204
200
RESET TIMEOUT PERIOD (ms)
196
–60 –20 60 140
VCC = 5V
20 100–40 0 8040 120
ON-RESISTANCE
OUT
vs. TEMPERATURE
VBATT = 2V
VBATT = 3V
VBATT = 3.3V
VBATT = 5V
20 100–40 0 8040 120
TEMPERATURE (°C)
RESET TIMEOUT PERIOD
vs. TEMPERATURE
VCC = 5V
= 3.3V
V
CC
20 100–40 0 8040 120
TEMPERATURE (°C)
1.004
MAX690-806 TOC07
1.002
1.000
0.998
0.996
NORMALIZED RESET THRESHOLD (V)
0.994 –60 –20 60 140
SUPPLY CURRENT vs. TEMPERATURE
50
MAX690-806 TOC02
45
40
VBATT = 3V
35
PFI = GND MR/WDI FLOATING
SUPPLY CURRENT (µA)
30
25
–60 –20 60 140
RESET-COMPARATOR PROPAGATION 
DELAY vs. TEMPERATURE
30
VBATT = 3.0V 100mV OVERDRIVE
26
MAX690-806 TOC05
22
18
PROPAGATION DELAY (µs)
14
10
–60 –20 60 140
TEMPERATURE (°C)
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
VBATT = 3.0V
20 100–40 0 8040 120
TEMPERATURE (°C)
VCC = 5V
V
CC
V
CC
20 100–40 0 8040 120
TEMPERATURE (°C)
20 100–40 0 8040 120
MAX690-806 TOC08
= 3.3V
= 2.5V
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
MAX690-806 TOC03
MAX690-806 TOC06
5
3.0V/3.3V Microprocessor Supervisory Circuits
______________________________________________________________Pin Description
MAX690 MAX802
RESET Active-High, Open-Drain Reset Output is the inverse of –R—E—S—E—T–.
PIN
MAX704 MAX806
1 V
2 V 3 GND Ground
4 PFI
5
6 WDI
7
8 VBATT
MAX804 MAX805
1
2 3
4
5
6
7
8
_______________Detailed Description
A microprocessor’s (µP’s) reset input starts the µP in a known state. These µP supervisory circuits assert reset to prevent code execution errors during power-up, power­down, brownout conditions, or a watchdog timeout.
–R—E—S—E—T– V
a backup battery,–R—E—S—E—T– is guaranteed valid for V > 1V. Once VCCexceeds the reset threshold, an internal timer keeps–R—E—S—E—T– low for the reset timeout period; after this interval,–R—E—S—E—T– goes high (Figure 2).
If a brownout condition occurs (VCCdips below the reset threshold),–R—E—S—E—T– goes low. Each time–R—E—S—E—T is asserted, it stays low for the reset timeout period.
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
Any time VCCgoes below the reset threshold, the internal timer restarts.
The watchdog timer can also initiate a reset. See the
Watchdog Input
The MAX804_/MAX805_ active-high RESET output is open drain, and the inverse of the MAX690_/MAX704_/ MAX802_/MAX806_–R—E—S—E—T– output.
6 _______________________________________________________________________________________
is guaranteed to be a logic low for 0V < VCC<
, provided that VBATT is greater than 1V. Without
RST
section.
NAME FUNCTION
Supply Output for CMOS RAM. When VCCis above the reset threshold, V
1
2 3
4
5
6
–R—E—S—E—T–
7
8
connected to VCCthrough a P-channel MOSFET switch. When VCCfalls below VSWand
OUT
VBATT, VBATT connects to V Main Supply Input
CC
Power-Fail Input. When PFI is less than V low; otherwise, –P—F—O–remains high. Connect to ground if unused.
Power-Fail Output. When PFI is less than V
–P—F—O–
otherwise, –P—F—O–remains high. Leave open if unused. Watchdog Input. If WDI remains high or low for 1.6sec, the internal watchdog timer runs out
and reset is triggered. The internal watchdog timer clears while reset is asserted or when WDI sees a rising or falling edge. The watchdog function cannot be disabled.
Manual Reset Input. A logic low on –M—R–asserts reset. Reset remains asserted as long as –M—R–
–M—R–
is low and for 200ms after –M—R–returns high. This active-low input has an internal 70µA pull-up current. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused.
Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever VCCis below the reset threshold or when –M—R–is a logic low. It remains low for 200ms after either VCCrises above the reset threshold, the watchdog triggers a reset, or –M—R–goes from low to high.
Backup-Battery Input. When VCCfalls below VSWand VBATT, V VBATT. When VCCrises above the reset threshold, V exceed VCC. Connect to VCCif no battery is used.
Reset Output
OUT
The MAX690T/MAX704T/MAX805T are intended for
3.3V systems with a ±5% power-supply tolerance and a 10% system tolerance. Except for watchdog faults, reset will not assert as long as the power supply remains above 3.15V (3.3V - 5%). Reset is guaranteed to assert before the power supply falls below 3.0V.
The MAX690S/MAX704S/MAX805S are designed for
3.3V ±10% power supplies. Except for watchdog faults, they are guaranteed not to assert reset as long
CC
as the supply remains above 3.0V (3.3V - 10%). Reset is guaranteed to assert before the power supply falls below 2.85V (VCC- 14%).
The MAX690R/MAX704R/MAX805R are optimized for
monitoring 3.0V ±10% power supplies. Reset will not occur until VCCfalls below 2.7V (3.0V - 10%), but is guaranteed to occur before the supply falls below
2.59V (3.0V - 14%). The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T
are respectively similar to the MAX690R/S/T, MAX805R/S/T, and MAX704R/S/T, but with tightened reset and power-fail threshold tolerances.
. Connect to VCCif no battery is used.
or when VCCfalls below VSW, –P—F—O–goes
PFT
, or VCCfalls below VSW, –P—F—O–goes low;
PFT
switches from VCCto
OUT
reconnects to VCC. VBATT may
OUT
Reset Threshold
OUT
is
3.0V/3.3V Microprocessor Supervisory Circuits MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
VBATT
V
WDI
CC
* **
MR
PFI
BATTERY SWITCHOVER COMPARATOR
1.237V
1.237V
*
WATCHDOG
TIMER
* MAX690T/S/R, MAX802T/S/R, MAX804T/S/R, MAX805T/S/R ONLY ** MAX704T/S/R, MAX806T/S/R ONLY ( ) MAX804T/S/R, MAX805T/S/R ONLY
RESET COMPARATOR
V
BATTERY
SWITCHOVER
CIRCUITRY
PFT
MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R
GENERATOR
POWER-FAIL COMPARATOR
RESET
V
OUT
RESET (RESET)
PFO
3.0V OR 3.3V
V
CC
0V
3.0V OR 3.3V
V
OUT
V
SW
3.0V OR 3.3V
RESET
(RESET)
PFO
( ) MAX804T/S/R, MAX805T/S/R ONLY, RESET EXTERNALLY PULLED UP TO VCC
VBATT = 3.6V
t
WP
VBATT = PFI = 3.6V I
= 0mA
OUT
V
RST
V
SW
Figure 1. Block Diagram Figure 2. Timing Diagram
Watchdog Input
The watchdog circuit monitors the µP’s activity. If the µP
(MAX690_/802_/804_/805_)
does not toggle the watchdog input (WDI) within 1.6sec, a reset pulse is triggered. The internal 1.6sec timer is cleared by either a reset pulse or by a transition (low-to­high or high-to-low) at WDI. If WDI is tied high or low, a
–R—E—S—E—T–
pulse is triggered every 1.8sec (tWDplus tRS).
As long as reset is asserted, the timer remains cleared and does not count. As soon as reset is deasserted, the timer starts counting. Unlike the 5V MAX690 family, the watchdog function cannot be disabled.
The PFI input is compared to an internal reference. If PFI is less than V comparator is intended for use as an undervoltage
PFT
detector to signal a failing power supply. However, the comparator does not need to be dedicated to this function because it is completely separate from the rest of the circuitry.
The power-fail comparator turns off and–P—F—O– goes low when VCCfalls below VSWon power-down. The power­fail comparator turns on as VCCcrosses VSWon power-up. If the comparator is not used, connect PFI to ground and leave–P—F—O– unconnected.–P—F—O–may be connected to–M—R–on the MAX704_/MAX806_ so that a low voltage on PFI will generate a reset (Figure 5b).
_______________________________________________________________________________________ 7
Power-Fail Comparator
,–P—F—O– goes low. The power-fail
3.0V/3.3V Microprocessor Supervisory Circuits
In the event of a brownout or power failure, it may be
Backup-Battery Switchover
necessary to preserve the contents of RAM. With a backup battery installed at VBATT, the devices auto­matically switch RAM to backup power when V falls.
CC
This family of µP supervisors (designed for 3.3V and 3V systems) doesn’t always connect VBATT to V VBATT is greater than VCC. VBATT connects to V (through a 140switch) when VCCis below VSWand
OUT
when
OUT
VBATT is greater than VCC, or when VCCfalls below
1.75V (typ) regardless of the VBATT voltage. This is done to allow the backup battery (e.g., a 3.6V lithium cell) to have a higher voltage than VCC.
Switchover at VSW(2.40V) ensures that battery-backup mode is entered before V minimum required to reliably retain data in CMOS RAM.
gets too close to the 2.0V
OUT
Switchover at higher VCCvoltages would decrease backup-battery life. When VCCrecovers, switchover is deferred until VCCrises above the reset threshold (V
) to ensure a stable supply. V
RST
VCCthrough a 3PMOS power switch.
is connected to
OUT
Manual Reset
A logic low on–M—R–asserts reset. Reset remains asserted while–M—R–is low, and for tWP(200ms) after–M—R–returns high. This input has an internal 70µA pull-up current, so it can be left open if it is not used.–M—R–can be driven with TTL or CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from–M—R–to GND to create a manual-reset function; external debounce circuitry is not required.
__________Applications Information
These µP supervisory circuits are not short-circuit protected. Shorting V up transients such as charging a decoupling capacitor—destroys the device. Decouple both V and VBATT pins to ground by placing 0.1µF capacitors as close to the device as possible.
SuperCaps™ are capacitors with extremely high capacitance values (e.g., order of 0.47F) for their size. Figure 3 shows two ways to use a SuperCap as a backup power source. The SuperCap may be connected through a diode to the 3V input (Figure 3a) or, if a 5V supply is also available, the SuperCap may be charged up to the 5V supply (Figure 3b) allowing a longer backup period. Since VBATT can exceed V while VCCis above the reset threshold, there are no special precautions when using these µP supervisors with a SuperCap.
These µP supervisors were designed for battery­backed applications. If a backup battery is not used, connect both VBATT and V different µP supervisor such as the MAX706T/S/R or MAX708T/S/R.
Replacing the Backup Battery
The backup power source can be removed while V remains valid, if VBATT is decoupled with a 0.1µF
to ground—excluding power-
OUT
Using a SuperCap
as a Backup Power Source
Operation without a Backup
Power Source
to VCC, or use a
OUT
capacitor to ground, without danger of triggering RESET/–R—E—S—E—T–. As long as VCCstays above VSW,
Table 1. Input and Output Status in Battery-Backup Mode
PIN NAME STATUS
V
V
–P—F—O–
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
WDI The watchdog timer is disabled –M—R–
–R—E—S—E—T–
RESET High impedance VBATT Connected to V
Connected to VBATT through an internal
OUT
140switch Disconnected from V
CC
The power-fail comparator is disabled when
PFI
VCC< V
SW
Logic low when VCC< VSWor PFI < V
Disabled Low logic
OUT
OUT
PFT
battery-backup mode cannot be entered.
Adding Hysteresis
to the Power-Fail Comparator
The power-fail comparator has a typical input hysteresis of 10mV. This is sufficient for most applica­tions where a power-supply line is being monitored through an external voltage divider (see the section
Monitoring an Additional Power Supply
).
If additional noise margin is desired, connect a resistor between–P—F—O– and PFI as shown in Figure 4a. Select the ratio of R1 and R2 such that PFI sees 1.237V (V when VINfalls to its trip point (V hysteresis and will typically be more than 10 times the
). R3 adds the
TRIP
PFT
value of R1 or R2. The hysteresis window extends both above (VH) and below (VL) the original trip point (V
™ SuperCap is a trademark of Baknor Industries.
TRIP
CC
CC
CC
)
).
8 _______________________________________________________________________________________
3.0V/3.3V Microprocessor Supervisory Circuits
3.0V OR 3.3V
MAX690T/S/R
V
CC
1N4148
0.47F
Figure 3. Using a SuperCap as a Backup Power Source
MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R
VBATT
MAX806T/S/R
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
GND
V
RESET 
(RESET)
TO STATIC
OUT
RAM
TO µP
Connecting an ordinary signal diode in series with R3, as shown in Figure 4b, causes the lower trip point (VL) to coincide with the trip point without hysteresis (V so the entire hysteresis window occurs above V This method provides additional noise margin without
TRIP
TRIP
compromising the accuracy of the power-fail threshold when the monitored voltage is falling. It is useful for accurately detecting when a voltage falls past a threshold.
The current through R1 and R2 should be at least 1µA to ensure that the 25nA (max over extended temperature range) PFI input current does not shift the trip point. R3 should be larger than 10kso it does not load down the
–P—F—O–
pin. Capacitor C1 adds additional noise rejection.
Monitoring an Additional Power Supply
These µP supervisors can monitor either positive or negative supplies using a resistor voltage divider to PFI. –P—F—O– can be used to generate an interrupt to the µP (Figure 5). Connecting–P—F—O– to–M—R–on the MAX704 and MAX806 causes reset to assert when the monitored supply goes out of tolerance. Reset remains asserted as long as–P—F—O– holds–M—R–low, and for 200ms after–P—F—O– goes high.
Interfacing to µPs
with Bidirectional Reset Pins
µPs with bidirectional reset pins, such as the Motorola 68HC11 series, can contend with the MAX690_/ MAX704_/MAX802_/MAX806_–R—E—S—E—T– output. If, for
+5V
3.0V OR 
3.3V
1N4148
0.47F
ba
MAX690T/S/R
V
CC
MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R
VBATT
MAX806T/S/R
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
GND
V
OUT
RESET 
(RESET)
example, the–R—E—S—E—T– output is driven high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7kresistor
),
between the–R—E—S—E—T– output and the µP reset I/O, as in
.
Figure 6. Buffer the–R—E—S—E—T– output to other system components.
Negative-Going VCCTransients
While issuing resets to the µP during power-up, power­down, and brownout conditions, these supervisors are relatively immune to short-duration negative-going V transients (glitches). It is usually undesirable to reset the µP when VCCexperiences only small glitches.
Figure 7 shows maximum transient duration vs. reset­comparator overdrive, for which reset pulses are not generated. The graph was produced using negative­going VCCpulses, starting at 3.3V and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). The graph shows the maximum pulse width a negative-going VCCtransient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCCtransient that goes 100mV below the reset threshold and lasts for 40µs or less will not cause a reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V pin provides additional transient immunity.
TO STATIC RAM
TO µP
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
CC
CC
_______________________________________________________________________________________ 9
3.0V/3.3V Microprocessor Supervisory Circuits
V
V
IN
MAX690T/S/R
PFI
MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R
PFO
V
GND
CC
*OPTIONAL
R
1
R
2
R
3
C1*
TO µP
IN
R
1
R
2
R
3
C1*
TO µP
PFI
MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R
PFO
V
GND
CC
*OPTIONAL
PFO
V
CC
V
VH = (V
PFO
TRIP
0V
V
= V
TRIP
VH = R1 (V
WHERE
V
IN
R
1
R
2
=
V
PFT
PFT + VPFH
0V
R1 + R
2
( )
PFT
R
2
1
+ V
( )
PFT
PFH)
R
1
V
= 1.237V
PFT
V
VD
V
(
= 10mV
PFH
= DIODE FORWARD VOLTAGE DROP = V
L
TRIP
PFI PFO
V
TRIPVH
R
1 + R2
)
R
2
R
1 + R2
)
(
)
R
2
V
TRIP
1
1
+
+
R
R
2
3
V
CC
MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R
GND
V
H
(V
CC - VD
R
3
3.0V OR 3.3V
MR
* MAX704T/S/R,  MAX806T/S/R ONLY
PFT
V
IN
)
*
V
IN
PFO
0V
V
TRIP
VH = (V
V
0V
R1 + R
= V
( )
PFT
+ V
PFT
PFH
= R
( )
L
1 VPFT
V
L
V
TRIP
2
R
2
1
) (R1)
1 R
1
+
+
( )
R
R
1
2
1
1
+
+
R
R
1
2
3
V
H
WHERE 1 R
3
V
CC
R
3
V
IN
V
= 1.237V
PFT PFH
= 10mV
V
ba
Figure 4. a) Adding Additional Hysteresis to the Power-Fail Comparator b) Shifting the Additional Hysteresis above V
3.0V OR 3.3V
V
R
1
R
2
V-
V
CC
PFO
1
V
= R
(V
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
TRIP
V
+ V
2
PFT
= R
(V
)
L
2
PFT
+
)
PFH
(
R
1
1
1
+
(
)
R
R
1
2
CC
MAX690T/S/R
PFI PFO
MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R
GND
V
V
TRIP
L
1
V
CC
)
R
R
2
1
V
CC
R
1
WHERE
NOTE: V
0V
V V
TRIP
PFT PFH
V-
= 1.237V
= 10mV
IS NEGATIVE
ba
Figure 5. Using the Power-Fail Comparator to Monitor an Additional Power Supply
10 ______________________________________________________________________________________
3.0V/3.3V Microprocessor Supervisory Circuits
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
V
CC
MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX806T/S/R
GND
4.7k
RESET
RESET
V
CC
µP
GND
Figure 6. Interfacing to µPs with Bidirectional Reset I/O
100
80
60
40
20
MAXIMUM TRANSIENT DURATION (µs)
0
10 100 1000
RESET COMPARATOR OVERDRIVE (V
VCC = 3.3V
= +25°C
T
A
RST
DS690-806 fig7
- VCC) (mV)
_Typical Operating Circuits (cont.)
3.0V OR 3.3V
0.1µF 0.1µF
3.6V
0.1µF
V
CC
VBATT
MAX704T/S/R MAX806T/S/R
MR
GND
PFI
V
RESET
OUT
RAM
µP
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
Figure 7. Maximum Transient Duration without Causing a Reset Pulse vs. Reset Comparator Overdrive
______________________________________________________________________________________ 11
3.0V/3.3V Microprocessor Supervisory Circuits
_Ordering Information (continued) ___________________Chip Topography
V
PART** TEMP. RANGE
MAX704_CPA
MAX704_CSA 0°C to +70°C MAX704_C/D 0°C to +70°C Dice* MAX704_EPA -40°C to +85°C MAX704_ESA -40°C to +85°C MAX704_MJA -55°C to +125°C 8 CERDIP MAX802_CPA MAX802_CSA 0°C to +70°C MAX802_C/D 0°C to +70°C Dice* MAX802_EPA -40°C to +85°C MAX802_ESA -40°C to +85°C MAX802_MJA -55°C to +125°C 8 CERDIP MAX804_CPA MAX804_CSA 0°C to +70°C MAX804_C/D 0°C to +70°C Dice* MAX804_EPA -40°C to +85°C MAX804_ESA -40°C to +85°C MAX804_MJA -55°C to +125°C 8 CERDIP MAX805_CPA MAX805_CSA 0°C to +70°C MAX805_C/D 0°C to +70°C Dice* MAX805_EPA -40°C to +85°C MAX805_ESA -40°C to +85°C MAX805_MJA -55°C to +125°C 8 CERDIP MAX806_CPA MAX806_CSA 0°C to +70°C MAX806_C/D 0°C to +70°C Dice* MAX806_EPA -40°C to +85°C MAX806_ESA -40°C to +85°C MAX806_MJA -55°C to +125°C 8 CERDIP
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
* Contact factory for dice specifications. ** These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into the blank to complete the part number.
V
CC
GND
(2.032mm)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R. [ ] ARE FOR MAX704T/S/R, MAX806T/S/R.
TRANSISTOR COUNT: 802; SUBSTRATE IS CONNECTED TO THE HIGHER OF
VCCOR VBATT, AND MUST BE FLOATED IN ANY HYBRID DESIGN.
OUT
PFI PFO
0.080"
VBATT
(2.794mm)
RESET (RESET)
WDI [MR]
0.110"
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
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© 1994 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
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