These microprocessor (µP) supervisory circuits reduce
the complexity and number of components required for
power-supply monitoring and battery-control functions
in µP systems. They significantly improve system reliability and accuracy compared to separate ICs or
discrete components.
These devices are designed for use in systems powered
by 3.0V or 3.3V supplies. See the selector guide in the
back of this data sheet for similar devices designed for
5V systems. The suffixes denote different reset threshold
voltages: 3.075V (T), 2.925V (S), and 2.625V (R) (see
Reset Threshold
section in the
Detailed Description
). All
these parts are available in 8-pin DIP and SO packages.
Functions offered in this series are as follows:
Active-High Reset
Active-Low Reset
Part
MAX690
MAX704
MAX802
MAX804
MAX805
MAX806
Watchdog Input
✓✓ ✓
✓✓✓
✓✓ ✓
✓✓✓
✓✓✓
✓✓✓
Threshold Accuracy
Backup-Battery
Manual Reset
Switch
Input
Comparator
Power-Fail
Power-Fail
±4%
±4%
±2%
±2%
±4%
±2%
Reset Window
✓
±75mV
✓
±75mV
✓
±2%
✓
±2%
✓
±75mV
✓
±2%
________________________Applications
Battery-Powered Computers and Controllers
Embedded Controllers
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
Portable Equipment
♦ 40µA VCCSupply Current
♦ 1µA Battery Supply Current
♦ Voltage Monitor for Power-Fail or
Low-Battery Warning
♦ Guaranteed –R—E—S—E—T– Assertion to VCC= 1V
♦ 8-Pin DIP and SO Packages
______________Ordering Information
PART**TEMP. RANGE
MAX690_CPA
MAX690_CSA0°C to +70°C
MAX690_C/D0°C to +70°CDice*
MAX690_EPA-40°C to +85°C
MAX690_ESA-40°C to +85°C
MAX690_MJA-55°C to +125°C8 CERDIP
0°C to +70°C
Ordering Information continued on last page.
* Contact factory for dice specifications.
** These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
—RESET Active-High, Open-Drain Reset Output is the inverse of –R—E—S—E—T–.
PIN
MAX704
MAX806
1V
2V
3GNDGround
4PFI
5
6WDI
7
8VBATT
MAX804
MAX805
1
2
3
4
5
—
6
7
—
8
_______________Detailed Description
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These µP supervisory circuits assert reset to
prevent code execution errors during power-up, powerdown, brownout conditions, or a watchdog timeout.
–R—E—S—E—T–
V
a backup battery,–R—E—S—E—T– is guaranteed valid for V
> 1V. Once VCCexceeds the reset threshold, an
internal timer keeps–R—E—S—E—T– low for the reset timeout
period; after this interval,–R—E—S—E—T– goes high (Figure 2).
If a brownout condition occurs (VCCdips below the
reset threshold),–R—E—S—E—T– goes low. Each time–R—E—S—E—T
is asserted, it stays low for the reset timeout period.
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
Any time VCCgoes below the reset threshold, the
internal timer restarts.
The watchdog timer can also initiate a reset. See the
Watchdog Input
The MAX804_/MAX805_ active-high RESET output is
open drain, and the inverse of the MAX690_/MAX704_/
MAX802_/MAX806_–R—E—S—E—T– output.
Supply Output for CMOS RAM. When VCCis above the reset threshold, V
1
2
3
4
5
6
—
–R—E—S—E—T–
—
7
8
connected to VCCthrough a P-channel MOSFET switch. When VCCfalls below VSWand
OUT
VBATT, VBATT connects to V
Main Supply Input
CC
Power-Fail Input. When PFI is less than V
low; otherwise, –P—F—O–remains high. Connect to ground if unused.
Power-Fail Output. When PFI is less than V
–P—F—O–
otherwise, –P—F—O–remains high. Leave open if unused.
Watchdog Input. If WDI remains high or low for 1.6sec, the internal watchdog timer runs out
and reset is triggered. The internal watchdog timer clears while reset is asserted or when
WDI sees a rising or falling edge. The watchdog function cannot be disabled.
Manual Reset Input. A logic low on –M—R–asserts reset. Reset remains asserted as long as
–M—R–
–M—R–
is low and for 200ms after –M—R–returns high. This active-low input has an internal
70µA pull-up current. It can be driven from a TTL or CMOS logic line, or shorted to
ground with a switch. Leave open if unused.
Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever
VCCis below the reset threshold or when –M—R–is a logic low. It remains low for 200ms after
either VCCrises above the reset threshold, the watchdog triggers a reset, or –M—R–goes
from low to high.
Backup-Battery Input. When VCCfalls below VSWand VBATT, V
VBATT. When VCCrises above the reset threshold, V
exceed VCC. Connect to VCCif no battery is used.
Reset Output
OUT
The MAX690T/MAX704T/MAX805T are intended for
3.3V systems with a ±5% power-supply tolerance and a
10% system tolerance. Except for watchdog faults,
reset will not assert as long as the power supply
remains above 3.15V (3.3V - 5%). Reset is guaranteed
to assert before the power supply falls below 3.0V.
The MAX690S/MAX704S/MAX805S are designed for
3.3V ±10% power supplies. Except for watchdog
faults, they are guaranteed not to assert reset as long
CC
as the supply remains above 3.0V (3.3V - 10%). Reset
is guaranteed to assert before the power supply falls
below 2.85V (VCC- 14%).
The MAX690R/MAX704R/MAX805R are optimized for
–
monitoring 3.0V ±10% power supplies. Reset will not
occur until VCCfalls below 2.7V (3.0V - 10%), but is
guaranteed to occur before the supply falls below
2.59V (3.0V - 14%).
The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T
are respectively similar to the MAX690R/S/T,
MAX805R/S/T, and MAX704R/S/T, but with tightened
reset and power-fail threshold tolerances.
( ) MAX804T/S/R, MAX805T/S/R ONLY, RESET EXTERNALLY PULLED UP TO VCC
VBATT = 3.6V
t
WP
VBATT = PFI = 3.6V
I
= 0mA
OUT
V
RST
V
SW
Figure 1. Block DiagramFigure 2. Timing Diagram
Watchdog Input
The watchdog circuit monitors the µP’s activity. If the µP
(MAX690_/802_/804_/805_)
does not toggle the watchdog input (WDI) within 1.6sec,
a reset pulse is triggered. The internal 1.6sec timer is
cleared by either a reset pulse or by a transition (low-tohigh or high-to-low) at WDI. If WDI is tied high or low, a
–R—E—S—E—T–
pulse is triggered every 1.8sec (tWDplus tRS).
As long as reset is asserted, the timer remains cleared
and does not count. As soon as reset is deasserted,
the timer starts counting. Unlike the 5V MAX690 family,
the watchdog function cannot be disabled.
The PFI input is compared to an internal reference. If
PFI is less than V
comparator is intended for use as an undervoltage
PFT
detector to signal a failing power supply. However, the
comparator does not need to be dedicated to this
function because it is completely separate from the rest
of the circuitry.
The power-fail comparator turns off and–P—F—O– goes low
when VCCfalls below VSWon power-down. The powerfail comparator turns on as VCCcrosses VSWon
power-up. If the comparator is not used, connect PFI to
ground and leave–P—F—O– unconnected.–P—F—O–may be
connected to–M—R–on the MAX704_/MAX806_ so that a
low voltage on PFI will generate a reset (Figure 5b).
In the event of a brownout or power failure, it may be
Backup-Battery Switchover
necessary to preserve the contents of RAM. With a
backup battery installed at VBATT, the devices automatically switch RAM to backup power when V
falls.
CC
This family of µP supervisors (designed for 3.3V and 3V
systems) doesn’t always connect VBATT to V
VBATT is greater than VCC. VBATT connects to V
(through a 140Ω switch) when VCCis below VSWand
OUT
when
OUT
VBATT is greater than VCC, or when VCCfalls below
1.75V (typ) regardless of the VBATT voltage. This is
done to allow the backup battery (e.g., a 3.6V lithium
cell) to have a higher voltage than VCC.
Switchover at VSW(2.40V) ensures that battery-backup
mode is entered before V
minimum required to reliably retain data in CMOS RAM.
gets too close to the 2.0V
OUT
Switchover at higher VCCvoltages would decrease
backup-battery life. When VCCrecovers, switchover is
deferred until VCCrises above the reset threshold
(V
) to ensure a stable supply. V
RST
VCCthrough a 3Ω PMOS power switch.
is connected to
OUT
Manual Reset
A logic low on–M—R–asserts reset. Reset remains asserted
while–M—R–is low, and for tWP(200ms) after–M—R–returns
high. This input has an internal 70µA pull-up current, so
it can be left open if it is not used.–M—R–can be driven with
TTL or CMOS logic levels, or with open-drain/collector
outputs. Connect a normally open momentary switch
from–M—R–to GND to create a manual-reset function;
external debounce circuitry is not required.
__________Applications Information
These µP supervisory circuits are not short-circuit
protected. Shorting V
up transients such as charging a decoupling
capacitor—destroys the device. Decouple both V
and VBATT pins to ground by placing 0.1µF capacitors
as close to the device as possible.
SuperCaps™ are capacitors with extremely high
capacitance values (e.g., order of 0.47F) for their size.
Figure 3 shows two ways to use a SuperCap as a
backup power source. The SuperCap may be
connected through a diode to the 3V input (Figure 3a)
or, if a 5V supply is also available, the SuperCap may
be charged up to the 5V supply (Figure 3b) allowing a
longer backup period. Since VBATT can exceed V
while VCCis above the reset threshold, there are no
special precautions when using these µP supervisors
with a SuperCap.
These µP supervisors were designed for batterybacked applications. If a backup battery is not used,
connect both VBATT and V
different µP supervisor such as the MAX706T/S/R or
MAX708T/S/R.
Replacing the Backup Battery
The backup power source can be removed while V
remains valid, if VBATT is decoupled with a 0.1µF
to ground—excluding power-
OUT
Using a SuperCap
as a Backup Power Source
Operation without a Backup
Power Source
to VCC, or use a
OUT
capacitor to ground, without danger of triggering
RESET/–R—E—S—E—T–. As long as VCCstays above VSW,
Table 1. Input and Output Status in
Battery-Backup Mode
PIN NAMESTATUS
V
V
–P—F—O–
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
WDIThe watchdog timer is disabled
–M—R–
–R—E—S—E—T–
RESETHigh impedance
VBATTConnected to V
Connected to VBATT through an internal
OUT
140Ω switch
Disconnected from V
CC
The power-fail comparator is disabled when
PFI
VCC< V
SW
Logic low when VCC< VSWor PFI < V
Disabled
Low logic
OUT
OUT
PFT
battery-backup mode cannot be entered.
Adding Hysteresis
to the Power-Fail Comparator
The power-fail comparator has a typical input
hysteresis of 10mV. This is sufficient for most applications where a power-supply line is being monitored
through an external voltage divider (see the section
Monitoring an Additional Power Supply
).
If additional noise margin is desired, connect a resistor
between–P—F—O– and PFI as shown in Figure 4a. Select
the ratio of R1 and R2 such that PFI sees 1.237V (V
when VINfalls to its trip point (V
hysteresis and will typically be more than 10 times the
). R3 adds the
TRIP
PFT
value of R1 or R2. The hysteresis window extends both
above (VH) and below (VL) the original trip point (V
Connecting an ordinary signal diode in series with R3,
as shown in Figure 4b, causes the lower trip point (VL)
to coincide with the trip point without hysteresis (V
so the entire hysteresis window occurs above V
This method provides additional noise margin without
TRIP
TRIP
compromising the accuracy of the power-fail threshold
when the monitored voltage is falling. It is useful for
accurately detecting when a voltage falls past a
threshold.
The current through R1 and R2 should be at least 1µA to
ensure that the 25nA (max over extended temperature
range) PFI input current does not shift the trip point. R3
should be larger than 10kΩ so it does not load down the
These µP supervisors can monitor either positive or
negative supplies using a resistor voltage divider to
PFI. –P—F—O– can be used to generate an interrupt to the
µP (Figure 5). Connecting–P—F—O– to–M—R–on the MAX704
and MAX806 causes reset to assert when the
monitored supply goes out of tolerance. Reset remains
asserted as long as–P—F—O– holds–M—R–low, and for 200ms
after–P—F—O– goes high.
Interfacing to µPs
with Bidirectional Reset Pins
µPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX690_/
MAX704_/MAX802_/MAX806_–R—E—S—E—T– output. If, for
example, the–R—E—S—E—T– output is driven high and the µP
wants to pull it low, indeterminate logic levels may
result. To correct this, connect a 4.7kΩ resistor
),
between the–R—E—S—E—T– output and the µP reset I/O, as in
.
Figure 6. Buffer the–R—E—S—E—T– output to other system
components.
Negative-Going VCCTransients
While issuing resets to the µP during power-up, powerdown, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going V
transients (glitches). It is usually undesirable to reset
the µP when VCCexperiences only small glitches.
Figure 7 shows maximum transient duration vs. resetcomparator overdrive, for which reset pulses are not
generated. The graph was produced using negativegoing VCCpulses, starting at 3.3V and ending below
the reset threshold by the magnitude indicated (reset
comparator overdrive). The graph shows the maximum
pulse width a negative-going VCCtransient may
typically have without causing a reset pulse to be
issued. As the amplitude of the transient increases
(i.e., goes farther below the reset threshold), the
maximum allowable pulse width decreases. Typically,
a VCCtransient that goes 100mV below the reset
threshold and lasts for 40µs or less will not cause a
reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V
pin provides additional transient immunity.
_Ordering Information (continued)___________________Chip Topography
V
PART**TEMP. RANGE
MAX704_CPA
MAX704_CSA0°C to +70°C
MAX704_C/D0°C to +70°CDice*
MAX704_EPA-40°C to +85°C
MAX704_ESA-40°C to +85°C
MAX704_MJA-55°C to +125°C8 CERDIP
MAX802_CPA
MAX802_CSA0°C to +70°C
MAX802_C/D0°C to +70°CDice*
MAX802_EPA-40°C to +85°C
MAX802_ESA-40°C to +85°C
MAX802_MJA-55°C to +125°C8 CERDIP
MAX804_CPA
MAX804_CSA0°C to +70°C
MAX804_C/D0°C to +70°CDice*
MAX804_EPA-40°C to +85°C
MAX804_ESA-40°C to +85°C
MAX804_MJA-55°C to +125°C8 CERDIP
MAX805_CPA
MAX805_CSA0°C to +70°C
MAX805_C/D0°C to +70°CDice*
MAX805_EPA-40°C to +85°C
MAX805_ESA-40°C to +85°C
MAX805_MJA-55°C to +125°C8 CERDIP
MAX806_CPA
MAX806_CSA0°C to +70°C
MAX806_C/D0°C to +70°CDice*
MAX806_EPA-40°C to +85°C
MAX806_ESA-40°C to +85°C
MAX806_MJA-55°C to +125°C8 CERDIP
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
* Contact factory for dice specifications.
** These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
V
CC
GND
(2.032mm)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R.
[ ] ARE FOR MAX704T/S/R, MAX806T/S/R.
TRANSISTOR COUNT: 802;
SUBSTRATE IS CONNECTED TO THE HIGHER OF
VCCOR VBATT, AND MUST BE FLOATED IN ANY
HYBRID DESIGN.
OUT
PFI PFO
0.080"
VBATT
(2.794mm)
RESET
(RESET)
WDI
[MR]
0.110"
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
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