The MAX7389/MAX7390 replace ceramic resonators,
crystals, and supervisory functions for microcontrollers
in 3.3V and 5V applications.
The MAX7389/MAX7390 provide a clock source, reset,
and watchdog functions. The watchdog timer is pin programmable and provides watchdog timeout values in
the 16ms to 2048ms range. The MAX7389 provides a
separate watchdog output that is used as a status indicator or to control safety-critical system elements.
The MAX7390 features a clock-speed select that
reduces the output frequency by half. This functionality
allows the microcontroller to operate at reduced power
and may be used to extend the time available to perform housekeeping tasks, such as writing data to flash
during a power failure.
The MAX7389/MAX7390 clock outputs are factory programmed to a frequency in the 1MHz to 16MHz range.
Four standard frequencies are available. Other frequencies are available upon request. The maximum operating
supply current is 5.5mA with a clock frequency of 12MHz.
Unlike typical crystal and ceramic resonator oscillator
circuits, the MAX7389/MAX7390 are resistant to EMI
and vibration, and operate reliably at high temperatures. The high-output drive current and absence of
high-impedance nodes make the oscillator invulnerable
to dirty or humid operating conditions.
The MAX7389/MAX7390 are available in an 8-pin µMAX
®
package. The MAX7389/MAX7390 standard operating
temperature range is from -40°C to +125°C.
Applications
White GoodsHandheld Products
AutomotivePortable Equipment
Appliances and ControlsMicrocontroller Systems
Features
♦ Robust Microcontroller Clock and Supervisor in a
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
RST/RST
TOP VIEW
µMAX
WDI
WDOGND
1
2
87CLOCK
WDS1
WDS2
V
CC
3
4
6
5
MAX7389
Pin Configurations
Ordering Information
Note: “s” is a placeholder for the reset output type. Insert the
symbol found in Table 3 in the place of “s.” “r” is a placeholder
for the power-on reset (POR) voltage. Insert the symbol found in
Table 2 in the place of “r.” “ff” is a placeholder for the nominal
output frequency. Insert the symbol found in Table 4 in the
place of “ff.” For example, MAX7389CMTP describes a device
with 4.38V reset level, open-collector
RST
output, and a clock
output frequency of 8MHz.
Typical Application Circuit, Functional Diagram, and Selector
Guide appear at end of data sheet.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +6.0V
All Other Pins to GND ................................-0.3V to (V
CC
+ 0.3V)
CLOCK, RST/RST, WDO Output Current .........................±50mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin µMAX (derate 4.5mW/°C over +70°C) ................362mW
Operating Temperature Range .........................-40°C to +125°C
Note 1: All parameters are tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design. Not production tested.
CLOCK Duty Cycle(Note 2)455055%
CLOCK Output Jitter
Output Rise Timet
Output Fall Timet
INTERNAL POWER-ON RESET
Reset Voltage
Reset Timeout Periodt
WATCHDOG
Watchdog Timeout Period
(Figure 2)
POWER FAIL
Power-Fail Select ThresholdV
VCC Monitoring Threshold
Internal Threshold
Internal Threshold HysteresisV
PFI Monitoring Threshold
External Threshold
External Threshold HysteresisV
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Observation for 20s using a 500MHz
oscilloscope
C
R
C
F
V
V
RST
t
WDG
V
IHYSTVCC
V
EHYST
VCC rising, Table 2
TH+
VCC falling
TH-
Figures 1, 286135250µs
WDS1 = GND, WDS2 = GND111622
WDS1 = open, WDS2 = GND223244
WDS1 = VCC, WDS2 = GND446488
WDS1 = GND, WDS2 = open88128177
WDS1 = open, WDS2 = open177256354
WDS1 = VCC, WDS2 = open354512708
WDS1 = GND, WDS2 = V
WDS1 = open, WDS2 = V
W D S 1 = W D S 2 = V
PFI input
SEL
VCC rising4.064.384.60V
ITH
PFI rising0.91.11.4V
ETH
PFI falling1.03.58.0%V
310
= 10p F, 10% to 90% of ful l scal e ( N ote 2) 2.57.0ns
L OA D
= 10p F, 90% to 10% of ful l scal e ( N ote 2) 2.87.5ns
The MAX7389/MAX7390 replace ceramic resonators,
crystals, and supervisory functions for microcontrollers
in 3.3V and 5V applications.
The MAX7389/MAX7390 provide a clock source, reset,
and watchdog functions. The watchdog timer is pin
programmable and provides watchdog timeout values
in the 16ms to 2048ms range. The MAX7389 provides a
separate watchdog output that is used as a status indicator or to control safety-critical system elements. The
MAX7390 features a clock-speed switch that reduces
the output frequency by half. This functionality allows
the microcontroller to operate at reduced power and
may be used to extend the time available to perform
housekeeping tasks, such as writing data to flash during
a power failure.
The integrated reset and watchdog functions provide the
power-supply monitoring functions necessary to ensure
correct microcontroller operation. The reset circuit has
built-in power-supply transient immunity and provides
both power-on reset and power-fail or brownout reset
functionality. Two standard factory-trimmed reset levels
are available. The watchdog timer is programmable to
eight individual timeout values and may be disabled for
test purposes.
Clock Output (CLOCK)
The push-pull clock output (CLOCK) drives a groundconnected 1kΩ load or a positive supply connected
500Ω load to within 300mV of either supply rail. CLOCK
remains stable over the full operating voltage range and
does not generate short output cycles during either
power-on or power-off. A typical startup characteristic is
shown in the Typical Operating Characteristics section.
The MAX7390 clock output frequency is reduced by a
factor of two by taking SPEED low. This functionality
allows the microcontroller to operate at reduced power
and may be used to extend the time available to perform housekeeping tasks.
Reset
The reset function drives the microcontroller reset input
to prevent operation in the cases of the initial power-on
setting, low power-supply voltages, and the failed
PIN
MAX7389MAX7390
11V
22WDS1
33WDS2
44GNDGround
5⎯WDO
—5SPEED
NAMEFUNCTION
Power Input. Connect VCC to the power supply. Bypass VCC to GND with a 1µF capacitor.
CC
Install the bypass capacitor as close to the device as possible.
Watchdog Timeout Select Input 1. Connect WDS1 and WDS2 to V
shown in Table 1, to set the watchdog timeout period.
Watchdog Timeout Select Input 2. Connect WDS2 and WDS1 to V
shown in Table 1, to set the watchdog timeout period.
Watchdog Output. Open-drain watchdog output asserts if WDI is not toggled within the
watchdog timeout period.
Clock-Speed Select Input. Connect SPEED high for the factory-trimmed clock output
frequency. Connect SPEED low to reduce the clock output frequency by half.
, GND, or VCC/2, as
CC
, GND, or VCC/2, as
CC
66WDI
77RST/RST
88CLOCKClock Output
Watchdog Input. A rising edge on WDI resets watchdog timer. If WDI does not receive a
rising edge within the watchdog timeout period (t
timeout period is programmable through WDS1 and WDS2. Connect WDS1 and WDS2 to
V
to disable the watchdog timer.
CC
Reset Output. Reset output is available in one of three configurations: push-pull RST, pushpull RST, or open-drain RST. The reset output is asserted if one of the following conditions
occurs: whenever V
asserts when WDI does not receive a rising edge within the watchdog timeout period.
), RST/RST asserts. The watchdog
WDG
is below the reset threshold level; for devices with WDI, reset output
CC
watchdog operations. Three reset output versions are
available: push-pull RST, push-pull RST, and open-drain
RST. The reset timeout period (t
RST
) is nominally 135s.
Power-On Reset (POR)
The internal power-on reset (POR) circuit detects the
power-supply voltage (VCC) level at startup. The POR
circuit starts the oscillator when VCCexceeds the reset
rising threshold level (V
TH+
). The reset output remains
asserted from the time VCCcrosses the V
TH+
and con-
tinues to be asserted for the reset timeout period (t
RST
).
Upon completion of the reset timeout, the reset output
is released. See Figure 1.
Low-Voltage Lockout
The reset output asserts whenever VCCdrops below the
reset falling threshold, V
TH-
. The difference between the
reset rising and falling threshold values is V
TH+
- (V
TH-
).
The nominal hysteresis value is 2% of the reset rising
threshold value. The reset detection circuitry provides
filtering to prevent triggering on negative voltage spikes.
See the Typical Operating Characteristics for a plot of
maximum transient duration without causing a reset
pulse vs. reset comparator overdrive.
Figure 1 shows the reset output (RST/RST) behavior
during power-up and brownout.
Watchdog
The watchdog function provides microprocessor monitoring by requiring the microprocessor to toggle an output pin to indicate correct operation. The WDI input
monitors the port signal and resets the watchdog timer
on receipt of a rising edge. If an edge is not received
within the required watchdog timeout period, the watchdog circuit initiates a reset cycle and asserts the WDO
output (MAX7389 only). The internal watchdog circuits
are reset and the watchdog timer restarts at the end of
the reset cycle (RST/RST output releases). The WDO
output remains asserted until a valid edge is received
on the WDI input, signifying correct microprocessor
operation. The WDO output can be used as a status
indicator either to the microprocessor or to an external
device, such as a fault-indicating LED or sounder. The
RST ASSERTS ON RESET FALLING
VOLTAGE (V
CLOCK STOPS.
RST CONTINUES TO
ASSERT UNTIL V
1
t
RST
, VCC RISING).
TH+
, VCC FALLING).
TH-
.
CCR
V
CCR
Figure 2. Watchdog Timing Diagram
MAX7389/MAX7390
WDO output is an open-drain output. The power-up
condition of the WDO output is high (not asserted).
The operation of the watchdog and reset function is
illustrated in Figure 2.
The watchdog timeout period is set to one of nine possible values by pin strapping WDS1 and WDS2. Each
control input has three possible values assigned by
connection to GND, V
CC
, or VCC/2 (see Table 1). One
of the assigned values disables the watchdog function
and is intended for customer use during test. The
watchdog timer is disabled while the RST/RST output is
asserted.
Applications Information
Interfacing to a Microcontroller
Clock Input
The CLOCK output is a push-pull, CMOS logic output,
which directly drives any microprocessor (µP) or microcontroller (µC) clock input. There are no impedancematching issues when using the MAX7389/MAX7390.
Operate the MAX7389/MAX7390 and microcontroller
(or other clock input device) from the same supply voltage level. Refer to the microcontroller data sheet for
clock-input compatibility with external clock signals.
The MAX7389/MAX7390 require no biasing components
or load capacitance. When using the MAX7389/
MAX7390 to retrofit a crystal oscillator, remove all biasing
components from the oscillator input.
Power-Supply Considerations
The MAX7389/MAX7390 operate with power-supply
voltages in the 2.7V to 5.5V range. Power-supply
decoupling is needed to maintain the power-supply
rejection performance of the devices. Bypass VCCto
GND with a 0.1µF surface-mount ceramic capacitor.
Mount the bypass capacitor as close to the device as
possible. If possible, mount the MAX7389/MAX7390
close to the microcontroller’s decoupling capacitor so
that additional decoupling is not required.
A larger-value bypass capacitor is recommended if the
MAX7389/MAX7390 are to operate with a large capacitive load. Use a bypass capacitor value of at least 1000
times that of the output load capacitance.
Note: WDS1 or WDS2 is pulled internally to VCC/2 if left floating.
WATCHDOG TIMEOUT
WDS1WDS2
GNDGND111622
VCC/2 = openGND223244
V
CC
GNDVCC/2 = open88128177
VCC/2 = open VCC/2 = open177256354
V
CC
GNDV
VCC/2 = openV
V
CC
GND446488
VCC/2 = open354512708
CC
CC
V
CC
PERIOD (ms)
MINTYPMAX
70810241416
141620482828
Disabled
V
CC
CLK
RST
INTERNAL
WATCHDOG STATE
WDI
WDO
ACTIVE
TRIPPED
WATCHDOG TIMEOUT
PERIOD (t
WDG
)
RESET TIMEOUT PERIOD
(t
RST
)
Output Jitter
The MAX7389/MAX7390s’ jitter performance is given in
the Electrical Characteristics table as a peak-to-peak
value obtained by observing the output of the device for
20s with a 500MHz oscilloscope. Jitter measurements
are approximately proportional to the period of the output frequency of the device. Thus, a 4MHz part has
approximately twice the jitter value of an 8MHz part.
The jitter performance of all clock sources degrades in
the presence of mechanical and electrical interference.
The MAX7389/MAX7390 are immune to vibration,
shock, and EMI influences and thus provide a considerably more robust clock source than crystal- or ceramicresonator-based oscillator circuits.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
8
Ø0.50±0.1
0.6±0.1
0.6±0.1
1
D
TOP VIEW
A2
EH
A1
4X S
BOTTOM VIEW
A
8
1
DIM
A
A1
A2
b
c
D
e
E
H
L
α
S
INCHES
MIN
-
0.002
0.030
0.010
0.005
0.116
0.0256 BSC
0.116
0.188
0.016
0°
0.0207 BSC
MAX
0.043
0.006
0.037
0.014
0.007
0.120
0.120
0.198
0.026
6°
MILLIMETERS
MIN
0.050.15
0.250.36
0.130.18
2.953.05
2.953.05
4.78
0.41
MAX
-1.10
0.950.75
0.65 BSC
5.03
0.66
0.5250 BSC
6°0°
8LUMAXD.EPS
e
FRONT VIEW
c
b
L
SIDE VIEW
α
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 8L uMAX/uSOP
REV.DOCUMENT CONTROL NO.APPROVAL
21-0036
1
J
1
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