MAXIM MAX7360 Technical data

19-4566; Rev 1; 8/10
MAX7360
AD0
PORT7 PORT6
PORT0
COL_(8x)
ROW_(8x)
INTK
INTI
SDA
SCL
ROTARY SWITCH
+14V
8 x 8
TO FC
+1.8V
EVALUATION KIT
AVAILABLE
I2C-Interfaced Key-Switch Controller and LED
Driver/GPIOs with Integrated ESD Protection
The MAX7360 I2C-interfaced peripheral provides micro­processors with management of up to 64 key switches, with an additional eight LED drivers/GPIOs that feature constant-current, PWM intensity control, and rotary switch control options.
The key-switch drivers interface with metallic or resis­tive switches with on-resistances up to 5kI. Key inputs are monitored statically, not dynamically, to ensure low-EMI operation. The MAX7360 features autosleep and autowake modes to further minimize the power consumption of the device. The autosleep feature puts the device in a low-power state (1FA typ) after a sleep timeout period. The autowake feature configures the MAX7360 to return to normal operating mode from sleep upon a keypress.
The key controller debounces and maintains a FIFO of keypress and release events (including autorepeat, if enabled). An interrupt (INTK) output can be configured to alert keypresses, as they occur, or at maximum rate.
There are eight open-drain I/O ports, which can be used to drive LEDs. The maximum constant-current level for each open-drain port is 20mA. The intensity of the LED on each open-drain port can be individually adjusted through a 256-step PWM control. An input port pair (PORT6, PORT7) can be configured to accept 2-bit gray code inputs from a rotary switch. In addition, if not used for key-switch control, up to six column pins can be used as general-purpose open-drain outputs (GPOs) for LED drive or logic control.
The MAX7360 is offered in a 40-pin (5mm x 5mm) thin QFN package with an exposed pad, and a small 36-bump wafer level package (WLP) for cell phones, pocket PCs, and other portable consumer electronic applications. The MAX7360 operates over the -40NC to +85NC extended temperature range.
Features
S Integrated ESD Protection
±8kV IEC 61000-4-2 Contact Discharge ±15kV IEC 61000-4-2 Air-Gap Discharge
S
+14V Tolerant, Open-Drain I/O Ports Capable of
Constant-Current LED Drive
S
Rotary Switch-Capable Input Pair (PORT6, PORT7)
S
256-Step PWM Individual LED Intensity Control
S
Individual LED Blink Rates and Common LED
Fade In/Out Rates from 256ms to 4096ms
S
FIFO Queues Up to 16 Debounced Key Events
S
User-Configurable Key Debounce (9ms to 40ms)
S
Keyscan Uses Static Matrix Monitoring for Low
EMI Operation
S
+1.62V to +3.6V Operation
S
Monitors Up to 64 Keys
S
Key-Switch Interrupt (INTK) on Each Debounced
Event/FIFO Level, or End of Definable Time Period
S
Port Interrupt (INTI) for Input Ports for Special-Key
Functions
S
400kbps, +5.5V Tolerant 2-Wire Serial Interface
with Selectable Bus Timeout
S
Four I
2
C Address Choices
Ordering Information
PART TEMP RANGE PIN-PACKAGE
MAX7360ETL+ -40°C to +85°C 40 TQFN-EP*
MAX7360EWX+ -40°C to +85°C 36 WLP
+Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad.
Simplfied Block Diagram
MAX7360
Applications
Cell Phones
PDAs
Handheld Games
Portable Consumer Electronics
Printers
Instrumentation
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
_______________________________________________________________ Maxim Integrated Products 1
Pin Configurations appear at end of data sheet.
I2C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection
ABSOLUTE MAXIMUM RATINGS
VCC to GND ............................................................. -0.3V to +4V
COL0–COL7, ROW0–ROW7 to GND ......................-0.3V to +4V
SDA, SCL, AD0, INTI, INTK to GND ........................ -0.3V to +6V
PORT0–PORT7 to GND ......................................... -0.3V to +16V
All Other Pins to GND ................................-0.3V to (V
DC Current on PORT0–PORT7, COL2–COL7 ....................25mA
GND Current .......................................................................80mA
Continuous Power Dissipation (T
MAX7360
40-Pin TQFN (derate 22.2mW/NC above +70NC).......1777mW
36-Bump WLP (derate 21.7mW/NC above +70NC) ....1739mW
Junction-to-Case Thermal Resistance (B
40-Pin TQFN ..................................................................2NC/W
36-Bump WLP ...................................................................N/A
Junction-to-Ambient Thermal Resistance (B
40-Pin TQFN ................................................................45NC/W
36-Bump WLP .............................................................46NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a single­ layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
= +70NC)
A
) (Note 1)
JC
JA
) (Note 1)
+ 0.3V)
CC
Operating Temperature Range .......................... -40NC to +85NC
Junction Temperature .....................................................+150NC
Storage Temperature Range ............................ -65NC to +150NC
ESD Protection Human Body Model (R
All Pins .............................................................................Q2kV
IEC 61000-4-2 (R Contact Discharge
ROW0–ROW7, COL0–COL7, PORT0–PORT7 to GND ....Q8kV
Air-Gap Discharge ROW0–ROW7, COL0–COL7, PORT0–PORT7 to GND ..Q15kV
Lead Temperature (TQFN only, soldering, 10s) ..............+300NC
Soldering Temperature (reflow) .......................................+260NC
= 330I, CS = 150pF)
D
= 1.5kI, CS = 100pF)
D
ELECTRICAL CHARACTERISTICS
(VCC = +1.62V to +3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25NC.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Operating Supply Voltage V
External Supply Voltage PORT0–PORT7
Operating Supply Current I
Sleep-Mode Supply Current I Key-Switch Source Current I Key-Switch Source Voltage V Key-Switch Resistance R Startup Time from Shutdown t
Output Low Voltage COL2–COL7
Oscillator Frequency (PWM Clock)
Oscillator Frequency Variation
Key-Scan Frequency f
V
Df
CC
PORT_
CC
SL
KEY
KEY
KEY
START
V
OL
f
OSC
OSC
KEY
All key switches open, oscillator running, COL2–COL7 configured as key switches, V
_ = V
PORT
N keys pressed
(Note 4) 5
I
SINK
TA = +25NC, VCC = +2.61V
TA = T
TA = +25NC
Derived from oscillator clock 64 kHz
CC
= 10mA 0.5 V
MIN
to T
MAX
, V
CC
P 3.6V
1.62 3.3 3.6 V
14 V
34 50
34 +
20 x N
1.3 3 20 35
0.43 0.5 V
2 2.4 ms
125 128 131
kHz
102 164
-6 +8.5 %
FA
FA FA
kI
2 ______________________________________________________________________________________
I2C-Interfaced Key-Switch Controller and LED
Driver/GPIOs with Integrated ESD Protection
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +1.62V to +3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25NC.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
GPIO SPECIFICATIONS
Input High Voltage PORT0–PORT7
Input Low Voltage PORT0–PORT7
Input Leakage Current PORT0–PORT7
Output Low Voltage PORT0–PORT7
Input Capacitance PORT0–PORT7
10mA Port Sinking Current PORT0–PORT7
20mA Port Sinking Current PORT0–PORT7
Port Sink Current Variation
Output Logic-Low Voltage
INTI, INTK
V
IH
V
IL
VIN P V
I
IN
V
OL
CC
V
< V
CC
IN
I
< 20mA 0.6 V
SINK
= +1.62V to +3.6V, TA = +25NC
V
CC
V
= +3.3V, VOL = +1V 8.67 9.76 10.51
CC
= +1.62V to +3.6V, TA = +25NC
V
CC
V
= +3.3V, VOL = +1V 19.55 20 20.69
CC
V
= +3.3V, VOL = +1V, TA = +25NC,
CC
20mA output mode
I
= 10mA 0.6 V
SINK
0.7 x V
CC
0.3 x V
CC
-0.25 +0.25
-1 +5
20 pF
8.55 11.52
19.40 21.33
+Q1.5 +Q2.4
V
V
FA
mA
mA
%
MAX7360
PWM Frequency f
SERIAL-INTERFACE SPECIFICATIONS
Input High Voltage SDA, SCL, AD0
Input Low Voltage SDA, SCL, AD0
Input Leakage Current SDA, SCL, AD0
Output Low Voltage SDA
Input Capacitance SDA, SCL, AD0
2
I
C TIMING SPECIFICATIONS
SCL Serial-Clock Frequency f
Bus Free Time Between a STOP and START Condition
Hold Time (Repeated) START Condition
Repeated START Condition Setup Time
STOP Condition Setup Time t
PWM
V
C
t
t
HD, STA
t
SU, STA
SU, STO
V
IH
V
IL
I
IN
OL
IN
SCL
BUF
Derived from oscillator clock 500 Hz
0.7 x V
CC
0.3 x
V
CC
VIN P V
CC
V
> V
IN
CC
I
= 6mA 0.6 V
SINK
Bus timeout disabled 0 400 kHz
-0.25 +0.25
-0.5 +0.5
10 pF
1.3
0.6
0.6
0.6
V
V
FA
Fs
Fs
Fs
Fs
_______________________________________________________________________________________ 3
I2C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +1.62V to +3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25NC.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Data Hold Time t Data Setup Time t SCL Clock Low Period t SCL Clock High Period t
MAX7360
Rise Time of Both SDA and SCL Signals, Receiving
Fall Time of Both SDA and SCL Signals, Receiving
Fall Time of SDA Signal, Transmitting
Pulse Width of Spike Suppressed t
Capacitive Load for Each Bus Line
Note 2: All parameters are tested at T Note 3: All digital inputs at V Note 4: Guaranteed by design. Note 5: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
the undefined region of SCL’s falling edge.
Note 6: C Note 7: I Note 8: Input filters on the SDA, SCL, and AD0 inputs suppress noise spikes less than 50ns.
= total capacitance of one bus line in pF. tR and tF measured between +0.3VCC and +0.7VCC.
b
6mA.
SINK
CC
HD, DAT
SU, DAT
LOW
HIGH
t
R
t
F
t
F, TX
SP
C
= +25NC. Specifications over temperature are guaranteed by design.
A
or GND.
(Note 5) 0.9
100 ns
1.3
0.7
(Notes 4, 6)
(Notes 4, 6)
(Notes 4, 7)
(Notes 4, 8) 50 ns
(Note 4) 400 pF
b
20 +
0.1C
b
20 +
0.1C
b
20 +
0.1C
b
of the SCL signal) to bridge
IL
300 ns
300 ns
250 ns
Fs
Fs Fs
4 ______________________________________________________________________________________
I2C-Interfaced Key-Switch Controller and LED
SINK CURRENT (mA)
SINK CURRENT (mA)
CONSTANT-CURRENT GPIO OUTPUT
CONSTANT-CURRENT GPIO OUTPUT
CONSTANT-CURRENT GPIO OUTPUT
Driver/GPIOs with Integrated ESD Protection
Typical Operating Characteristics
(VCC = +2.5V, TA = +25NC, unless otherwise noted.)
MAX7360
GPO OUTPUT LOW VOLTAGE
vs. SINK CURRENT (COL2–COL7)
250
VCC = 2.4V
200
150
100
OUTPUT VOLTAGE (mV)
50
0
0 20
TA = +85NC
TA = +25NC
SINK CURRENT (mA)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
45
AUTOSLEEP = OFF
40
35
30
25
SUPPLY CURRENT (A)
20
15
TA = +25NC
2.0
1.6 3.6 SUPPLY VOLTAGE (V)
TA = +85NC
TA = -40NC
2.4
2.8
TA = -40NC
15105
3.2
GPO OUTPUT LOW VOLTAGE
vs. SINK CURRENT (COL2–COL7)
250
VCC = 3.0V
MAX7360 toc01
200
150
100
OUTPUT VOLTAGE (mV)
50
0
0 20
KEY-SWITCH SOURCE CURRENT
18.4 V
= O
COL0
18.3
MAX7360 toc04
18.2
18.1
18.0
TA = +85NC
17.9
17.8
17.7
17.6
KEY-SWITCH SOURCE CURRENT (A)
17.5
TA = -40NC, +25NC
17.4
1.6 3.63.2
TA = +85°C
TA = +25°C
vs. SUPPLY VOLTAGE
TA = -40NC, +85NC
TA = -40NC
2.42.0
2.8
SUPPLY VOLTAGE (V)
TA = -40°C
15105
TA = +25NC
GPO OUTPUT LOW VOLTAGE
vs. SINK CURRENT (COL2–COL7)
250
VCC = 3.6V
MAX7360 toc02
200
150
100
OUTPUT VOLTAGE (mV)
50
0
0 20
SHUTDOWN SUPPLY CURRENT
3.0
2.5
MAX7360 toc05
2.0
1.5
1.0
SHUTDOWN SUPPLY CURRENT (A)
0.5
0
1.6 3.63.2
TA = +85°C
TA = +25°C
vs. SUPPLY VOLTAGE
TA = -40NC
TA = +25NC
TA = +85NC
2.8
2.42.0
SUPPLY VOLTAGE (V)
MAX7360 toc03
TA = -40°C
15105
MAX7360 toc06
SINK CURRENT vs. OUTPUT VOLTAGE
25
VCC = 2.4V
20
TA = -40NC
15
10
SINK CURRENT (mA)
5
0
TA = +25NC
TA = +85NC
0 3.02.5
OUTPUT VOLTAGE (V)
_______________________________________________________________________________________ 5
SINK CURRENT vs. OUTPUT VOLTAGE
25
VCC = 3.0V
MAX7360 toc07
20
TA = -40NC
15
10
SINK CURRENT (mA)
5
0
1.5 2.01.00.5
TA = +25NC
TA = +85NC
0 3.02.5
1.5 2.01.00.5
OUTPUT VOLTAGE (V)
MAX7360 toc08
SINK CURRENT vs. OUTPUT VOLTAGE
25
VCC = 3.6V
20
TA = -40NC
15
10
SINK CURRENT (mA)
5
0
TA = +25NC
TA = +85NC
0 3.02.5
1.5 2.01.00.5
OUTPUT VOLTAGE (V)
MAX7360 toc09
I2C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection
Pin Description
PIN
TQFN WLP
1 A6 ROW0 Row Input from Key Matrix. Leave ROW0 unconnected or connect to GND if unused. 2 B6 ROW1 Row Input from Key Matrix. Leave ROW1 unconnected or connect to GND if unused. 3 C4 ROW2 Row Input from Key Matrix. Leave ROW2 unconnected or connect to GND if unused.
MAX7360
4 C6 ROW3 Row Input from Key Matrix. Leave ROW3 unconnected or connect to GND if unused.
5, 15, 25, 35B4, C5, D2,
E4
6 D6 ROW4 Row Input from Key Matrix. Leave ROW4 unconnected or connect to GND if unused. 7 D5 ROW5 Row Input from Key Matrix. Leave ROW5 unconnected or connect to GND if unused. 8 E6 ROW6 Row Input from Key Matrix. Leave ROW6 unconnected or connect to GND if unused. 9 D4 ROW7 Row Input from Key Matrix. Leave ROW7 unconnected or connect to GND if unused.
10, 20, 27,
30, 40
11 F6 COL0 Column Output to Key Matrix. Leave COL0 unconnected if unused. 12 E5 COL1 Column Output to Key Matrix. Leave COL1 unconnected if unused.
13 F5 COL2
14 F4 COL3
16 F3 COL4
17 E3 COL5
18 F2 COL6
19 F1 COL7
21 E2 SDA I 22 E1 SCL I
23 D3
C2 N.C. No Connection. Not internally connected. Leave unconnected.
NAME FUNCTION
GND Ground
Column Output to Key Matrix. Leave COL2 unconnected if unused. COL2 can be configured as a GPO (see Table 9 in the Register Tables section).
Column Output to Key Matrix. Leave COL3 unconnected if unused. COL3 can be configured as a GPO (see Table 9 in the Register Tables section).
Column Output to Key Matrix. Leave COL4 unconnected if unused. COL4 can be configured as a GPO (see Table 9 in the Register Tables section).
Column Output to Key Matrix. Leave COL5 unconnected if unused. COL5 can be configured as a GPO (see Table 9 in the Register Tables section).
Column Output to Key Matrix. Leave COL6 unconnected if unused. COL6 can be configured as a GPO (see Table 9 in the Register Tables section).
Column Output to Key Matrix. Leave COL7 unconnected if unused. COL7 can be configured as a GPO (see Table 9 in the Register Tables section).
2
C-Compatible, Serial-Data I/O
2
C-Compatible, Serial-Clock Input
INTK
Active-Low Key-Switch Interrupt Output. INTK is open drain and requires a pullup resistor.
6 ______________________________________________________________________________________
I2C-Interfaced Key-Switch Controller and LED
Driver/GPIOs with Integrated ESD Protection
Pin Description (continued)
MAX7360
PIN
TQFN WLP
24 D1 26 C1 V 28 B1 AD0 Address Input. AD0 selects up to four device slave addresses (Table 3). 29 A1 I.C. Internally Connected. Connect to GND for normal operation.
31 B2 PORT0
32 A2 PORT1
33 B3 PORT2
34 A3 PORT3
36 A4 PORT4
37 C3 PORT5
38 A5 PORT6
39 B5 PORT7
EP
NAME FUNCTION
INTI Active-Low GPI Interrupt Output. INTI is open drain and requires a pullup resistor.
CC
Positive Supply Voltage. Bypass VCC to GND with a 0.1FF or higher ceramic capacitor.
GPIO Port. Open-drain I/O rated at +14V. PORT0 can be configured as a constant­current output.
GPIO Port. Open-drain I/O rated at +14V. PORT1 can be configured as a constant­current output.
GPIO Port. Open-drain I/O rated at +14V. PORT2 can be configured as a constant­current output.
GPIO Port. Open-drain I/O rated at +14V. PORT3 can be configured as a constant­current output.
GPIO Port. Open-drain I/O rated at +14V. PORT4 can be configured as a constant­current output.
GPIO Port. Open-drain I/O rated at +14V. PORT5 can be configured as a constant­current output.
GPIO Port. Open-drain I/O rated at +14V. PORT6 can be configured as a constant­current output, or a rotary switch input.
GPIO Port. Open-drain I/O rated at +14V. PORT7 can be configured as a constant­current output, or a rotary switch input.
Exposed Pad (TQFN only). EP is internally connected to GND. Connect EP to a ground plane to increase thermal performance.
_______________________________________________________________________________________ 7
I2C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection
Functional Block Diagram
PORT0 PORT1 PORT2 PORT3 PORT4 PORT5 PORT6 PORT7
COL0 COL1 COL2* COL3* COL4* COL5* COL6* COL7*
ROW0 ROW1 ROW2 ROW3 ROW4 ROW5 ROW6 ROW7
MAX7360
INTI
INTK
SDA
SCL AD0
MAX7360
I2C
INTERFACE
BUS
TIMEOUT
128kHz
OSCILLATOR
CONTROL
REGISTERS
FIFO
POR
PWM
GPIO
LOGIC
ROTARY
KEY
SCAN
LED ENABLE
GPIO ENABLE
GPIO INPUT
COLUMN ENABLE
GPO ENABLE
CURRENT DETECT
ROW ENABLE
PORT GPIO
AND
CONSTANT-
CURRENT
LED DRIVE
CURRENT
SOURCE
COLUMN
DRIVES
OPEN­DRAIN
ROW
DRIVES
*GPO
Detailed Description
The MAX7360 is a microprocessor peripheral low-noise key-switch controller that monitors up to 64 key switches with optional autorepeat, and key events that are pre­sented in a 16-byte FIFO. The MAX7360 also features eight open-drain GPIOs configured for digital I/O or constant-current output for LED applications up to +14V.
The MAX7360 features an automatic sleep mode and automatic wakeup that further reduce supply current consumption. The MAX7360 can be configured to enter sleep mode after a programmable time following a key event. The FIFO content is maintained and can be read in sleep mode. The MAX7360 does not enter autosleep when a key is held down. The autowake feature takes
To prevent overloading the microprocessor with too many interrupts, interrupt requests are issued on a programmable number of FIFO entries, and/or after a set period of time (Table 10). The key-switch status is checked by reading the key-switch FIFO. A 1-byte read access returns both the next key event in the FIFO (if there is one) and the FIFO status. INTK functions as an open-drain general-purpose output (GPO) capable of driving an LED if key-switch interrupts are not required.
Up to six of the key-switch outputs function as open­drain GPOs capable of driving additional LEDs when the application requires fewer keys to be scanned. For each key-switch output used as a GPO, the number of monitored key switches reduces by eight.
the MAX7360 out of sleep mode following a keypress event. Enable/disable autosleep and autowake through the configuration register (Table 8).
8 ______________________________________________________________________________________
On power-up, all control registers are set to power-up values and the MAX7360 is in sleep mode (Table 1).
Initial Power-Up
I2C-Interfaced Key-Switch Controller and LED
Driver/GPIOs with Integrated ESD Protection
Table 1. Register Address Map and Power-Up Condition
ADDRESS
CODE
(hex)
0x00 Read only 0x3F Keys FIFO Read FIFO key-scan data out
0x01
0x02
0x03
0x04
0x05
0x06
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x48 Read only 0x00
0x49 Read only 0xFF GPIO input register PORT0–PORT7 input values
0x4A Read only 0x00 Rotary switch count Switch cycles since last read
0x50
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
READ/ WRITE
R/W
R/W R/W R/W R/W R/W
R/W
R/W R/W
R/W
R/W R/W
R/W
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
POWER-UP
VALUE (hex)
0x0A Configuration
0xFF Debounce Key debounce time settling and GPO enable
0x00 Interrupt
0xFE GPO
0x00 Key repeat Delay and frequency for key repeat
0x07 Sleep Idle time to autosleep
0x00
0x00 GPIO control PORT0–PORT7 input/output control
0x00 GPIO debounce PORT0–PORT7 debounce time setting
0xC0
0x00 GPIO output mode PORT0–PORT7 output mode control
0x00 Common PWM Common PWM duty-cycle setting
0x00
0x00 PORT0 PWM PORT0 individual duty-cycle setting
0x00 PORT1 PWM PORT1 individual duty-cycle setting
0x00 PORT2 PWM PORT2 individual duty-cycle setting
0x00 PORT3 PWM PORT3 individual duty-cycle setting
0x00 PORT4 PWM PORT4 individual duty-cycle setting
0x00 PORT5 PWM PORT5 individual duty-cycle setting
0x00 PORT6 PWM PORT6 individual duty-cycle setting
0x00 PORT7 PWM PORT7 individual duty-cycle setting
0x00 PORT0 configuration PORT0 interrupt, PWM mode control and blink period setting
0x00 PORT1 configuration PORT1 interrupt, PWM mode control and blink period setting
0x00 PORT2 configuration PORT2 interrupt, PWM mode control and blink period setting
0x00 PORT3 configuration PORT3 interrupt, PWM mode control and blink period setting
0x00 PORT4 configuration PORT4 interrupt, PWM mode control and blink period setting
0x00 PORT5 configuration PORT5 interrupt, PWM mode control and blink period setting
0x00 PORT6 configuration PORT6 interrupt, PWM mode control and blink period setting
0x00 PORT7 configuration PORT7 interrupt, PWM mode control and blink period setting
REGISTER FUNCTION
Power-down, key-release enable, autowakeup, and I out enable
Key-switch interrupt INTK frequency setting COL2–COL7 and INTK GPO control
GPIO global con-
figuration
GPIO constant-
current setting
Rotary switch con-
figuration
2
C timeout flag I2C timeout since last POR
I
Rotary switch, GPIO standby, GPIO reset, fade
PORT0–PORT7 constant-current output setting
Rotary switch interrupt frequency and debounce time setting
DESCRIPTION
2
C time-
MAX7360
_______________________________________________________________________________________ 9
I2C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection
Table 2. Key-Switch Mapping
PIN COL0 COL1 COL2* COL3* COL4* COL5* COL6* COL7* ROW0 ROW1 ROW2 ROW3 ROW4
MAX7360
ROW5 ROW6 ROW7
*These columns can be configured as GPOs.
KEY 0 KEY 8 KEY 16 KEY 24 KEY 32 KEY 40 KEY 48 KEY 56
KEY 1 KEY 9 KEY 17 KEY 25 KEY 33 KEY 41 KEY 49 KEY 57
KEY 2 KEY 10 KEY 18 KEY 26 KEY 34 KEY 42 KEY 50 KEY 58
KEY 3 KEY 11 KEY 19 KEY 27 KEY 35 KEY 43 KEY 51 KEY 59
KEY 4 KEY 12 KEY 20 KEY 28 KEY 36 KEY 44 KEY 52 KEY 60
KEY 5 KEY 13 KEY 21 KEY 29 KEY 37 KEY 45 KEY 53 KEY 61
KEY 6 KEY 14 KEY 22 KEY 30 KEY 38 KEY 46 KEY 54 KEY 62
KEY 7 KEY 15 KEY 23 KEY 31 KEY 39 KEY 47 KEY 55 KEY 63
Key-Scan Controller
Key inputs are scanned statically, not dynamically, to ensure low-EMI operation. As inputs only toggle in response to switch changes, the key matrix can be routed closer to sensitive circuit nodes.
The key-scan controller debounces and maintains a FIFO of keypress and release events (including autorepeated keypresses, if autorepeat is enabled). Table 2 shows the key-switch order. The user-programmable key-switch debounce time, and autosleep timer, is derived from the 64kHz clock, which in turn is derived from the 128kHz oscillator. Time delay for autorepeat and key-switch interrupt is based on the key-switch debounce time.
Keys FIFO Register (0x00)
The keys FIFO register contains the information pertaining to the status of the keys FIFO, as well as the key events that have been debounced (see Table 7 in the Register Tables section). Bits D0–D5 denote which of the 64 keys have been debounced and the keys are numbered as in Table 2.
D7 indicates if there is more data in the FIFO, except when D5:D0 indicate key 63 or key 62. When D5:D0 indicate key 63 or key 62, the host should read one more time to determine whether there is more data in the FIFO. Use key 62 and key 63 for rarely used keys. D6 indicates if it is a keypress or release event, except when D5:D0 indicate key 63 or key 62.
Reading the key-scan FIFO clears the interrupt INTK depending on the setting of bit D5 in the configuration register (0x01).
Configuration Register (0x01)
The configuration register controls the I feature, enables key-release detection, enables autowake,
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C bus timeout
and determines how INTK is deasserted. Write to bit D7 to put the MAX7360 into sleep mode or operating mode. Autosleep and autowake, when enabled, also change the status of D7 (see Table 8 in the Register Tables section).
Debounce Register (0x02)
The debounce register sets the time for each debounce cycle, as well as setting whether the GPO ports are enabled or disabled. Bits D0–D4 set the debounce time in increments of 1ms starting at 9ms and ending at 40ms (see Table 9 in the Register Tables section). Bits D5, D6, and D7 set which of the GPO ports is enabled. Note the GPO ports are enabled only in the combinations shown in Table 9, from all disabled to all enabled.
Key-Switch Interrupt Register (0x03)
The interrupt register contains information related to the settings of the interrupt request function, as well as the status of the INTK output, which can also be configured as a GPO. If bits D0–D7 are set to 0x00, the INTK output is configured as a GPO that is controlled by bit D1 in the port register. There are two types of interrupts, the FIFO­based interrupt and time-based interrupt. Set bits D0–D4 to assert interrupts at the end of the selected number of debounce cycles following a key event (see Table 10 in the Register Tables section). This number ranges from 1–31 debounce cycles. Setting bits D7, D6, and D5 set the FIFO-based interrupt when there are 2–14 key events stored in the FIFO. Both interrupts can be configured simultaneously and INTK asserts depending on which condition is met first. INTK deasserts depending on the status of bit D5 in the configuration register.
Ports Register (0x04)
The ports register sets the values of PORT2–PORT7 and the INTK port, when configured, as open-drain GPOs.
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