General Description
The MAX7327, a 2-wire serial-interfaced peripheral,
features 12 push-pull outputs and four configurable
open-drain I/O ports with selectable internal pullups
and transition detection. Ports are overvoltage protected to +6V, independent of supply voltage.
The four I/O ports configured as inputs are continuously
monitored for state changes (transition detection). State
changes are indicated by the open-drain, +6V-tolerant
INT output. The interrupt is latched, detecting transient
changes. When the MAX7327 is subsequently accessed
through the serial interface, any pending interrupt is
cleared. The 12 push-pull and the four open-drain outputs are rated to sink 20mA, and are capable of driving
LEDs. The RST input clears the serial interface, terminating any I2C communication to or from the MAX7327.
The MAX7327 uses two address inputs with four-level
logic to allow 16 I
2
C slave addresses. The slave
address also determines the power-up logic state for
the I/O ports, and enables or disables internal 40kΩ
pullups in groups of two ports.
The MAX7327 is one device in a family of pin-compatible
port expanders with a choice of input ports, open-drain
I/O ports, and push-pull output ports (see Table 1).
The MAX7327 is available in the 24-pin QSOP and
TQFN packages, and is specified over the -40°C to
+125°C automotive temperature range.
Applications
Features
♦ 400kHz I2C Serial Interface
♦ +1.71V to +5.5V Operating Voltage
♦ 12 Push-Pull Output Ports, Rated at 20mA Sink
Current
♦ 4 Open-Drain I/O Ports, Rated at 20mA Sink Current
♦ I/O Ports are Overvoltage Protected to +6V
♦ Selectable I/O Port Power-Up Default Logic States
♦ Transient Changes are Latched, Allowing Detection
Between Read Operations
♦ INT Output Alerts Changes on Inputs
♦ AD0 and AD2 Inputs Select from 16 Slave
Addresses
♦ Low 0.6µA (typ) Standby Current
♦ -40°C to +125°C Temperature Range
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
________________________________________________________________ Maxim Integrated Products 1
19-3805; Rev 0; 8/06
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
PKG
CODE
MAX7327AEG+
24 QSOP
E24-1
MAX7327ATG+
24 TQFN - E P **
( 4m m x 4m m )
T2444-3
MAX7327AATG+
24 TQFN - E P **
T243A3-1
Typical Application Circuit and Functional Diagram appear
at end of data sheet.
Selector Guide
PART
INTERRUPT
MASK
OPENDRAIN
PUSH-PULL
OUTPUTS
MAX7324
8 Yes — 8
MAX7325
—
8
MAX7326
4 Yes — 12
MAX7327
—
12
Cell Phones
SAN/NAS
Servers
Notebooks
Satellite Radio
Automotive
+Denotes lead-free package.
**EP = Exposed pad.
TQFN (4mm x 4mm)
TOP VIEW
MAX7327
19
20
21
22
12 345 6
18 17 16 15 14 13
23
24
12
11
10
9
8
7
SCL
V+
SDA
INT
AD2
O0+O1
P2
P3
P4
P5
AD0
O15
O13
O12
O11
RST
O10
O8
O9
GND
O6
O7
O14
EXPOSED PADDLE
Pin Configurations
Pin Configurations continued at end of data sheet.
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
( 3.5m m x 3.5m m )
INPUTS
OUTPUTS
Up to 8
Up to 4
Up to 8
Up to 4
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
Supply Voltage V+....................................................-0.3V to +6V
SCL, SDA, AD0, AD2, RST, INT, P2–P5 ..................-0.3V to +6V
O0, O1, O6–O15 .............................................-0.3V to V
+
+ 0.3V
O0, O1, O6–O15 Output Current .....................................±25mA
P2–P5 Sink Current ............................................................25mA
SDA Sink Current ...............................................................10mA
INT Sink Current .................................................................10mA
Total V+ Current .................................................................50mA
Total GND Current ...........................................................100mA
Continuous Power Dissipation (T
A
= +70°C)
24-Pin QSOP (derate 9.5mW/°C over +70°C)...........761.9mW
24-Pin TQFN (derate 20.8mW/°C over +70°C) .......1666.7mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DC ELECTRICAL CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Operating Supply Voltage V+ TA = -40°C to +125°C 1.71 5.50 V
Power-On Reset Voltage V
Standby Current
(Interface Idle)
Supply Current
(Interface Running)
Input High-Voltage
SDA, SCL, AD0, AD2, RST, P2–P5
Input Low-Voltage
SDA, SCL, AD0, AD2, RST, P2–P5
Input Leakage Current
SDA, SCL, AD0, AD2, RST, P2–P5
Input Capacitance
SDA, SCL, AD0, AD2, RST, P2–P5
Output Low Voltage
O8–O15, P0, P7
Output High Voltage
O0, O1, O6–O15, P2–P5
Output Low-Voltage SDA V
Output Low-Voltage INT V
Port Input Pullup Resistor R
I
POR
I
STB
V
V
IH
V
V
OLSDAISINK
OLINTISINK
V+ falling 1.6 V
SCL and SDA and other
digital inputs at V+
f
= 400kHz; other
I+
OL
OH
PU
SCL
digital inputs at V+
V+ < 1.8V 0.8 x V+
IH
V+ ≥ 1.8 V 0.7 x V+
V+ < 1.8V 0.2 x V+
IL
V+ ≥ 1.8 V 0.3 x V+
SDA, SCL, AD0, AD2, RST, P0–P7 at V+
, I
IL
or GND, internal pullup disabled
V+ = 1.71V, I
V+ = 1.71V, I
V+ = 2.5V, I
V+ = 2.5V, I
V+ = 3.3V, I
V+ = 3.3V, I
V+ = 5V, I
V+ = 5V, I
V+ = +1.71V, I
V+ = +2.5V, I
V+ = +3.3V, I
V+ = +5V, I
SINK
SINK
= 6mA 250 mV
= 5mA 130 250 mV
TA = -40°C to
+125°C
TA = -40°C to
+125°C
-0.2 +0.2 µA
= 5mA (QSOP) 90 180
SINK
= 5mA (TQFN) 90 230
SINK
= 10mA (QSOP) 110 210
SINK
= 10mA (TQFN) 110 260
SINK
= 15mA (QSOP) 130 230
SINK
= 15mA (TQFN) 130 280
SINK
= 20mA (QSOP) 140 250
= 20mA (TQFN) 140 300
= 2mA V+ - 250 V+ - 30
SOURCE
= 5mA V+ - 360 V+ - 70
SOURCE
= 5mA V+ - 260 V+ - 100
SOURCE
= 10mA V+ - 360 V+ - 120
SOURCE
0.6 1.9 µA
23 55 µA
10 pF
25 40 55 kΩ
V
V
mV
mV
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
_______________________________________________________________________________________ 3
PORT AND INTERRUPT INT TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 1)
TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 1)
Note 1: All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: C
b
= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x V+ and 0.7 x V+ with I
SINK
≤ 6mA.
Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Port Output Data Valid t
Port Input Setup Time t
Port Input Hold Time t
INT Input Data Valid Time t
INT Reset Delay Time from STOP t
INT Reset Delay Time from
Acknowledge
PPV
PSU
PH
t
CL ≤ 100pF 4 µs
CL ≤ 100pF 0 µs
CL ≤ 100pF 4 µs
CL ≤ 100pF 4 µs
IV
CL ≤ 100pF 4 µs
IP
CL ≤ 100pF 4 µs
IR
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Serial-Clock Frequency f
Bus Free Time Between a STOP
and a START Condition
Hold Time (Repeated) START
Condition
Repeated START Condition
Setup Time
STOP Condition Setup Time t
Data Hold Time t
Data Setup Time t
SCL Clock Low Period t
SCL Clock High Period t
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of Both SDA and SCL
Signals, Receiving
Fall Time of SDA Transmitting t
Pulse Width of Spike Suppressed t
Capacitive Load for Each Bus
Line
RST Pulse Width t
RST Rising to START Condition
Setup Time
t
HD, STA
t
SU, STA
SU, STO
HD, DAT
SU, DAT
SCL
t
BUF
LOW
HIGH
t
R
t
F
F,TX
SP
C
b
W
t
RST
1.3 µs
0.6 µs
0.6 µs
0.6 µs
(Note 2) 0.9 µs
100 ns
1.3 µs
0.7 µs
(Notes 3, 4)
(Notes 3, 4)
(Notes 3, 4)
(Note 5) 50 ns
(Note 3) 400 pF
500 ns
20 +
0.1C
20 +
0.1C
20 +
0.1C
1µs
400 kHz
300 ns
b
300 ns
b
250 ns
b
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
4 _______________________________________________________________________________________
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
STANDBY CURRENT
vs. TEMPERATURE
TEMPERATURE (°C)
STANDBY CURRENT (μA)
MAX7327 toc01
-40 -25 -10 5 20 35 50 65 80 95 110 125
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
V+ = +3.3V
V+ = +5.0V
V+ = +2.5V
V+ = +1.71V
f
SCL
= 0kHz
SUPPLY CURRENT
vs. TEMPERATURE
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
MAX7327 toc02
-40 -25 -10 5 20 35 50 65 80 95 110 125
0
10
20
30
40
50
60
V+ = +3.3V
V+ = +5.0V
V+ = +2.5V
V+ = +1.71V
f
SCL
= 400kHz
OUTPUT VOLTAGE LOW
vs. TEMPERATURE
TEMPERATURE (°C)
OUTPUT VOLTAGE LOW (V)
MAX7327 toc03
-40 -25 -10 5 20 35 50 65 80 95 110 125
0
0.05
0.10
0.15
0.20
0.25
V+ = +3.3V
I
SINK
= 15mA
V+ = +5.0V
I
SINK
= 20mA
V+ = +2.5V
I
SINK
= 10mA
V+ = +1.71V
I
SINK
= 5mA
V+ = +1.62V
I
SINK
= 4mA
OUTPUT VOLTAGE HIGH
vs. TEMPERATURE
TEMPERATURE (°C)
OUTPUT VOLTAGE HIGH (V)
MAX7327 toc04
-40 -25 -10 5 20 35 50 65 80 95 110 125
0
1
2
3
4
5
6
V+ = +3.3V
I
SOURCE
= 5mA
V+ = +5.0V
I
SOURCE
= 10mA
V+ = +2.5V I
SOURCE
= 5mA
V+ = +1.71V I
SOURCE
= 2mA
Pin Description
PIN
QSOP TQFN
122 INT Active-Low Interrupt Output. INT is an open-drain output.
223 RST Active-Low Reset Input. Drive RST low to clear the 2-wire interface.
3, 21 24, 18 AD2, AD0
4, 5, 10,
11, 13–20
6–9 3–6 P2–P5 P2–P5 Open-Drain I/Os
12 9 GND Ground
22 19 SCL I2C-Compatible Serial Clock Input
23 20 SDA I2C-Compatible Serial Data I/O
24 21 V+ Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic capacitor.
— EP EP Exposed Pad. Connect exposed pad to GND.
1, 2, 7, 8,
10–17
NAME FUNCTION
Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and AD2
to either GND, V+, SCL, or SDA to give four logic combinations (see Tables 2 and 3).
O0, O1,
O6–O15
Output Ports. O0, O1, O6–O15 are push-pull outputs rated at 20mA.
Detailed Description
MAX7319–MAX7329 Family Comparison
The MAX7324–MAX7327 family consists of four pincompatible, 16-port expanders that integrate the functions of the MAX7320 and one of either the MAX7319,
MAX7321, MAX7322, or MAX7323.
Functional Overview
The MAX7327 is a general-purpose port expander
operating from a +1.71V to +5.5V supply that provides
12 push-pull output ports with a 20mA sink, 10mA
source drive capability, and four open-drain I/O ports
with a 20mA sink capability. The four open-drain outputs are overvoltage protected to +6V.
The MAX7327 is set to two of 32 I
2
C slave addresses
(see Tables 2 and 3) using address inputs AD2 and
AD0, and is accessed over an I2C serial interface up to
400kHz. Eight push-pull outputs use a different slave
address from the other four push-pull outputs and the
open-drain I/Os. The eight push-pull outputs, O8–O15,
use the 101xxxx addresses while the four outputs O0,
O1, O6, and O7 and the open-drain I/Os P2–P5 use
addresses with 110xxxx. The RST input clears the serial
interface in case of a bus lockup, terminating any serial
transaction to or from the MAX7327.
Any of the four open-drain ports can be configured as a
logic input by setting the port output logic-high (logichigh for an open-drain output is high impedance).
When the MAX7327 is read through the serial interface,
the actual logic levels at the ports are read back.
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
_______________________________________________________________________________________ 5
Table 1. MAX7319–MAX7329 Family Comparison
2
C
I
PART
16-PORT EXPANDERS
SLAVE
ADDRESS
INPUTS
INPUT
INTERRUPT
MASK
OPENDRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
CONFIGURATION
8 inputs and 8 push-pull outputs version:
8 input ports with programmable latching transition
detection interrupt and selectable pullups.
MAX7324 8 Yes — 8
101xxxx
and
110xxxx
MAX7325
Up to 8 — Up to 8 8
8 push-pull outputs with selectable default logic
levels.
Offers maximum versatility for automatic input
monitoring. An interrupt mask selects which inputs
cause an interrupt on transitions, and transition flags
identify which inputs have changed (even if only for
a transient) since the ports were last read.
8 I/O and 8 push-pull outputs version:
8 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
8 push-pull outputs with selectable default logic
levels.
Open-drain outputs can level shift the logic-high
state to a higher or lower voltage than V+ using
external pullup resistors, but pullups draw current
when output is low. Any open-drain port can be used
as an input by setting the open-drain output to logichigh. Transition flags identify which open-drain port
inputs have changed (even if only for a transient)
since the ports were last read.
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
6 _______________________________________________________________________________________6 _______________________________________________________________________________________6 _______________________________________________________________________________________
Table 1. MAX7319–MAX7329 Family Comparison (continued)
2
PART
C
I
SLAVE
ADDRESS
INPUTS
INPUT
INTERRUPT
MASK
OPENDRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
CONFIGURATION
4 input-only, 12 push-pull output versions:
4 input ports with programmable latching transition
detection interrupt and selectable pullups.
MAX7326 4 Yes — 12
101xxxx
and
110xxxx
MAX7327
8-PORT EXPANDERS
MAX7319 110xxxx 8 Yes — —
Up to 4 — Up to 4 12
12 push-pull outputs with selectable default logic
levels.
Offers maximum versatility for automatic input
monitoring. An interrupt mask selects which inputs
cause an interrupt on transitions, and transition flags
identify which inputs have changed (even if only for
a transient) since the ports were last read.
4 I/O, 12 push-pull output versions:
4 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
12 push-pull outputs with selectable default logic
levels.
Open-drain outputs can level shift the logic-high
state to a higher or lower voltage than V+ using
external pullup resistors, but pullups draw current
when output is low. Any open-drain port can be used
as an input by setting the open-drain output to logichigh. Transition flags identify which open-drain port
inputs have changed (even if only for a transient)
since the ports were last read.
Input-only versions:
8 input ports with programmable latching transition
detection interrupt and selectable pullups.
Output-only versions:
MAX7320 101xxxx — — — 8
MAX7321 110xxxx Up to 8 — Up to 8 —
MAX7322 110xxxx 4 Yes — 4
8 push-pull outputs with selectable power-up default
levels.
I/O versions:
8 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
4 input-only, 4 output-only versions:
4 input ports with programmable latching transition
detection interrupt and selectable pullups.
4 push-pull outputs with selectable power-up default
levels.
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
_______________________________________________________________________________________ 7
The four open-drain ports offer latching transition
detection functionality when used as inputs. All input
ports are continuously monitored for changes. An input
change sets 1 of 4 flag bits that identify the changed
input(s). All flags are cleared upon a subsequent read
or write transaction to the MAX7327.
A latching interrupt output INT automatically flags data
changes on any of the I/O ports used as inputs through
an interrupt mask register. Data changes on any input
port forces INT to a logic-low. The interrupt output INT
is deasserted when the MAX7327 is next accessed
through the serial interface.
Internal pullup resistors to V+ are selected by the
address select inputs, AD0 and AD2. Pullups are enabled
on the input ports in groups of two (see Table 2). Use the
slave address selection to ensure that I/O ports used
as inputs are logic-high on power-up. I/O ports with
internal pullups enabled default to a logic-high output
state. I/O ports with internal pullups disabled default to
a logic-low output state.
Output port power-up logic levels are selected by the
address select inputs AD0 and AD2. Ports default to
logic-high or logic-low on power-up in groups of two
(see Tables 2 and 3).
Initial Power-Up
On power-up, the default states of the 12 push-pull output ports and the four open-drain I/O ports are set
according to the I2C slave address selection inputs,
AD0 and AD2 (see Tables 2 and 3). For I/O ports used
as inputs, ensure that the default states are logic-high;
therefore, the I/O ports power up in the high-impedance state. All I/O ports configured with pullups
enabled also have a logic-high default state. On power-
up, the transition detection logic is reset, and INT is
deasserted. The transition flags are cleared, indicating
no data changes.
Power-On Reset (POR)
The MAX7327 contains an integral POR circuit that
ensures all registers are reset to a known state on
power-up. When V+ rises above V
POR
(1.6V max), the
POR circuit releases the registers and 2-wire interface
for normal operation. When V+ drops to less than V
POR
,
the MAX7327 resets all register contents to the POR
defaults (Tables 2 and 3).
RST
Input
The active-low RST input operates as a hardware reset
that voids any I
2
C transaction involving the MAX7327,
forcing the MAX7327 into the I2C STOP condition. A
reset does not affect the interrupt output (INT).
Standby Mode
When the serial interface is idle, the MAX7327 automatically enters standby mode drawing minimal supply
current.
Slave Address, Power-Up Default Logic
Levels, and Input Pullup Selection
Address inputs AD0 and AD2 determine the MAX7327
slave address and select which inputs have pullup
resistors. Pullups are enabled on the input ports in
groups of two (see Table 2).
The MAX7327 slave address is determined on each I2C
transmission, regardless of whether the transmission is
actually addressing the MAX7327. The MAX7327 distinguishes whether address inputs AD0 and AD2 are connected to SDA or SCL instead of fixed-logic levels V+
or GND during the transmission. The MAX7327 slave
Table 1. MAX7319–MAX7329 Family Comparison (continued)
2
I
C
PART
MAX7323 110xxxx Up to 4 — Up to 4 4
MAX7328
MAX7329
SLAVE
ADDRESS
0100xxx
0111xxx
INPUTS
Up to 8 — Up to 8 —
INPUT
INTERRUPT
MASK
OPENDRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
4 I/O, 4 output-only versions:
4 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
4 push-pull outputs with selectable power-up default
levels.
PCF8574-, PCF8574A-compatible versions:
8 open-drain I/O ports with nonlatching transition
detection interrupt and pullups on all ports.
CONFIGURATION
MAX7327
address can be configured dynamically in the application without cycling the device supply.
On initial power-up, the MAX7327 cannot decode the
address inputs AD0 and AD2 fully until the first I
2
C
transmission. AD0 and AD2 initially appear to be connected to V+ or GND. This is important because the
address selection is used to determine the power-up
default states of the output ports, I/O port initial logic
state, and whether pullups are enabled. At power-up,
the I
2
C SDA and SCL bus interface lines are high
impedance at the I/O pins of every device (master or
slave) connected to the bus, including the MAX7327.
This is guaranteed as part of the I2C specification.
Therefore, when address inputs AD0 and AD2 are connected to SDA or SCL during power-up, they appear to
be connected to V+. The pullup selection logic uses
AD0 to select whether pullups are enabled for ports P2
and P3, and uses AD2 to select whether pullups are
enabled for ports P4 and P5. The rule is that a logichigh, SDA, or SCL connection selects the pullups and
sets the logic state to high. A logic-low deselects the
pullups and sets the default logic state to low. The
pullup configuration is correct on power-up for a standard I2C configuration, where SDA or SCL are pulled
up to V+ by the external I2C pullup resistors.
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true; for example,
in applications in which there is legitimate bus activity
during power-up. If SDA and SCL are terminated with
pullup resistors to a different supply voltage to the
MAX7327’s supply voltage, and if that pullup supply
rises later than the MAX7327’s supply, then SDA or
SCL may appear at power-up to be connected to GND.
In such applications, use the four address combinations that are selected by connecting address inputs
AD0 and AD2 to V+ or GND (shown in bold in Tables 2
and 3). These selections are guaranteed to be correct
at power-up, independent of SDA and SCL behavior. If
one of the other 12 address combinations is used, an
unexpected combination of pullups might be asserted
until the first I2C transmission (to any device, not necessarily the MAX7327) is put on the bus.
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
8 _______________________________________________________________________________________
Table 2. MAX7327 Address Map for Outputs O0, O1, O6, O7, and Ports P2–P5
PIN
CONNECTION
AD2 AD0 A6 A5 A4 A3 A2 A1 A0 O7 O6 P5 P4 P3 P2 O1 O0 O7 O6 P5 P4 P3 P2 O1 O0
SCL GND110000011110000 YY——
SCL V+ 110000111111111 YYYY
SCL SCL 110001011111111 YYYY
SCL SDA 110001111111111 YYYY
SDAGND110010011110000 YY——
SDA V+ 110010111111111 YYYY
SDA SCL 110011011111111 YYYY
SDA SDA 110011111111111 YYYY
GNDGND110100000000000 ————
GND V+ 110100100001111 ——YY
GND SCL 110101000001111 ——YY
GNDSDA 110101100001111 ——YY
V+ GND110110011110000 YY——
V+ V+ 110110111111111 YYYY
V+ SCL 110111011111111 YYYY
V+ SDA110111111111111
DEVICE ADDRESS PORTS POWER-UP DEFAULT 40kΩ INPUT PULLUPS ENABLED
Pullups are not enabled for push-pull outputs
YYYY
Pullups are not enabled for push-pull outputs
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
_______________________________________________________________________________________ 9
Table 3. MAX7327 Address Map for Outputs O8–O15
I/O Port Inputs
I/O port inputs switch at CMOS logic levels as determined by the expander’s supply voltage, and are overvoltage tolerant to +6V, independent of the expander’s
supply voltage.
I/O Port Input Transition Detection
All I/O ports configured as inputs are monitored for
changes since the expander was last accessed
through the serial interface. The state of the ports is
stored in an internal “snapshot” register for transition
monitoring. The snapshot is continuously compared
with the actual input conditions, and if a change is
detected for any port input, INT is asserted to signal a
state change. The input ports are sampled (internally
latched into the snapshot register) and the old transition flags cleared during the I2C acknowledge of every
MAX7327 read and write access. The previous port
transition flags are read through the serial interface as
the second byte of a 2-byte read sequence.
A long read sequence (more than 2 bytes) can be used
to poll the expander continuously without the overhead
of resending the slave address. If more than 2 bytes
are read from the expander, the expander repeatedly
returns the 2 bytes of input port data followed by the
transition flags. The inputs are repeatedly resampled
and the transition flags repeatedly reset for each pair of
bytes read. All changes that occur during a long read
sequence are detected and reported.
The INT output is not reasserted during a read
sequence to avoid recursive reentry into an interrupt
service routine. Instead, if a data change occurs that
would normally cause the INT output to be set, the INT
assertion is delayed until the STOP condition. INT is not
reasserted upon a STOP condition if the changed input
data is read before the STOP occurs. The INT logic
ensures that unnecessary interrupts are not asserted,
yet data changes are detected and reported no matter
when the change occurs.
PIN
C O NN EC TIO N
AD2 AD0 A6 A5 A4 A3 A2 A1 A0 O15 O14 O13 O12 O11 O10 O9 O8
SCLGND101000011110000
SCLV+101000111111111
SCLSCL101001011111111
SCLSDA101001111111111
SDAGND101010011110000
SDAV+101010111111111
SDASCL101011011111111
SDASDA101011111111111
GNDGND101100000000000
GNDV+101100100001111
GNDSCL101101000001111
GNDSDA101101100001111
V+GND101110011110000
V+ V+ 1 0 1110 1 11111111
V+SCL101111011111111
V+SDA101111111111111
DEVICE ADDRESS OUTPUTS POWER-UP DEFAULT
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
10 ______________________________________________________________________________________
Serial Interface
Serial Addressing
The MAX7327 operates as a slave that sends and
receives data through an I2C interface. The interface uses
a serial-data line (SDA) and a serial-clock line (SCL) to
achieve bidirectional communication between master(s)
and slave(s). The master initiates all data transfers to and
from the MAX7327 and generates the SCL clock that synchronizes the data transfer (Figure 1).
SDA operates as both an input and an open-drain output. A pullup resistor, typically 4.7kΩ, is required on
SDA. SCL operates only as an input. A pullup resistor,
typically 4.7kΩ, is required on SCL if there are multiple
masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output.
Each transmission consists of a START condition sent
by a master, followed by the MAX7327’s 7-bit slave
addresses plus R/W bits, one or more data bytes, and
finally a STOP condition (Figure 2).
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, the master
issues a STOP (P) condition by transitioning SDA from
low to high while SCL is high. The bus is then free for
another transmission (Figure 2).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 3).
Figure 3. Bit Transfer
Figure 1. 2-Wire Serial Interface Timing Details
Figure 2. START and STOP Conditions
SDA
t
LOW
SU,DAT
t
HD,DAT
t
t
t
SU,STA
t
HD,STA
t
SU,STO
BUF
SCL
t
HD,STA
START CONDITION
SDA
SCL
SP
START
CONDITION
t
HIGH
t
t
R
F
STOP
CONDITION
REPEATED START CONDITION
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
STOP
CONDITION
START
CONDITION
Acknowledge
The acknowledge bit is a clocked 9th bit the recipient uses
to acknowledge receipt of each byte of data (Figure 4).
Each byte transferred effectively requires 9 bits. The
master generates the 9th clock pulse, and the recipient
pulls down SDA during the acknowledge clock pulse,
such that the SDA line is stable low during the high
period of the clock pulse. When the master is transmitting to the MAX7327, the MAX7327 generates the
acknowledge bit because the device is the recipient.
When the MAX7327 is transmitting to the master, the
master generates the acknowledge bit because the
master is the recipient.
Slave Address
The MAX7327 has two different 7-bit slave addresses
(Figure 5). The addresses are different to communicate
to the eight push-pull outputs, O8-O15, or the other
eight I/Os. The eighth bit following the 7-bit slave
address is the R/W bit. It is low for a write command,
and high for a read command.
The first (A6), second (A5), and third (A4) bits of the
MAX7327 slave address are always 1, 1, and 0 (O0,
O1, P2–P5, O6, O7) or 1, 0, and 1 (O8–O15). Connect
AD0 and AD2 to GND, V+
,
SDA, or SCL to select slave
address bits A3, A2, A1, and A0. The MAX7327 has 16
possible slave addresses (Tables 2 and 3), allowing up
to 16 MAX7327 devices on an I2C bus.
Accessing the MAX7327
The MAX7327 is a combination of MAX7320 and
MAX7323. The group A of eight ports (O0, O1, P2–P5,
O6, and O7) corresponding to those of the MAX7323 and
the group B of eight ports (O8–O15) corresponding to
those of the MAX7320 are read/write separately through
their own addresses as shown by Tables 2 and 3,
respectively.
A single-byte read from the group A ports of the
MAX7327 returns the status of the four I/O ports and
the four output ports (read back as inputs), and clear
both the internal transition flags and the INT output
when the master acknowledges the slave address byte.
A 2-byte read from the group A ports of the MAX7327
returns the status of the four I/O ports and the four output ports (as for a single byte read), followed by the
four transition flags for the four I/O ports. The internal
transition flags and the INT output are cleared automatically when the master acknowledges the slave
address byte (but the previous transition flag data is
sent as the second byte).
A multibyte read (more than 2 bytes before the I
2
C
STOP bit) from the group A ports of the MAX7327
repeatedly returns the port data, alternating with the
transition flags. As the port data is resampled for each
transmission, and the transition flags are reset each
time, a multibyte read continuously returns the current
data and identifies any changing I/O ports.
If a port input data change occurs during the read
sequence, then INT is reasserted during the I
2
C STOP
bit. The MAX7327 does not generate another interrupt
during a single-byte or multibyte MAX7327 read routine.
Input port data is sampled during the preceding I2C
acknowledge bit (the acknowledge bit for the I2C slave
address in the case of a single-byte or 2-byte read).
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
______________________________________________________________________________________ 11
Figure 4. Acknowledge
Figure 5. Slave Address
CLOCK PULSE
FOR ACKNOWLEDGEMENT
SCL
SDA BY
TRANSMITTER
SDA BY
RECEIVER
START
CONDITION
S
12 89
SDA
MSB
SCL
A5
LSB
ACKA4 A11A3A0A2 R/W
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
12 ______________________________________________________________________________________
Figure 6. Reading Group A Ports of the MAX7327 (1 Data Byte)
A single-byte read from the group B ports of the
MAX7327 returns the status of the eight output ports,
read back as inputs.
A 2-byte read from the group B ports of the MAX7327
repeatedly returns the status of the eight output ports,
read back as inputs.
A multibyte read (more than 2 bytes before the I
2
C
STOP bit) from the group B ports of the MAX7327
repeatedly returns the status of the eight output ports,
read back as inputs.
A single-byte write to the group A or B ports of the
MAX7327 sets the logic state of all eight ports.
A multibyte write to the group A or B ports of the
MAX7327 repeatedly sets the logic state of all eight ports.
Reading the MAX7327
A read from the group A ports of the MAX7327 starts
with the master transmitting the port group’s slave
address with the R/W bit set to high. The MAX7327
acknowledges the slave address, and samples the status of the ports during the acknowledge bit. INT goes
high during the slave address acknowledge. The master can then issue a STOP condition after the acknowledge. The snapshot is taken, and the INT status
remains unchanged, if the master terminates the serial
transition with a no-acknowledge.
When the master reads one byte from the group A
ports of the MAX7327 and subsequently issues a STOP
condition (Figure 6), the MAX7327 transmits the current
port data, clears the change flags, and resets the tran-
ACKNOWLEDGE FROM MAX7327
SA
SCL
MAX7327 SLAVE ADDRESS
R/W
NO ACKNOWLEDGE
O0O1P2P3P4P5O6O7
FROM MASTER
1
PORT SNAPSHOT
PORT SNAPSHOT
D0D1D2D3D4D5D6D7
P
N
t
PH
PORTS
t
t
IV
INT OUTPUT
t
IR
INT REMAINS HIGH UNTIL STOP CONDITION
PS
t
IP
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
______________________________________________________________________________________ 13
Figure 7. Reading Group A Ports of the MAX7327 (2 Data Bytes)
sition detection. INT deasserts during the slave
acknowledge. The new snapshot data is the current
port data transmitted to the master, and therefore, port
changes occuring during the transmission are detected. INT remains high until the STOP condition.
When the master reads 2 bytes from the group A ports
of the MAX7327 and subsequently issues a STOP condition (Figure 7), the MAX7327 transmits the current
port data, followed by the change flags. The change
flags are then cleared, and transition detection is reset.
INT goes high (high impedance if an external pullup
resistor is not fitted) during the slave acknowledge. The
new snapshot data is the current port data transmitted
to the master, and therefore, port changes occuring
during the transmission are detected. INT remains high
until the STOP condition.
A read from the group B ports of the MAX7327 starts
with the master transmitting the group’s slave address
with the R/W bit set high. The MAX7327 acknowledges
the slave address, and samples the logic state of the
output ports during the acknowledge bit. The master
can read one or more bytes from the group B ports of the
MAX7327 and then issues a STOP condition (Figure 8).
The MAX7327 transmits the current port data, read back
from the actual port outputs (not the port output latches)
during the acknowledge. If a port is forced to a logic
state other than its programmed state, the readback
reflects this. If driving a capacitive load, the readback
port level verification algorithms may need to take the RC
rise/fall time into account.
Typically, the master reads one byte from the group B
ports of the MAX7327, then issues a STOP condition
(Figure 8). However, the master can read two or more
Figure 8. Reading Group B Ports of MAX7327
O7 O6 P4P5 P3 P2 O1 O0
ACKNOWLEDGE FROM MAX7327
MAX7327 SLAVE ADDRESSSA P1
t
IV
SCL
PORTS
INT OUTPUT
R/W
PORT SNAPSHOT
t
PH
t
IR
INT REMAINS HIGH UNTIL STOP CONDITION
FLAG
NO ACKNOWLEDGE
F0
FROM MASTER
t
IP
PORT SNAPSHOT
F6
F7
A
D0D1D2D3D4D5D6D7
D7 D6 D5 D4 D3 D2 D1 D0 N
t
PS
F1
F2F3F4F5
PORT SNAPSHOT
PORT SNAPSHOT DATA
ACKNOWLEDGE FROM MAX7327
SA
SCL
MAX7327 SLAVE ADDRESS
1
R/W
PORT SNAPSHOT TAKEN
P4P5P6P7
DATA 1
PORT SNAPSHOT TAKEN
P0P1P2P3
P
A
D0D1D2D3D4D5D6D7
ACKNOWLEDGE
FROM MASTER
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
14 ______________________________________________________________________________________
bytes from the group B ports of the MAX7327, then
issues a STOP condition. In this case, the MAX7327
resamples the port outputs during each acknowledge
and transmits the new data each time.
Writing to the MAX7327
A write to the group A or B ports of the MAX7327 starts
with the master transmitting the group’s slave address
with the R/W bit set low. The MAX7327 acknowledges
the slave address, and samples the ports during the
acknowledge bit. INT goes high (high impedance if an
external pullup resistor is not fitted) during the slave
acknowledge only when it writes to the group A ports.
The master can now transmit one or more bytes of
data. The MAX7327 acknowledges these subsequent
bytes of data and updates the corresponding group’s
ports with each new byte until the master issues a
STOP condition (Figure 9).
Applications Information
Port Input and I2C Interface Level
Translation from Higher
or Lower Logic Voltages
The MAX7327’s SDA, SCL, AD0, AD2, RST, INT, and
the four I/O ports P2–P5 are overvoltage protected to
+6V, independent of V+. This allows the MAX7327 to
operate from a lower supply voltage, such as +3.3V,
while the I2C interface and/or some of the four I/O ports
are driven from a higher logic level, such as +5V.
The MAX7327 can operate from a higher supply voltage, such as +3V, while the I
2
C interface and/or some
of the four I/O ports P2–P5 are driven from a lower logic
level, such as +2.5V. For V+ < 1.8V, apply a minimum
voltage of 0.8 x V+ to assert a logic-high on any input.
For a V+ ≥ 1.8V, apply a voltage of 0.7 x V+ to assert a
logic-high. For example, a MAX7327 operating from a
+5V supply may not recognize a +3.3V nominal logichigh. One solution for input-level translation is to drive
MAX7327 inputs from open-drain outputs. Use a pullup
resistor to V+ or a higher supply to ensure a high logic
voltage greater than 0.7 x V+.
Port Output Signal Level Translation
The open-drain output architecture allows for level
translation to higher or lower voltages than the
MAX7327’s supply. Use an external pullup resistor on
any output to convert the high-impedance logic-high
condition to a positive voltage level. The resistor can be
connected to any voltage up to +6V, and the resistor
value chosen to ensure no more than 20mA to be sunk
in logic-low condition. For interfacing CMOS inputs, a
pullup resistor value of 220kΩ is a good starting point.
Use a lower resistance to improve noise immunity, in
applications where power consumption is less critical,
or where a faster rise time is needed for a given capacitive load.
Each of the 12 push-pull output ports has protection
diodes to V+ and GND. When a port output is driven to
a voltage higher than V+ or lower than GND, the appropriate protection diode clamps the output to a diode
drop above V+ or below GND. When the MAX7327 is
powered down (V+ = 0V), every output port’s protection
Figure 9. Writing the MAX7327
SCL
SDA
WRITE
TO PORT
DATA OUT
FROM PORT
12345678
SLAVE ADDRESS
S0
START CONDITION R/W ACKNOWLEDGE
AAA
FROM SLAVE
DATA TO PORT DATA TO PORT
DATA 1 DATA 2
t
PV
ACKNOWLEDGE
FROM SLAVE
t
PV
ACKNOWLEDGE
FROM SLAVE
DATA 2 VALIDDATA 1 VALID
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
______________________________________________________________________________________ 15
Figure 11. MAX7327 Open-Drain I/O Port Structure
Figure 10. MAX7327 Push-Pull Output Port Structure
diodes to V+ and GND continue to appear as a diode
clamp from each output to GND (Figure 10).
Each of the four I/O ports P2–P5 has a protection diode
to GND (Figure 11). When a port output is driven to a
voltage lower than GND, the protection diode clamps
the output to a diode drop below GND.
Each of the four I/O ports P2–P5 also has a 40kΩ (typ)
pullup resistor that can be enabled or disabled. When a
port input is driven to a voltage higher than V+, the
body diode of the pullup enable switch conducts and
the 40kΩ pullup resistor is enabled. When the
MAX7327 is powered down (V+ = 0V), each I/O port
appears as a 40kΩ resistor in series with a diode connected to 0V. Input ports are protected to +6V under
any of these circumstances (Figure 11).
Driving LED Loads
When driving LEDs from one of the 12 push-pull outputs, a resistor must be fitted in series with the LED to
limit the LED current to no more than 20mA. Connect
the LED cathode to the MAX7327 port, and the LED
anode to V+ through the series current-limiting resistor,
R
LED
. Set the port output low to light the LED. Choose
the resistor value according to the following formula:
R
LED
= (V
SUPPLY
- V
LED
- VOL) / I
LED
where:
R
LED
is the resistance of the resistor in series with the
LED (Ω).
V
SUPPLY
is the supply voltage used to drive the LED (V).
V
LED
is the forward voltage of the LED (V).
V
OL
is the output low voltage of the MAX7327 when
sinking I
LED
(V).
I
LED
is the desired operating current of the LED (A).
For example, to operate a 2.2V red LED at 10mA from a
+5V supply:
R
LED
= (5 - 2.2 - 0.1) / 0.01 = 270Ω
Driving Load Currents Higher than 20mA
The MAX7327 can be used to drive loads such as
relays that draw more than 20mA by paralleling outputs. Use at least one output per 20mA of load current;
for example, a 5V 330mW relay draws 66mA, and
therefore, requires four paralleled outputs. Any combination of outputs can be used as part of a load-sharing
design because any combination of ports can be set or
cleared at the same time by writing to the MAX7327. Do
not exceed a total sink current of 100mA for the device.
The MAX7327 must be protected from the negative
voltage transient generated when switching off inductive loads (such as relays), by connecting a reversebiased diode across the inductive load. Choose the
peak current for the diode to be greater than the inductive load’s operating current.
Power-Supply Considerations
The MAX7327 operates with a supply voltage of +1.71V
to +5.5V. Bypass the supply to GND with a ceramic
capacitor of at least 0.047µF as close as possible to the
device. For the TQFN version, additionally connect the
exposed pad to GND.
V+V+
MAX7327
O0–O2
O6–O15
OUTPUT
V+
V+
PULLUP
ENABLE
INPUT
OUTPUT
MAX7327
40kΩ
P2–P5
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
16 ______________________________________________________________________________________
Pin Configurations (continued)
MAX7327
P2
O7
O6
P5
P4
O11
O10
O9
O8
O15
O14
013
012
V+
GND
3.3V
μC
SCL SCL
SDA
AD0
O2
O1
SDA
P3
AD2
INT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
RST
INT
RST
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
INPUT/OUTPUT
Typical Application Circuit
Functional Diagram
Chip Information
PROCESS: BiCMOS
AD0
AD2
SCL
SDA
RST
INPUT
FILTER
POWER-ON
RESET
O15
O14
O13
O12
O11
O10
I2C
CONTROL
MAX7327
I/O
PORTS
O9
O8
O7
O6
P5
P4
P3
P2
O1
O0
INT
TOP VIEW
+
INT
1
RST
2
AD2
3
O0
O1
P2
P3
GND
P4
P5
O6
O7
MAX7327
4
5
6
7
8
9
10
11
12
QSOP
24
23
22
21
20
19
18
17
16
15
14
13
V+
SDA
SCL
AD0
O15
O14
O13
O12
O11
O10
O9
O8
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
______________________________________________________________________________________ 17
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
24L QFN THIN.EPS
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
1
E
2
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
18 ______________________________________________________________________________________
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
2
E
2
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
______________________________________________________________________________________ 19
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
QSOP.EPS
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
1
21-0055
F
1
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
20 ______________________________________________________________________________________
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
24L THIN QFN.EPS
MAX7327
I2C Port Expander with 12 Push-Pull
Outputs and 4 Open-Drain I/Os
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21
© 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
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