Page 1
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General Description
The MAX7323 2-wire serial-interfaced peripheral features eight I/O ports. Four ports are push-pull outputs
and the other four are open-drain I/O ports, independent of supply voltage.
The four I/O ports configured as inputs are continuously monitored for state changes (transition detection). State changes are indicated by the open-drain
INT output. The interrupt is latched, allowing detection
of transient changes. When the MAX7323 is subsequently accessed through the serial interface, any
pending interrupt is cleared.
The four push-pull and four open-drain outputs are
rated to sink 20mA and are capable of driving LEDs.
The RST input clears the serial interface, terminating
any I2C communication to or from the MAX7323.
The MAX7323 uses two address inputs with four-level
logic to allow 16 I2C slave addresses. The slave
address also determines the power-up logic state for
the I/O ports, and enables or disables internal 40kΩ
pullups for the input ports in groups of two ports.
The MAX7323 is one device in a family of pin-compatible
port expanders with a choice of input ports, open-drain
I/O ports, and push-pull output ports (see Table 1).
The MAX7323 is available in 16-pin QSOP and 16-pin
TQFN packages, and is specified over the automotive
temperature range (-40°C to +125°C).
Features
♦ 400kHz I2C Serial Interface
♦ +1.71V to +5.5V Operating Voltage
♦ 4 Push-Pull Output Ports Rated at 20mA Sink
Current
♦ 4 Open-Drain I/O Ports Rated to 20mA Sink Current
♦ 4 I/O Ports Are Overvoltage Protected to +6V
♦ Transient Changes Are Latched, Allowing Detection
Between Read Operations
♦ INT Output Alerts Change on Inputs
♦ AD0 and AD2 Inputs Select from 16 Slave
Addresses
♦ Low 0.6µA (typ) Standby Current
♦ -40°C to +125°C Operating Temperature Range
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
________________________________________________________________ Maxim Integrated Products 1
19-3806; Rev 1; 7/07
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
PART
TEMP
PINPACKAGE
TOP
PKG
CODE
MAX7323AEE+
-40°C to
16 QSOP —
E16-4
MAX7323ATE+
-40°C to
3mm x 3mm
T1633-4
Pin Configurations and Functional Diagram appear at end
of data sheet.
Selector Guide
PART
INPUTS
INTERRUPT
MASK
OPENDRAIN
PUSH-PULL
OUTPUTS
MAX7319
8 Yes — —
MAX7320
—— — 8
MAX7321
—
—
MAX7322
4 Yes — 4
MAX7323
—
4
MAX7328
—
—
MAX7329
—
—
+Denotes a lead-free package.
*EP = Exposed paddle.
Cell Phones
SAN/NAS
Servers
Notebooks
RAID
Automotive
Applications
MAX7323
P2
O7
O6
P5
P4
V+
0.047μF
μC
SCL
SDA
SCL
AD0
O1
O0
SDA
P3
AD2
INT
OUTPUT
OUTPUT
RST
INT
RST
I/O
I/O
I/O
I/O
OUTPUT
OUTPUT
3.3V
GND
Typical Application Circuit
RANGE
+125°C
16 TQFN-EP*
+125°C
MARK
ADE
OUTPUTS
Up to 8
Up to 4
Up to 8
Up to 8
Up to 8
Up to 4
Up to 8
Up to 8
Page 2
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
Supply Voltage V+....................................................-0.3V to +6V
SCL, SDA, AD0, AD2, RST, INT, P2–P5 ...................-0.3V to +6V
O0, O1, O6, O7...............................................-0.3 to (V+ + 0.3V)
O0, O1, O6, O7 Output Current........................................±25mA
P2–P5 Sink Current...........................................................±25mA
SDA Sink Current ............................................................... 10mA
INT Sink Current..................................................................10mA
Total V+ Current..................................................................50mA
Total GND Current ...........................................................100mA
Continuous Power Dissipation (T
A
= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)...........667mW
16-Pin TQFN (derate 15.6mW/°C above +70°C) .......1250mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
Operating Supply Voltage V+
V
Power-On Reset Voltage V
POR
V+ falling 1.6 V
Standby Current
(Interface Idle)
I
STB
1.5 µA
Supply Current
(Interface Running)
I+ f
SCL
= 400kHz; other digital inputs at V+
55 µA
V+ ≤ 1.8V
Input High Voltage
SDA, SCL, AD0, AD2, RST, P2–P5
V
IH
V+ ≥ 1.8
V
V+ ≤ 1.8V
Input Low Voltage
SDA, SCL, AD0, AD2, RST, P2–P5
V
IL
V+ ≥ 1.8V
V
Input Leakage Current
SDA, SCL, AD0, AD2, RST, P2–P5
IIH, I
IL
SDA, SCL, AD0, AD2, RST, P2–P5 at V+ or
GND, internal pullup disabled
-0.2
µA
Input Capacitance
SDA, SCL, AD0, AD2, RST, P2–P5
pF
V+ = +1.71V, I
SINK
= 5mA
180
V+ = +2.5V, I
SINK
= 10mA
240
V+ = +3.3V, I
SINK
= 15mA
290
Output Low Voltage
O0, O1, O6, O7, P2–P5
V
OL
V+ = +5V, I
SINK
= 20mA
310
mV
V+ = +1.71V, I
SOURCE
= 2mA
V+ = +2.5V, I
SOURCE
= 5mA
V+ = +3.3V, I
SOURCE
= 5mA
Output High Voltage
O0, O1, O6, O7
V
OH
V+ = +5V, I
SOURCE
= 10mA
mV
Output Low Voltage
SDA
I
SINK
= 6mA 250 mV
Output Low Voltage
INT
I
SINK
= 5mA
250 mV
Port Input Pullup Resistor R
PU
25
55 kΩ
SYMBOL
SCL and SDA and other digital inputs at V+ 0.6
MIN TYP MAX
1.71 5.50
23
0.8 x V+
0.7 x V+
V
OLSDA
V
OLINT
V+ - 250 V + - 30
V+ - 360 V + - 70
V+ - 260 V + - 100
V+ - 350 V + - 120
10
105
131
154
160
130
40
0.2 x V+
0.3 x V+
+0.2
Page 3
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
_______________________________________________________________________________________ 3
PORT AND INTERRUPT INT TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 1)
PARAMETER
CONDITIONS
UNITS
Port Output Data Valid t
PPV
CL ≤ 100pF 4 µs
Port Input Setup Time t
PSU
CL ≤ 100pF 0 µs
Port Input Hold Time t
PH
CL ≤ 100pF 4 µs
INT Input Data Valid Time t
IV
CL ≤ 100pF 4 µs
INT Reset Delay Time from STOP
t
IP
CL ≤ 100pF 4 µs
INT Reset Delay Time from
Acknowledge
t
IR
CL ≤ 100pF 4 µs
TIMING CHARACTERISTICS
(V+ = +1.71V to +5.5V, TA= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA= +25°C.) (Note 1)
PARAMETER
CONDITIONS MIN
UNITS
Serial-Clock Frequency f
SCL
400 kHz
Bus Free Time Between a STOP
and a START Condition
t
BUF
1.3 µs
Hold Time (Repeated) START
Condition
0.6 µs
Repeated START Condition
Setup Time
0.6 µs
STOP Condition Setup Time
0.6 µs
Data Hold Time
(Note 2) 0.9 µs
Data Setup Time
100 ns
SCL Clock Low Period t
LOW
1.3 µs
SCL Clock High Period t
HIGH
0.7 µs
Rise Time of Both SDA and SCL
Signals, Receiving
t
R
(Notes 3, 4)
20 +
300 ns
Fall Time of Both SDA and SCL
Signals, Receiving
t
F
(Notes 3, 4)
20 +
300 ns
Fall Time of SDA, Transmitting t
F,TX
(Notes 3, 4)
20 +
250 ns
Pulse Width of Spike Suppressed
t
SP
(Note 5)
ns
Capacitive Load for Each Bus
Line
C
b
(Note 3) 400 pF
RST Pulse Width t
W
500 ns
RST Rising to START Condition
Setup Time
t
RST
1µs
Note 1: All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: C
b
= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x V+ and 0.7 x V+ with I
SINK
≤ 6mA.
Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
SYMBOL
SYMBOL
t
HD, STA
MIN TYP MAX
TYP MAX
t
SU, STA
t
SU, STO
t
HD, DAT
t
SU, DAT
0.1C
0.1C
0.1C
50
b
b
b
Page 4
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
4 _______________________________________________________________________________________
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
0
0.4
0.2
1.0
0.8
0.6
1.2
1.4
1.8
1.6
2.0
-40 -10 5-25 203550658095110125
STANDBY CURRENT vs. TEMPERATURE
MAX7323 toc01
TEMPERATURE (°C)
STANDBY CURRENT (μA)
V+ = +3.3V
V+ = +2.5V
V+ = +5.0V
V+ = +1.71V
f
SCL
= 0kHz
0
20
10
40
30
50
60
-40 -10 5 20-25 35 50 65 80 95 110 125
SUPPLY CURRENT vs. TEMPERATURE
MAX7323 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
V+ = +3.3V
V+ = +5.0V
V+ = +1.71V
V+ = +2.5V
f
SCL
= 400kHz
OUTPUT VOLTAGE LOW
vs. TEMPERATURE
TEMPERATURE (°C)
OUTPUT VOLTAGE LOW (V)
MAX7323 toc03
-40 -25 -10 5 20 35 50 65 80 95 110 125
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
V+ = +5.0V
I
SINK
= 20mA
V+ = +2.5V
I
SINK
= 10mA
V+ = +1.71V
I
SINK
= 5mA
V+ = +3.3V
I
SINK
= 15mA
OUTPUT VOLTAGE HIGH
vs. TEMPERATURE
TEMPERATURE (°C)
OUTPUT VOLTAGE HIGH (V)
MAX7323 toc04
-40 -25 -10 5 20 35 50 65 80 95 110 125
0
1
2
3
4
5
6
V+ = +3.3V
I
SOURCE
= 15mA
V+ = +5.0V
I
SOURCE
= 20mA
V+ = +2.5V
I
SOURCE
= 5mA
V+ = +1.71V
I
SOURCE
= 2mA
Pin Description
PIN
QSOP TQFN
FUNCTION
1, 3 15, 1
AD0,
AD2
Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and
AD2 to either GND, V+, SCL, or SDA to give four logic combinations (see Table 3).
216RST Reset Input, Active Low. Drive RST low to clear the 2-wire interface.
4, 5, 11, 12 2, 3, 9, 10
O0, O1,
Output Ports. O0, O1, O6, and O7 are push-pull outputs.
6, 7, 9, 10 4, 5, 7, 8
I/O Ports. P2 to P5 are open-drain I/Os rated to +6V, 20mA.
86
Ground
13 11 INT Interrupt Output. INT is an open-drain output.
14 12 SCL I2C-Compatible Serial Clock Input
15 13
I2C-Compatible Serial Data I/O
16 14 V+
Positive Supply Voltage. Bypass V+ to GND with a ceramic capacitor of at least
0.047µF as close to the device as possible.
— EP EP Exposed Pad. Connect exposed pad to GND.
NAME
O6, O7
P2–P5
GND
SDA
Page 5
Detailed Description
MAX7319–MAX7329 Family Comparison
The MAX7319–MAX7323 family consists of five pincompatible, eight-port expanders. Each version is optimized for different applications. The MAX7328 and
MAX7329 are industry-standard parts.
The MAX7324–MAX7327 family consists of four pincompatible, 16-port expanders that integrate the functions of the MAX7320 and one of either the MAX7319,
MAX7321, MAX7322, or MAX7323.
Functional Overview
The MAX7323 is a general-purpose port expander, operating from a +1.71V to +5.5V supply, that provides four
push-pull output ports with 20mA sink, 10mA source drive
capability, and four open-drain I/O ports with a 20mA sink
capability. The four open-drain outputs are overvoltage
protected to +6V independent of supply voltage.
The MAX7323 is set to one of 16 I2C slave addresses
(0x60 to 0x6F) using the address select inputs AD0 and
AD2, and is accessed over an I2C serial interface up to
400kHz. The RST input clears the serial interface in
case of a bus lockup, terminating any serial transaction
to or from the MAX7323.
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
_______________________________________________________________________________________ 5
PART
I2C
SLAVE
INPUTS
INPUT
INTERRUPT
MASK
OPENDRAIN
PUSH-
PULL
APPLICATION
8-PORT EXPANDERS
8 Yes — —
Input-only versions:
8 input ports with programmable latching transition
detection interrupt and selectable pullups.
Offers maximum versatility for automatic input
monitoring. An interrupt mask selects which inputs
cause an interrupt on transitions, and transition flags
identify which inputs have changed (even
momentarily) since the ports were last read.
—— — 8
Output-only versions:
8 push-pull outputs with selectable power-up default
levels.
Push-pull outputs offer faster rise time than opendrain outputs, and require no pullup resistors.
— Up to 8 —
I/O versions:
8 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
Open-drain outputs can level shift the logic-high
state to a higher or lower voltage than V+ using
external pullup resistors. Any port can be used as an
input by setting the open-drain output to logic-high.
Transition flags identify which inputs have changed
(even momentarily) since the ports were last read.
4 Yes — 4
4 input-only, 4 output-only versions:
4 input ports with programmable latching transition
detection interrupt and selectable pullups;
4 push-pull outputs with selectable power-up default
levels.
Table 1. MAX7319–MAX7329 Family Comparison
MAX7319 110xxxx
MAX7320 101xxxx
MAX7321 110xxxx Up to 8
MAX7322 110xxxx
ADDRESS
OUTPUTS
OUTPUTS
Page 6
MAX7323
Any of the four open-drain ports can be configured as a
logic input by setting the port output logic-high (logichigh for an open-drain output is high impedance).
When the MAX7323 is read through the serial interface,
the actual logic levels at the ports are read back.
The four ports offer latching transition detection functionality. All input ports are continuously monitored for
changes. An input change sets 1 of 4 flag bits that
identify changed input(s). All flags are cleared upon a
subsequent read or write transaction to the MAX7323.
A latching interrupt output, INT, automatically flags data
changes on any of the I/O ports used as inputs. The
interrupt output INT, and all transition flags are
deasserted when the MAX7323 is next accessed
through the serial interface.
Internal pullup resistors to V+ are selected by the
address select inputs, AD0 and AD2. Pullups are
enabled on the input ports in groups of two (see Table 3).
Use the slave address selection to ensure that I/O ports
used as inputs are logic-high on power-up. I/O ports with
internal pullups enabled default to a logic-high output
state. I/O ports with internal pullups disabled default to
a logic-low output state. Output port power-up logic
states are selected by the address select inputs AD0
and AD2. Ports default to logic-high or logic-low on
power-up in groups of two (see Table 3).
Initial Power-Up
On power-up, the transition detection logic is reset, and
INT is deasserted. The interrupt mask register is set to
0x3C, enabling the interrupt output for transitions on all
four input ports. The transition flags are cleared to indicate no data changes. The power-up default state of the
four push-pull outputs is set according to the I2C slave
address selection inputs, AD0 and AD2 (see Table 3).
Power-On Reset
The MAX7323 contains an integral power-on-reset
(POR) circuit that ensures all registers are reset to a
known state on power-up. When V+ rises above V
POR
(1.6V max), the POR circuit releases the registers and
2-wire interface for normal operation. When V+ drops to
less than V
POR
, the MAX7323 resets all ports to the
POR defaults (see Table 3).
RST
Input
The active-low RST input operates as a reset that voids
any current I2C transaction involving the MAX7323,
forcing the MAX7323 into the I2C STOP condition. The
reset action does not clear the interrupt output (INT).
Standby Mode
When the serial interface is idle, the MAX7323 automatically enters standby mode, drawing minimal supply
current.
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
6 _______________________________________________________________________________________
PART
I2C
SLAVE
INPUTS
INPUT
INTERRUPT
MASK
OPENDRAIN
PUSH-
PULL
APPLICATION
MAX7323
— Up to 4 4
4 I/O, 4 output-only versions:
4 open-drain I/O ports with latching transition
detection interrupt and selectable pullups.
4 push-pull outputs with selectable power-up default
levels.
MAX7328
MAX7329
— Up to 8 —
8 open-drain I/O ports with nonlatching transition
detection interrupt and pullups on all ports.
All ports power up as inputs (or logic-high outputs).
Any port can be used as an input by setting the
open-drain output to logic-high.
16-PORT EXPANDERS
MAX7324
8 Yes — 8
Software equivalent to a MAX7320 plus a MAX7319.
MAX7325
— Up to 8 8
Software equivalent to a MAX7320 plus a MAX7321.
MAX7326
4 Yes — 12
Software equivalent to a MAX7320 plus a MAX7322.
MAX7327
and
— Up to 4 12
Software equivalent to a MAX7320 plus a MAX7323.
Table 1. MAX7319–MAX7329 Family Comparison (continued)
ADDRESS
110xxxx Up to 4
0100xxx
0111xxx
101xxxx
110xxxx
Up to 8
Up to 8
Up to 4
OUTPUTS
OUTPUTS
Page 7
Slave Address and Input Pullup Selection
Address inputs AD0 and AD2 determine the MAX7323
slave address, select which inputs have pullup resistors, and set the default logic state on outputs. Pullups
are enabled on the input ports in groups of two (see
Table 3). The MAX7319, MAX7321, MAX7322, and
MAX7323 use a different range of slave addresses
(110xxxx) than the MAX7320 (101xxxx).
The MAX7323 slave address is determined on each I2C
transmission, regardless of whether the transmission is
actually addressing the MAX7323. The MAX7323 distinguishes whether address inputs AD2 and AD0 are connected to SDA or SCL instead of fixed logic levels V+
or GND during this transmission. Therefore, the
MAX7323 slave address can be configured dynamically in the application without cycling the device supply.
On initial power-up, the MAX7323 cannot decode
address inputs AD2 and AD0 fully until the first I2C
transmission. AD0 and AD2 initially appear to be connected to V+ or GND. This is important because the
address selection determines the power-up default
states of the output ports and I/O port initial logic state,
and whether pullups are enabled. However, at powerup, the I
2
C SDA and SCL bus interface lines are high
impedance at the pins of every device (master or slave)
connected to the bus, including the MAX7323. This is
guaranteed as part of the I
2
C specification. Therefore,
address inputs AD2 and AD0 that are connected to
SDA or SCL normally appear at power-up to be connected to V+. The pullup selection logic uses AD0 to
select whether pullups are enabled for ports P2 and P3,
and to set the initial logic state for O0 and O1. AD2
selects whether pullups are enabled for ports P4 and
P5 and sets the initial logic state for O6 and O7. The
rule is that a logic-high, SDA, or SCL connection
selects the pullups and sets the default logic state to
high. A logic-low deselects the pullups and sets the
default logic state low (see Table 3). The port configuration is correct on power-up for a standard I2C configuration, where SDA or SCL are pulled up to V+ by the
external I2C pullup resistors.
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true—for example,
in applications in which there is legitimate bus activity
during power-up. Also, if SDA and SCL are terminated
with pullup resistors to a different supply voltage than
the MAX7323’s supply voltage, and if that pullup supply
rises later than the MAX7323’s supply, then SDA or
SCL may appear at power-up to be connected to GND.
In such applications, use the four address combinations that are selected by connecting address inputs
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
_______________________________________________________________________________________ 7
PART
INTERRUPT
MASK
OPENDRAIN
PUSH-
PULL
I2C DATA READ
MAX7319
8 Yes — —
<I7–I0 interrupt
mask>
<I7–I0 port inputs>
<I7–I0 transition flags>
MAX7320
—— —8
<O7–O0 port
outputs>
<O7-O0 port inputs>
MAX7321
— Up to 8 —
<P7–P0 port
outputs>
<P7–P0 port inputs>
<P7–P0 transition flags>
MAX7322
4 Yes — 4
<O7, O6 outputs,
I5–I2 interrupt
mask, O1, O0
outputs>
<O7, O6, I5–I2, O1, O0 port
inputs>
<0, 0, I5–I2 transition flags,
0, 0>
MAX7323
— Up to 4 4 <port outputs>
<O7, O6, P5–P2, O1, O0 port
inputs>
<0, 0, P5–P2 transition flags,
0, 0>
MAX7328
— Up to 8 —
<P7–P0 port
outputs>
<P7–P0 port inputs>
MAX7329
— Up to 8 —
<P7–P0 port
outputs>
<P7–P0 port inputs>
Table 2. Read and Write Access to Eight-Port Expander Family
I2C SLAVE
ADDRESS
110xxxx
101xxxx
110xxxx Up to 8
110xxxx
110xxxx Up to 4
0100xxx Up to 8
0111xxx Up to 8
INPUTS
OUTPUTS
OUTPUTS
2
I
C DATA WRITE
Page 8
MAX7323
AD2 and AD0 to V+ or GND (shown in bold in Table 3).
These selections are guaranteed to be correct at
power-up, independent of SDA and SCL behavior. If
one of the other 12 address combinations is used, an
unexpected combination of pullups might be asserted
until the first I2C transmission (to any device, not necessarily the MAX7323) is put on the bus.
I/O Port Inputs
I/O port inputs switch at the CMOS logic levels as
determined by the expander’s supply voltage, and are
overvoltage tolerant to +6V, independent of the
expander’s supply voltage.
I/O Port Input Transition Detection
All four I/O ports configured as inputs are monitored for
changes since the expander was last accessed
through the serial interface. The state of the I/O ports is
stored in an internal “snapshot” register for transition
monitoring. The snapshot is continuously compared
with the actual input conditions, and if a change is
detected for any port input, INT is asserted to signal a
state change. An internal transition flag is set for that
port. The input ports are sampled (internally latched
into the snapshot register) and the old transition flags
cleared during the I2C acknowledge of every MAX7323
read and write access. The previous port transition
flags are read through the serial interface as the second byte of a 2-byte read sequence.
A long read sequence (more than 2 bytes) can be used
to poll the expander continuously without the overhead
of resending the slave address. If more than 2 bytes
are read from the expander, the expander repeatedly
returns the input port data, alternating with the transition flags. The inputs are repeatedly resampled and the
transition flags repeatedly reset for each pair of bytes
read. All changes that occur during a long read
sequence are detected and reported.
The INT output is not reasserted during a read
sequence to avoid recursive reentry into an interrupt
service routine. Instead, if a data change occurs that
would normally cause the INT output to be set, the INT
assertion is delayed until the STOP condition. INT is not
reasserted upon a STOP condition if the changed input
data is read before the STOP occurs. The INT logic
ensures that unnecessary interrupts are not asserted,
yet data changes are detected and reported no matter
when the change occurs.
Port Outputs
Write 1 byte to the MAX7323 to set the output port levels for the four push-pull outputs, and the four opendrain I/O ports simultaneously.
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
8 _______________________________________________________________________________________
PIN
CONNECTION
DEVICE ADDRESS OUTPUTS POWER-UP DEFAULT
40kΩ INPUT PULLUPS ENABLED
AD2
O0
SCL
SCL
V+
SCL
SCL
SDA
SDA
V+
SDA
SDA
GND
GND
V+
GND
GND
V+
V+ V+
V+
V+
Pullups are not enabled for push-pull outputs.
Pullups are not enabled for push-pull outputs.
Table 3. MAX7323 Address Map
AD0 A6 A5 A4 A3 A2 A1 A0 O7 O6 P5 P4 P3 P2 O1 O0 O7 O6 P5 P4 P3 P2 O1
GND110000011110000 YY——
110000111111111 YYYY
SCL 110001011111111 YYYY
SDA110001111111111 YYYY
GND110010011110000 YY——
110010111111111 YYYY
SCL 110011011111111 YYYY
SDA110011111111111 YYYY
GND110100000000000 ————
110100100001111 ——YY
SCL 110101000001111 ——YY
SDA110101100001111 ——YY
GND110110011110000 YY——
110110111111111 YYYY
SCL 110111011111111 YYYY
SDA110111111111111
YYYY
Page 9
Serial Interface
Serial Addressing
The MAX7323 operates as a slave that sends and
receives data through an I
2
C interface. The interface
uses a serial data line (SDA) and a serial clock line (SCL)
to achieve bidirectional communication between master(s) and slave(s). The master initiates all data transfers
to and from the MAX7323 and generates the SCL clock
that synchronizes the data transfer (Figure 1).
SDA operates as both an input and an open-drain output. A pullup resistor, typically 4.7kΩ, is required on
SDA. SCL operates only as an input. A pullup resistor,
typically 4.7kΩ, is required on SCL if there are multiple
masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output.
Each transmission consists of a START condition sent
by a master, followed by the MAX7323’s 7-bit slave
address plus R/W bit, 1 or more data bytes, and finally
a STOP condition (Figure 2).
START and STOP Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, the master
issues a STOP (P) condition by transitioning SDA from
low to high while SCL is high. The bus is then free for
another transmission (Figure 2).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 3).
Acknowledge
The acknowledge bit is a clocked 9th bit the recipient
uses to acknowledge receipt of each byte of data
(Figure 4). Each byte transferred effectively requires 9
bits. The master generates the 9th clock pulse, and the
recipient pulls down SDA during the acknowledge
clock pulse, such that the SDA line is stable low during
the high period of the clock pulse. When the master is
transmitting to the MAX7323, the device generates the
acknowledge bit because the MAX7323 is the recipient. When the MAX7323 is transmitting to the master,
the master generates the acknowledge bit because the
master is the recipient.
Slave Address
The MAX7323 has a 7-bit-long slave address (Figure
5). The 8th bit following the 7-bit slave address is the
R/W bit. It is low for a write command, and high for a
read command.
The first (A6), second (A5), and third (A4) bits of the
MAX7323 slave address are always 1, 1, and 0.
Connect AD2 and AD0 to GND, V+,SDA, or SCL to
select slave address bits A3, A2, A1, and A0. The
MAX7323 has 16 possible slave addresses (Table 3),
allowing up to 16 MAX7323 devices on an I2C bus.
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
_______________________________________________________________________________________ 9
SCL
SDA
t
R
t
F
t
BUF
START
CONDITION
STOP
CONDITION
REPEATED START CONDITION
START CONDITION
t
SU,STO
t
HD,STA
t
SU,STA
t
HD,DAT
t
SU,DAT
t
LOW
t
HIGH
t
HD,STA
Figure 1. 2-Wire Serial Interface Timing Details
SDA
SCL
START
CONDITION
STOP
CONDITION
SP
Figure 2. START and STOP Conditions
Page 10
MAX7323
Accessing the MAX7323
The MAX7323 is accessed through an I2C interface. The
transition flags are cleared, and INT is deasserted each
time the device acknowledges the I2C slave address.
A single-byte read from the MAX7323 returns the sta-
tus of the four I/O ports and the four output ports (read
back as inputs).
A 2-byte read returns first the status of the four I/O ports
and the four output ports (as for a single-byte read), followed by the four transition flags for the four I/O ports.
A multibyte read (more than 2 bytes before the I2C
STOP bit) repeatedly returns the port data, alternating
with the transition flags. As the input data is resampled
for each transmission, and the transition flags are reset
each time, a multibyte read continuously returns the
current data and identifies any changing I/O ports.
If a port data change occurs during the read sequence,
INT is reasserted after the I2C STOP bit. The MAX7323
does not generate another interrupt during a singlebyte or multibyte read.
Port data is sampled during the preceding I2C
acknowledge bit (the acknowledge bit for the I2C slave
address in the case of a single-byte or 2-byte read).
A single-byte write to the MAX7323 sets the logic state
of the four I/O ports and the 4-bit interrupt mask register, and clears both the internal transition flags and the
INT output when the master acknowledges the slave
address byte.
A multibyte write to the MAX7323 sets the logic state
of the four I/O ports and the interrupt mask register
repeatedly.
Reading from the MAX7323
A read from the MAX7323 starts with the master transmitting the MAX7323’s slave address with the R/W bit
set high. The MAX7323 acknowledges the slave
address, and samples the ports during the acknowledge bit. INT deasserts during the slave address
acknowledge.
Typically, the master reads 1 or 2 bytes from the
MAX7323, each byte being acknowledged by the master upon reception, with the exception of the last byte.
When the master reads 1 byte from the MAX7323 it
subsequently issues a STOP condition (Figure 6).
The MAX7323 transmits the current port data, clears
the change flags, and resets the transition detection.
INT deasserts during the slave acknowledge. The new
snapshot data is the current input port data transmitted
to the master, so any input port changes that occur
during the transmission are detected. INT remains high
until the STOP condition.
The master can read 2 bytes from the MAX7323 and
then issues a STOP condition (Figure 7). In this case, the
MAX7323 transmits the current port data, followed by the
change flags. The change flags are cleared, and transition detection restarted. INT goes high (high impedance
if an external pullup resistor is not fitted) during the slave
acknowledge. The new snapshot data is the current port
data transmitted to the master, so any port changes
occurring during the transmission are detected. INT
remains high until the STOP condition.
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
10 ______________________________________________________________________________________
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 3. Bit Transfer
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGMENT
START
CONDITION
SDA BY
RECEIVER
12 89
S
Figure 4. Acknowledge
Page 11
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
______________________________________________________________________________________ 11
SDA
SCL
.
11
A3
A2 A1 A0
0
R/W
MSB
LSB
ACK
Figure 5. Slave Address
SCL
MAX7321 SLAVE ADDRESS
S1 1 0 A
P
1
PORT I/O
t
IV
N
P0
P1
P2P3P4P5
P6
P7
D0D1D2D3D4D5D6D7
PORT I/O
INT OUTPUT
R/W
PORT SNAPSHOT
t
PH
t
IR
PORT SNAPSHOT
t
PSU
t
IP
INT REMAINS HIGH UNTIL STOP CONDITION
DATA
Figure 6. Reading the MAX7323 (1 Data Byte)
SCL
MAX7321 SLAVE ADDRESSS110
A
P
1
PORTS
INT OUTPUT
R/W
PORT SNAPSHOT
t
IV
t
PH
t
IR
AD0D1D2D3D4D5D6D7
PORT SNAPSHOT
t
PSU
t
IP
D7 D6 D5 D4 D3 D2 D1 D0 N
PORT SNAPSHOT
INT REMAINS HIGH UNTIL STOP CONDITION
S = START CONDITION
P = STOP CONDITION
SHADED = SLAVE TRANSMISSION
A = ACKNOWLEDGE
N = NOT ACKNOWLEDGE
O0
O1
P2P3P4P5
O6
O7
0
0
F2F3F4F5
0
0
PORT I/O INTERRUPT FLAGS
Figure 7. Reading the MAX7323 (2 Data Bytes)
Page 12
MAX7323
Writing to the MAX7323
A write to the MAX7323 starts with the master transmitting the MAX7323’s slave address with the R/W bit set
low. The MAX7323 acknowledges the slave address,
and samples the input ports during acknowledge. INT
goes high (high impedance if an external pullup resistor
is not fitted) during the slave acknowledge. The master
can now transmit 1 or more bytes of data. The MAX7323
acknowledges these subsequent bytes of data and
updates the interrupt mask register with each new byte
until the master issues a STOP condition (Figure 8).
Applications Information
Port Input and I2C Interface Level
Translation from Higher or Lower
Logic Voltages
The MAX7323’s SDA, SCL, AD0, AD1, RST, INT, and
P2–P5 are overvoltage protected to +6V independent
of V+. This allows the MAX7323 to operate from a lower
supply voltage, such as +3.3V, while the I2C interface
and/or some of the four I/O ports are driven from a
higher logic level, such as +5V.
The MAX7323 can operate from a higher supply voltage, such as +3V, while the I2C interface and/or some
of the four I/O ports P2–P5 are driven from a lower logic
level, such as +2.5V. Apply a minimum voltage of 0.7 x
V+ to assert a logic-high on any input. For example, a
MAX7323 operating from a +5V supply may not recognize a +3.3V nominal logic-high. One solution for inputlevel translation is to drive the MAX7323 inputs from
open-drain outputs. Use a pullup resistor to V+ or a
higher supply to ensure a high logic voltage greater
than 0.7 x V+.
Port-Output Port-Level Translation
The open-drain output architecture allows for level
translation to higher or lower voltages than the
MAX7323’s supply. Use an external pullup resistor on
any output to convert the high-impedance logic-high
condition to a positive voltage level. The resistor can
be connected to any voltage up to +6V, and the resistor value chosen to ensure no more than 20mA is sunk
in the logic-low condition. For interfacing CMOS inputs,
a pullup resistor value of 220kΩ is a good starting
point. Use a lower resistance to improve noise immunity, in applications where power consumption is less
critical, or where a faster rise time is needed for a
given capacitive load.
Each of the four output ports O0, O1, O6, and O7 has
protection diodes to GND (Figure 10). When a port is
driven to a voltage lower than GND, the protection
diode clamps the output to a diode drop below GND.
Each of the four I/O ports P2–P5 also has a 40kΩ (typ)
pullup resistor that can be enabled or disabled. When a
port is driven to a voltage higher than V+, the body
diode of the pullup enable switch conducts and the
40kΩ pullup resistor is enabled. When the MAX7323 is
powered down (V+ = 0), each I/O port appears as a
40kΩ resistor in series with a diode connected to zero.
Each port is protected to +6V under any of these
circumstances (Figure 10).
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
12 ______________________________________________________________________________________
SCL
SDA
START CONDITION R/W
SLAVE ADDRESS
S0
12345678
AAA
t
PV
DATA 1 DATA 2
t
PV
DATA TO PORT DATA TO PORT
t
PV
DATA 2 VALIDDATA 1 VALID
INTERNAL WRITE
TO PORT
DATA OUT
FROM PORT
t
PV
S = START CONDITION SHADED = SLAVE TRANSMISSION
P = STOP CONDITION N = NOT ACKNOWLEDGE
Figure 8. Writing to the MAX7323
Page 13
Driving LED Loads
When driving LEDs from one of the four output ports
(O0, O1, O6, or O7), a resistor must be connected in
series with the LED to limit the LED current to no more
than 20mA. Connect the LED cathode to the MAX7321
port, and the LED anode to V+ through the series current-limiting resistor, R
LED
. Set the port output low to
illuminate the LED. Choose the resistor value according
to the following formula:
R
LED
= (V
SUPPLY
- V
LED
- VOL) / I
LED
where:
R
LED
is the resistance of the resistor in series with the
LED (Ω).
V
SUPPLY
is the supply voltage used to drive the LED (V).
V
LED
is the forward voltage of the LED (V).
VOLis the output-low voltage of the MAX7323 when
sinking I
LED
(V).
I
LED
is the desired operating current of the LED (A).
For example, to operate a 2.2V red LED at 10mA from a
+5V supply:
R
LED
= (5 - 2.2 - 0.07) / 0.010 = 270Ω.
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
______________________________________________________________________________________ 13
OUTPUT
V+V+
PORTS
O0, O1, O6, O7
MAX7323
Figure 9. MAX7323 Push-Pull Output Port Structure
PORTS
P2–P5
PULLUP
ENABLE
INPUT
OUTPUT
40kΩ
G
S
D
MAX7323
V+
V+
Figure 10. MAX7323 I/O Port Structure
I2C
CONTROL
O7
P4
P5
O6
P3
P2
O1
O0
INT
I/O
PORTS
POWER-
ON RESET
INPUT
FILTER
RST
SDA
SCL
AD2
AD0
MAX7323
Functional Diagram
Page 14
MAX7323
Driving Load Currents Higher than 20mA
The MAX7323 can be used to drive loads, such as
relays, that draw more than 20mA by paralleling outputs. Use at least one output per 20mA of load current;
for example, a 5V, 330mW relay draws 66mA, and
therefore, requires four paralleled outputs. Any combination of outputs can be used as part of a load-sharing
design because any combination of ports can be set or
cleared at the same time by writing to the MAX7323. Do
not exceed a total sink current of 100mA for the device.
The MAX7323 must be protected from the negative voltage transient generated when switching off inductive
loads (such as relays), by connecting a reverse-biased
diode across the inductive load. Choose the peak current for the diode to be greater than the inductive load’s
operating current.
Power-Supply Considerations
The MAX7323 operates with a supply voltage of +1.71V
to +5.5V over the -40°C to +125°C temperature range.
Bypass the supply to GND with a ceramic capacitor of
at least 0.047µF as close as possible to the device. For
the TQFN version, additionally connect the exposed
paddle to GND.
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
14 ______________________________________________________________________________________
15
16
14
13
5
6
7
O1
P2
8
AD2
O7
O6
SCL
13
V+
4
12 10 9
AD0
RST
P5
P4
GND
P3
MAX7323
O0 INT
2
11
SDA
TQFN
TOP VIEW
*EP
*EXPOSED PADDLE, CONNECTED TO GND
+
Pin Configurations
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AD0
V+
SDA
SCL
INT
O7
O6
P5
P4
MAX7323
QSOP
RST
AD2
P2
O0
O1
P3
GND
+
+
Page 15
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
______________________________________________________________________________________ 15
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
QSOP.EPS
F
1
1
21-0055
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
Page 16
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
16 ______________________________________________________________________________________
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
12x16L QFN THIN.EPS
0.10 C 0.08 C
0.10 M C A B
D
D/2
E/2
E
A1
A2
A
E2
E2/2
L
k
e
(ND - 1) X e
(NE - 1) X e
D2
D2/2
b
L
e
L
C
L
e
C
L
L
C
L
C
PACKAGE OUTLINE
21-0136
2
1
I
8, 12, 16L THIN QFN, 3x3x0.8mm
MARKING
AAAA
Page 17
MAX7323
I2C Port Expander with 4 Push-Pull Outputs
and 4 Open-Drain I/Os
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
17 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
EXPOSED PAD VARIATIONS
CODES
PKG.
T1233-1
MIN.
0.95
NOM.
1.10
D2
NOM.
1.10
MAX.
1.25
MIN.
0.95
MAX.
1.25
E2
12N
k
A2
0.25
NE
A1
ND
0
0.20 REF
-
-
3
0.02
3
0.05
L
e
E
0.45
2.90
b
D
A
0.20
2.90
0.70
0.50 BSC.
0.55
3.00
0.65
3.10
0.25
3.00
0.75
0.30
3.10
0.80
16
0.20 REF
0.25
-
040.02
4
-
0.05
0.50 BSC.
0.30
2.90
0.40
3.00
0.20
2.90
0.70
0.25
3.00
0.75
3.10
0.50
0.80
3.10
0.30
PKG
REF. MIN.
12L 3x3
NOM. MAX. NOM.
16L 3x3
MIN. MAX.
0.35 x 45°
PIN
ID
JEDEC
WEED-1
T1233-
3
1.10
1.25
0.95 1.10 0.35 x 45°1.25 WEED-1
0.95
T1633F-3
0.65
T1633-4 0.95
0.80
0.95
0.65
0.80
1.10 1.25 0.95 1.10
0.225 x 45°
0.95
WEED-2
0.35 x 45°
1.25
WEED-2
T1633-2 0.95
1.10
1.25
0.95
1.10
0.35 x 45°
1.25
WEED-2
PACKAGE OUTLINE
21-0136
2
2
I
8, 12, 16L THIN QFN, 3x3x0.8mm
WEED-11.25
1.100.95
0.35 x 45°
1.251.10
0.95
T1233-4
T1633FH-3 0.65 0.80 0.95
0.225 x 45°
0.65 0.80
0.95
WEED-2
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO
JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED
WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
10. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
12. WARPAGE NOT TO EXCEED
0.10mm.
0.25 0.30 0.35
2
0.25
0
0.20 REF
-
-
0.02
0.05
0.35
8
2
0.55 0.75
2.90
2.90 3.00 3.10
0.65 BSC.
3.00 3.10
8L 3x3
MIN.
0.70 0.75 0.80
NOM. M
AX.
TQ833-1 1.250.25 0.70 0.35 x 45° WEEC1.250.700.25
T1633-5 0.95
1.10
1.25
0.35 x 45°
WEED-20.95
1.10
1.25
____________________Revision History
Pages changed at Rev 1: Title change—all pages, 1–17
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