MAXIM MAX7316 User Manual

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General Description

The MAX7316 I2C/SMBus™-compatible serial interfaced
peripheral provides microprocessors with eight additional
I/O ports plus one output-only port and one input-only
port. Each I/O port can be individually configured as
either an open-drain current-sinking output rated to 50mA
at 5.5V or as a logic input with transition detection. The
output-only port can also be assigned as an interrupt out­put for transition detection. The outputs are capable of
driving LEDs, or can provide logic outputs with external
resistive pullup up to 5.5V.

Eight-bit PWM current control is available for all nine out­put ports. Four bits are global control and apply to all LED
outputs to provide coarse adjustment of current from fully
off to fully on in 14 intensity steps. Additionaly each output
then has individual 4-bit control, which further divides the
globally set current into 16 more steps. Alternatively, the
current control can be configured as a single 8-bit control
that sets all outputs at once.

Each output has independent blink timing with two blink
phases. LEDs can be individually set to be on or off dur­ing either blink phase or to ignore the blink control. The
blink period is controlled by an external clock input (up to
1kHz) on BLINK or by a register. The BLINK input can
also be used as a logic control to turn the LEDs on and
off, or as a general-purpose input.

The MAX7316 is controlled through a 2-wire serial inter­face, and can be set to one of four I

2

C addresses.

Applications

Features

♦ 400kbps, 2-Wire Serial Interface, 5.5V Tolerant
♦ 2V to 3.6V Operation
♦ Overall 8-Bit PWM LED Intensity Control

Global 16-Step Intensity Control
Plus Individual 16-Step Intensity Controls

♦ 2-Phase LED Blinking
♦ High Output Current (50mA max Per Port)
♦ Outputs are 5.5V-Rated Open Drain
♦ Inputs are Overvoltage Protected to 5.5V
♦ Transition Detection with Interrupt Output
♦ RST Input Clears Serial Interface and Restores

Power-Up Default State

♦ Low Standby Current (1.2µA (typ), 3.3µA (max))
♦ Tiny 3mm x 3mm, Thin QFN Package
♦ -40°C to +125°C Temperature Range

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

________________________________________________________________ Maxim Integrated Products 1

Pin Configurations

MAX7316

P5

P0
P1
P2
P3

V+

3.3V

µC

SDA

SDA

AD0

5V

P6

P7

SCL

SCL

BLINK

I/O

RST

I/O

P4

OUTPUT 1

GND

5V

INPUT 1
INPUT 2
INPUT 3

0.047µF

INT

INT/O8

Typical Application Circuit

19-3055; Rev 0; 10/03

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

Pin Configurations continued at end of data sheet.

LCD Backlights

LED Status Indication

Relay Drivers

Keypad Backlights

RGB LED Drivers

System I/O Ports

Purchase of I2C components of Maxim Integrated Products, Inc.,
or one of its sublicensed Associated Companies, conveys a
license under the Philips I

2

C Patent Rights to use these compo-

nents in an I

2

C system, provided that the system conforms to the

I

2

C Standard Specification as defined by Philips.

SMBus is a trademark of Intel Corp.

PART

TEMP

RANGE

MAX7316ATE -40°C to +125°C

MAX7316AEE -40°C to +125°C

PIN­PACKAGE

16 Thin QFN
3mm x 3mm
x 0.8mm

16 QSOP

TOP

MARK

AAV

—

TOP VIEW

AD0

RST

1

P0

2

P1

P2

MAX7316ATE

3

4

5678

P3

BLINK

GND

QFN

V+

SDA

13141516

SCL

12

INT/08

11

P7

10

P6

9

P5

P4

MAX7316

10-Port I/O Expander with LED Intensity
Control and Interrupt

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

Voltage (with respect to GND)

V+ .............................................................................-0.3V to +4V

SCL, SDA, AD0, BLINK, RST, P0–P7 .......................-0.3V to +6V

INT/O8 ......................................................................-0.3V to +8V

DC Current on P0–P7, INT/O8 ............................................55mA

DC Current on SDA.............................................................10mA

Maximum GND Current ....................................................190mA

Continuous Power Dissipation (T

A

= +70°C)

16-Pin QSOP (derate 8.3mW/°C over +70°C)..............667mW

16-Pin QFN (derate 14.7mW/°C over +70°C) ............1177mW

Operating Temperature Range (T

MIN

to T

MAX

)-40°C to +125°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

ELECTRICAL CHARACTERISTICS

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)

(Note 1)

Operating Supply Voltage V+ 2.0 3.6 V

Output Load External Supply
Voltage

Standby Current
(Interface Idle, PWM Disabled)

Supply Current
(Interface Idle, PWM Enabled)

Supply Current
(Interface Running, PWM
Disabled)

Supply Current
(Interface Running, PWM
Enabled)

Input High Voltage
SDA, SCL, AD0, BLINK, P0–P7

Input Low Voltage
SDA, SCL, AD0, BLINK, P0–P7

Input Leakage Current
SDA, SCL, AD0, BLINK, P0–P7

Input Capacitance
SDA, SCL, AD0, BLINK, P0–P7

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

V

EXT

S C L and S D A at V + ; other

I

d i g i tal i np uts at V + or GN D ;

+

P WM i ntensi ty contr ol d i sab l ed

S C L and S D A at V + ; other

I

d i g i tal i np uts at V + or GN D ;

+

P WM i ntensi ty contr ol enab l ed

f

I

inputs at V+ or GND; PWM

+

intensity control disabled

f

I

inputs at V+ or GND; PWM

+

intensity control enabled

V

IH

V

IL

I

, IIL0 ≤ input voltage ≤ 5.5V -0.2 +0.2 µA

IH

= 400kHz; other digital

SCL

= 400kHz; other digital

SCL

TA = +25°C 1.2 2.3

TA = -40°C to +85°C 2.6

T

= T

= T

= T

= T

MIN

MIN

MIN

MIN

to T

to T

to T

to T

MAX

MAX

MAX

MAX

A

TA = +25°C 7 12.1

TA = -40°C to +85°C 13.3

T

A

TA = +25°C4076

TA = -40°C to +85°C78

T

A

TA = +25°C 51 110

TA = -40°C to +85°C 117

T

A

0 5.5 V

0.7 x
V+

3.3

14.4

80

122

0.3 x
V+

8pF

µA

µA

µA

µA

V

V

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at V+ = 3.3V, TA= + 25°C.)

(Note 1)

TIMING CHARACTERISTICS

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)

(Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

V+ = 2V, I

Output Low Voltage
P0–P7, INT/O8

V

OL

V+ = 3.3V, I

Output Low-Voltage SDA V

PWM Clock Frequency f

OLSDAISINK

PWM

= 20mA

SINK

= 20mA

SINK

= 20mA

SINK

= 6mA 0.4 V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Serial Clock Frequency f

Bus Free Time Between a STOP and a START
Condition

Hold Time, Repeated START Condition t

Repeated START Condition Setup Time t

STOP Condition Setup Time t

Data Hold Time t

Data Setup Time t

SCL Clock Low Period t

SCL Clock High Period t

Rise Time of Both SDA and SCL Signals, Receiving t

Fall Time of Both SDA and SCL Signals, Receiving t

Fall Time of SDA Transmitting t

Pulse Width of Spike Suppressed t

Capacitive Load for Each Bus Line C
RST Pulse Width t

SCL

t

BUF

HD, STA

SU, STA

SU, STO

HD, DAT

SU, DAT

LOW

HIGH

F.TX

(Note 2) 0.9 µs

(Notes 3, 4)

R

(Notes 3, 4)

F

(Notes 3, 5)

(Note 6) 50 ns

SP

(Note 3) 400 pF

b

W

TA = +25°C 0.15 0.25

TA = -40°C to +85°C 0.29

= T

MIN

to T

MAX

T

A

0.31

TA = +25°C 0.13 0.22

TA = -40°C to +85°C 0.25V+ = 2.5V, I

= T

MIN

to T

MAX

T

A

0.27

TA = +25°C 0.12 0.22

TA = -40°C to +85°C 0.23

= T

MIN

to T

MAX

T

A

0.25

32 kHz

400 kHz

1.3 µs

0.6 µs

0.6 µs

0.6 µs

180 ns

1.3 µs

0.7 µs

20 +

0.1C

20 +

0.1C

20 +

0.1C

300 ns

b

300 ns

b

250 ns

b

1µs

V

MAX7316

10-Port I/O Expander with LED Intensity
Control and Interrupt

4 _______________________________________________________________________________________

TIMING CHARACTERISTICS (continued)

(Typical Operating Circuit, V+ = 2V to 3.6V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25°C.)

(Note 1)

Note 1: All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V

IL

of the SCL signal) to bridge

the undefined region of SCL’s falling edge.

Note 3: Guaranteed by design.
Note 4: C

b

= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDDand 0.7 x VDD.

Note 5: I

SINK

≤ 6mA. Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDDand 0.7 x VDD.

Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.

STANDBY CURRENT vs. TEMPERATURE

MAX7316 toc01

TEMPERATURE (°C)

STANDBY CURRENT (µA)

1109565 80-10 5 20 35 50-25

1

2

3

4

5

6

7

8

9

10

0

-40 125

V+ = 3.6V
PWM ENABLED

V+ = 2.7V
PWM ENABLED

V+ = 2V
PWM DISABLED

V+ = 2.7V
PWM DISABLED

V+ = 3.6V
PWM
DISABLED

V+ = 2V
PWM ENABLED

SUPPLY CURRENT vs. TEMPERATURE

(PWM DISABLED; f

SCL

= 400kHz)

MAX7316 toc02

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

1109565 80-10 5 20 35 50-25

10

20

30

40

50

60

70

0

-40 125

V+ = 3.6V

V+ = 2.7V

V+ = 2V

5

10

15

20

25

30

35

40

45

50

55

60

65

70

0

SUPPLY CURRENT vs. TEMPERATURE

(PWM ENABLED; f

SCL

= 400kHz)

MAX7316 toc03

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

1109565 80-10 5 20 35 50-25-40 125

V+ = 3.6V

V+ = 2.7V

V+ = 2V

__________________________________________Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Interrupt Valid t

Interrupt Reset t

Output Data Valid t

Input Data Step Time t

Input Data Hold Time t

Figure 10 6.5 µs

IV

Figure 10 1.0 µs

IR

Figure 10 5.0 µs

DV

Figure 10 100 ns

DS

Figure 10 1 µs

DH

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

_______________________________________________________________________________________ 5

Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)

PORT OUTPUT LOW VOLTAGE WITH 50mA

LOAD CURRENT vs. TEMPERATURE

0.6

(V)

0.5

OL

V+ = 2V

0.4

0.3

0.2

0.1

PORT OUTPUT LOW VOLTAGE V

0

SCOPE SHOT OF 2 OUTPUT PORTS

MASTER INTENSITY SET TO 1/15

OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16

OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 15/16

V+ = 2.7V

V+ = 3.6V

TEMPERATURE (°C)

MAX7316 toc07

2ms/div

1109565 80-10 5 20 35 50-25-40 125

PORT OUTPUT LOW VOLTAGE WITH 20mA

LOAD CURRENT vs. TEMPERATURE

0.6

ALL OUTPUTS LOADED

(V)

0.5

MAX7316 toc04

OL

0.4

0.3

0.2

0.1

PORT OUTPUT LOW VOLTAGE V

0

-40 125

SCOPE SHOT OF 2 OUTPUT PORTS

MASTER INTENSITY SET TO 14/15

OUTPUT 1
2V/div

OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16

OUTPUT 2
2V/div

OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 14/15

V+ = 2V

V+ = 2.7V

TEMPERATURE (°C)

2ms/div

V+ = 3.6V

MAX7316 toc08

1.050

1.025

MAX7316 toc05

1.000

0.975

0.950

PWM CLOCK FREQUENCY

0.925

OUTPUT 1
2V/div

OUTPUT 2
2V/div

0.900

(V)

OL

V

0.35

0.30

0.25

0.20

0.15

0.10

0.05

1109580655035205-10-25

PWM CLOCK FREQUENCY

vs. TEMPERATURE

V+ = 3.6V

V+ = 2.7V

NORMALIZED TO V+ = 3.3V, TA = 25°C

-40 125
TEMPERATURE (°C)

SINK CURRENT vs. V

V+ = 2V

V+ = 2.7V

V+ = 3.3V

0

0

ONLY ONE OUTPUT LOADED

SINK CURRENT (mA)

MAX7316 toc06

V+ = 2V

1109580655035205-10-25

OL

MAX7316 toc09

V+ = 3.6V

5040302010

MAX7316

Functional Overview

The MAX7316 is a general-purpose input/output (GPIO)
peripheral that provides eight I/O ports, P0–P7, con­trolled through an I

2

C-compatible serial interface. A 9th

output-only port, INT/O8, can be configured as an inter­rupt output or as a general-purpose output port. All out-

put ports sink loads up to 50mA connected to external
supplies up to 5.5V, independent of the MAX7316’s
supply voltage. The MAX7316 is rated for a ground cur­rent of 190mA, allowing all nine outputs to sink 20mA at
the same time. Figure 1 shows the output structure of
the MAX7316. The ports default to inputs on power-up.

10-Port I/O Expander with LED Intensity
Control and Interrupt

6 _______________________________________________________________________________________

Pin Description

Figure 1. Simplified Schematic of I/O Ports

PIN

QSOP QFN

1 15 BLINK Input Port Configurable as Blink Control or General-Purpose Input

216RST

3 1 AD0

4–7, 9–12 2–5, 7–10 P0–P7 Input/Output Ports. P0–P7 are open-drain I/Os rated at 5.5V, 50mA.

8 6 GND Ground. Do not sink more than 190mA into the GND pin.

13 11 INT/O8

14 12 SCL I2C-Compatible Serial Clock Input

15 13 SDA I2C-Compatible Serial Data I/O

16 14 V+

— PAD Exposed pad Exposed Pad on Package Underside. Connect to GND.

DATA FROM

SHIFT REGISTER

DATA FROM

SHIFT REGISTER

WRITE

CONFIGURATION

PULSE

WRITE PULSE

NAME FUNCTION

Reset Input. Active low clears the 2-wire interface and puts the device in the
same condition as power-up reset.

Address Input. Sets device slave address. Connect to either GND, V+, SCL,
or SDA to give four logic combinations. See Table 1.

Output Port. Open-drain output rated at 7V, 50mA. Configurable as interrupt
output or general-purpose output.

Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic
capacitor.

CONFIGURATION

REGISTER

D

Q

FF

C

Q

K

OUTPUT

PORT

REGISTER

D

FF

C

K

Q

Q

OUTPUT PORT
REGISTER DATA

I/O PIN

Q2

READ PULSE

INPUT PORT

REGISTER

D

Q

FF

C

Q

K

GND

INPUT PORT
REGISTER DATA

TO INT

Port Inputs and Transition Detection

The input ports register reflects the incoming logic lev­els of the port pins, regardless of whether the pin is
defined as an input or an output. Reading the input
ports register latches the current-input logic level of the
affected eight ports. Transition detection allows all
ports configured as inputs to be monitored for changes
in their logic status. The action of reading the input
ports register samples the corresponding 8 port bits’
input condition. This sample is continuously compared
with the actual input conditions. A detected change in
input condition causes the INT/O8 interrupt output to go
low, if configured as an interrupt output. The interrupt is
cleared either automatically if the changed input
returns to its original state, or when the input ports reg­ister is read.

The INT/O8 pin can be configured as either an interrupt
output or as a 9th output port with the same static or
blink controls as the other eight ports (Table 4).

Port Output Control and LED Blinking

The blink phase 0 register sets the output logic levels of
the eight ports P0–P7 (Table 8). This register controls
the port outputs if the blink function is disabled. A
duplicate register, the blink phase 1 register, is also
used if the blink function is enabled (Table 9). In blink
mode, the port outputs can be flipped between using
the blink phase 0 register and the blink phase 1 regis­ter using hardware control (the BLINK input) and/or
software control (the blink flip flag in the configuration
register) (Table 4).

The logic level of the BLINK input can be read back
through the blink status bit in the configuration register
(Table 4). The BLINK input, therefore, can be used as a
general-purpose logic input (GPI port) if the blink func­tion is not required.

PWM Intensity Control

The MAX7316 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity control.
PWM intensity control can be enabled on an output-by­output basis, allowing the MAX7316 to provide any mix
of PWM LED drives and glitch-free logic outputs (Table

10). PWM can be disabled entirely, in which case all out­put ports are static and the MAX7316 operating current
is lowest because the internal oscillator is turned off.

PWM intensity control uses a 4-bit master control and 4
bits of individual control per output (Tables 13, 14). The
4-bit master control provides 16 levels of overall intensi­ty control, which applies to all PWM-enabled output
ports. The master control sets the maximum pulse
width from 1/15 to 15/15 of the PWM time period. The
individual settings comprise a 4-bit number further
reducing the duty cycle to be from 1/16 to 15/16 of the
time window set by the master control.

For applications requiring the same PWM setting for all
output ports, a single global PWM control can be used
instead of all the individual controls to simplify the con­trol software and provide 240 steps of intensity control
(Tables 10 and 13).

Standby Mode

When the serial interface is idle and the PWM intensity
control is unused, the MAX7316 automatically enters
standby mode. If the PWM intensity control is used, the
operating current is slightly higher because the internal
PWM oscillator is running. When the serial interface is
active, the operating current also increases because
the MAX7316, like all I2C slaves, has to monitor every
transmission.

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

_______________________________________________________________________________________ 7

Figure 2. 2-Wire Serial Interface Timing Details

SDA

t

LOW

SU,DAT

t

HIGH

t

t

R

F

t

SCL

t

HD,STA

START CONDITION

t

HD,DAT

t

SU,STA

REPEATED START CONDITION

t

HD,STA

t

SU,STO

STOP

CONDITION

t

BUF

START

CONDITION

MAX7316

Serial Interface

Serial Addressing

The MAX7316 operates as a slave that sends and
receives data through an I2C-compatible 2-wire inter­face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu­nication between master(s) and slave(s). A master (typ­ically a microcontroller) initiates all data transfers to and
from the MAX7316 and generates the SCL clock that
synchronizes the data transfer (Figure 2).

The MAX7316 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on SDA. The MAX7316 SCL line operates
only as an input. A pullup resistor, typically 4.7kΩ, is
required on SCL if there are multiple masters on the 2­wire interface, or if the master in a single-master system
has an open-drain SCL output.

Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX7316
7-bit slave address plus R/W bit, a register address
byte, one or more data bytes, and finally a STOP condi­tion (Figure 3).

Start and Stop Conditions

Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis­sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).

Bit Transfer

One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).

Acknowledge

The acknowledge bit is a clocked 9th bit that the recipi­ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse so the SDA line is stable low
during the high period of the clock pulse. When the
master is transmitting to the MAX7316, the device gen­erates the acknowledge bit because the MAX7316 is
the recipient. When the MAX7316 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.

Slave Address

The MAX7316 has a 7-bit long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/W bit. The R/W bit is low for a write command, high
for a read command.

10-Port I/O Expander with LED Intensity
Control and Interrupt

8 _______________________________________________________________________________________

Figure 3. Start and Stop Conditions

Figure 4. Bit Transfer

Figure 5. Acknowledge

Figure 6. Slave Address

SDA

SCL

SP

START

CONDITION

SDA

SCL

DATA LINE STABLE;

DATA VALID

START

CONDITION

SCL

SDA BY

TRANSMITTER

SDA BY

RECEIVER

S

CHANGE OF DATA

ALLOWED

CLOCK PULSE

FOR ACKNOWLEDGE

12 89

STOP

CONDITION

SDA

MSB

SCL

1

LSB

ACK00A6 0 0A2 R/W

The second (A5), third (A4), fourth (A3), sixth (A1), and
last (A0) bits of the MAX7316 slave address are always
1, 0, 0, 0, and 0. Slave address bits A6 and A2 are
selected by the address input AD0. AD0 can be con­nected to GND, V+, SDA, or SCL. The MAX7316 has four
possible slave addresses (Table 1), and therefore a
maximum of four MAX7316 devices can be controlled
independently from the same interface.

Message Format for Writing the MAX7316

A write to the MAX7316 comprises the transmission of
the MAX7316’s slave address with the R/W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The com­mand byte determines which register of the MAX7316
is to be written to by the next byte, if received (Table 2).
If a STOP condition is detected after the command byte
is received, then the MAX7316 takes no further action
beyond storing the command byte.

Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register
of the MAX7316 selected by the command byte (Figure

8). If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent MAX7316 internal registers because the
command byte address autoincrements (Table 2). A
diagram of a write to the output ports registers (blink
phase 0 register or blink phase 1 register) is given in
Figure 10.

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

_______________________________________________________________________________________ 9

Table 1. MAX7316 I2C Slave Address Map

Figure 8. Command and Single Data Byte Received

Figure 9. n Data Bytes Received

Figure 7. Command Byte Received

PIN AD0

SCL1100000

SDA1100100

GND0100000

V+ 0100100

A6 A5 A4 A3 A2 A1 A0

SAA

DEVICE ADDRESS

COMMAND BYTE IS STORED ON RECEIPT OF

STOP CONDITION

ACKNOWLEDGE FROM MAX7316

0SLAVE ADDRESS COMMAND BYTE

R/W

D15 D14 D13 D12 D11 D10 D9 D8

P

ACKNOWLEDGE FROM MAX7316

HOW COMMAND BYTE AND DATA BYTE MAP INTO

MAX7316'S REGISTERS

ACKNOWLEDGE FROM MAX7316

SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE

R/W

HOW COMMAND BYTE AND DATA BYTE MAP INTO

MAX7316'S REGISTERS

ACKNOWLEDGE FROM MAX7316

SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE

R/W

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3 D2D5 D4D7 D6

ACKNOWLEDGE FROM MAX7316 ACKNOWLEDGE FROM MAX7316

AUTOINCREMENT MEMORY ADDRESS

ACKNOWLEDGE FROM MAX7316 ACKNOWLEDGE FROM MAX7316

AUTOINCREMENT MEMORY ADDRESS

1

BYTE

N

BYTES

MAX7316

Message Format for Reading

The MAX7316 is read using the MAX7316’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read using the same rules as for a
write (Table 2). Thus, a read is initiated by first configur­ing the MAX7316’s command byte by performing a
write (Figure 7). The master can now read n consecu­tive bytes from the MAX7316 with the first data byte
being read from the register addressed by the initial­ized command byte. When performing read-after-write
verification, remember to reset the command byte’s
address because the stored command byte address
has been autoincremented after the write (Table 2). A
diagram of a read from the input ports register is shown
in Figure 10 reflecting the states of the ports.

Operation with Multiple Masters

If the MAX7316 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7316 should
use a repeated start between the write, which sets the
MAX7316’s address pointer, and the read(s) that takes
the data from the location(s) (Table 2). This is because it
is possible for master 2 to take over the bus after master
1 has set up the MAX7316’s address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX7316’s address pointer, then master
1’s delayed read can be from an unexpected location.

Command Address Autoincrementing

The command address stored in the MAX7316 circu­lates around grouped register functions after each data
byte is written or read (Table 2).

10-Port I/O Expander with LED Intensity
Control and Interrupt

10 ______________________________________________________________________________________

Figure 10. Read, Write, and Interrupt Timing Diagrams

WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)

SCL

123456789

SLAVE ADDRESS

SDA

SA6A5A4A3A2A1A00 A0 000000

COMMAND BYTE

1A A AP

MSB LSBDATA 1

MSB LSBDATA 2

START CONDITION

P7–P0

READ FROM INPUT PORTS REGISTERS

SCL

123456789

SDA

SA6A5A4A3A2A1A0 1 A

START CONDITION

P7–P0

INTERRUPT VALID/RESET

SCL

123456789

SLAVE ADDRESS

S A6A5A4A3A2A1A0 1 A

SDA

START CONDITION

P7–P0

INT

DATA 1

ACKNOWLEDGE FROM SLAVE

R/W

SLAVE ADDRESS

R/W

DATA 1 DATA 2 D ATA3 D ATA4

R/W

t

IV

COMMAND BYTE

MSB LSBDATA 1

ACKNOWLEDGE FROM SLAVE

t

DH

COMMAND BYTE

MSB LSBDATA 2 MSB LSBDATA4

ACKNOWLEDGE FROM SLAVE

DATA 2

t

t

IV

IR

ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM SLAVE STOP

ANA

MSB LSBDATA 4

ACKNOWLEDGE FROM MASTER

t

DS

ANA

ACKNOWLEDGE FROM MASTER

t

IR

DATA 3

DATA1 VALID

t

DV

P

STOP CONDITION

NO ACKNOWLEDGE FROM
MASTER

P

STOP CONDITION

NO ACKNOWLEDGE FROM
MASTER

CONDITION

t

DV

DATA2 VALID

Device Reset

The reset input RST is an active-low input. When taken
low, RST clears any transaction to or from the MAX7316
on the serial interface and configures the internal regis­ters to the same state as a power-up reset (Table 3).
The MAX7316 then waits for a START condition on the
serial interface.

Detailed Description

Initial Power-Up

On power-up, and whenever the RST input is pulled
low, all control registers are reset and the MAX7316
enters standby mode (Table 3). Power-up status makes
all ports into inputs and disables both the PWM oscilla­tor and blink functionality. RST can be used as a hard­ware shutdown input, which effectively turns off any
LED (or other) loads and puts the device into its lowest
power condition.

Configuration Register

The configuration register is used to configure the PWM
intensity mode, interrupt, and blink behavior, operate
the INT/O8 output, and read back the interrupt status
(Table 4).

Ports Configuration

The eight I/O ports P0 through P7 can be configured to
any combination of inputs and outputs using the ports
configuration register (Table 5). The INT/O8 output can
also be configured as an extra general-purpose output,
and the BLINK input can be configured as an extra
general-purpose input using the configuration register
(Table 4).

Input Ports

The input ports register is read only (Table 6). It reflects
the incoming logic levels of the ports, regardless of
whether the port is defined as an input or an output by the
ports configuration registers. Reading the input ports reg­ister latches the current-input logic level of the affected
eight ports. A write to the input ports register is ignored.

Transition Detection

All ports configured as inputs are always monitored for
changes in their logic status. The action of reading the
input ports register or writing to the configuration regis­ter samples the corresponding 8 port bits’ input condi­tion (Tables 4, 6). This sample is continuously
compared with the actual input conditions. A detected
change in input condition causes an interrupt condition.
The interrupt is cleared either automatically if the
changed input returns to its original state, or when the
input ports register is read, updating the compared
data (Figure 10). Randomly changing a port from an
output to an input may cause a false interrupt to occur
if the state of the input does not match the content of
the input ports register. The interrupt status is available
as the interrupt flag INT in the configuration register
(Table 4).

The input status of all ports are sampled immediately
after power-up as part of the MAX7316’s internal initial­ization, so if all the ports are pulled to valid logic levels
at that time an interrupt does not occur at power-up.

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________ 11

Table 2. Register Address Map

REGISTER

Read input ports 0x00 0x00 (no change)

Blink phase 0 outputs 0x01 0x01 (no change)

Ports configuration 0x03 0x03 (no change)

Blink phase 1 outputs 0x09 0x09 (no change)

Master, O8 intensity 0x0E 0x0E (no change)

Configuration 0x0F 0x0F (no change)

Outputs intensity P1, P0 0x10 0x11

Outputs intensity P3, P2 0x11 0x12

Outputs intensity P5, P4 0x12 0x13

Outputs intensity P7, P6 0x13 0x10

ADDRESS CODE

(hex)

AUTOINCREMENT

ADDRESS

MAX7316

INT

/O8 Output

The INT/O8 output pin can be configured as either the
INT output that reflects the interrupt flag logic state or as

a general-purpose output O8. When used as a general­purpose output, INT/O8 has the same blink and PWM
intensity control capabilities as the other ports.

Set the interrupt enable I bit in the configuration register
to configure INT/O8 as the INT output (Table 4). Clear
interrupt enable to configure INT/O8 as the O8. The O8
logic state is set by the 2 bits O1 and O0 in the configu­ration register. O8 follows the rules for blinking selected
by the blink enable flag E in the configuration register. If
blinking is disabled, then interrupt output control O0
alone sets the logic state of the INT/O8 pin. If blinking is
enabled, then both interrupt output controls O0 and O1
set the logic state of INT/O8 according to the blink
phase. PWM intensity control for O8 is set by the 4
global intensity bits in the master and O8 intensity reg­ister (Table 13).

Blink Mode

In blink mode, the output ports can be flipped between
using either the blink phase 0 register or the blink
phase 1 register. Flip control is both hardware (the
BLINK input) and software control (the blink flip flag B
in the configuration register) (Table 4).

The blink function can be used for LED effects by pro­gramming different display patterns in the two sets of
output port registers, and using the software or hard­ware controls to flip between the patterns.

If the blink phase 1 register is written with 0xFF, then
the BLINK input can be used as a hardware disable to,
for example, instantly turn off an LED pattern pro­grammed into the blink phase 0 register. This technique
can be further extended by driving the BLINK input with
a PWM signal to modulate the LED current to provide
fading effects.

The blink mode is enabled by setting the blink enable flag
E in the configuration register (Table 4). When blink mode
is enabled, the states of the blink flip flag and the BLINK
input are EXOR’ed to set the phase, and the output ports
are set by either the blink phase 0 register or the blink
phase 1 register (Figure 11) (Table 7).

10-Port I/O Expander with LED Intensity
Control and Interrupt

12 ______________________________________________________________________________________

Table 3. Power-Up Configuration

X = Don’t care.

REGISTER FUNCTION POWER-UP CONDITION

Blink phase 0 outputs P7–P0 High-impedance outputs 0x01 1 1 1 1 1 1 1 1

Ports configuration P7–P0 Ports P7–P0 are inputs 0x03 1 1 1 1 1 1 1 1

Blink phase 1 outputs P7–P0 High-impedance outputs 0x09 1 1 1 1 1 1 1 1

Master, O8 intensity

Configuration

Outputs intensity P1, P0 P1, P0 are static logic outputs 0x10 1 1 1 1 1 1 1 1

Outputs Intensity P3, P2 P3, P2 are static logic outputs 0x11 1 1 1 1 1 1 1 1

Outputs intensity P5, P4 P5, P4 are static logic outputs 0x12 1 1 1 1 1 1 1 1

Outputs intensity P7, P6 P7, P6 are static logic outputs 0x13 1 1 1 1 1 1 1 1

PWM oscillator is disabled;

O8 is static logic output

INT/O8 is interrupt output;

blink is disabled;

global intensity is enabled

ADDRESS

CODE
(HEX)

0x0E 0 0 0 0 1 1 1 1

0x0F 0 0 0 0 1 1 0 0

D7 D6 D5 D4 D3 D2 D1 D0

REGISTER DATA

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________ 13

Table 4. Configuration Register

REGISTER DATA

REGISTER

ADDRESS

CODE

(HEX)

D7 D6 D5 D4 D3 D2 D1 D0

CONFIGURATION

R/W

INTERRUPT

STATUS

BLINK

STATUS

INTERRUPT

OUTPUT

CONTROL

AS GPO

INTERRUPT

ENABLE

GLOBAL

INTENSITY

BLINK FLIP

BLINK

ENABLE

Write device configuration

Read back device configuration

O0 I G B E

Disable blink

XXXXXXX0

Enable blink

XXXXXXX1

XXXXXX01

Flip blink register (see text)

XXXXXX11

Disable global intensity control—intensity
is set by registers 0x10–0x13 for ports P0

through P7 when configured as outputs,

and by D3–D0 of register 0x0E for INT/O8

when INT/O8 pin is configured as an

output port

XXXXX0 XX

Enable global intensity control—intensity

for all ports configured as outputs is set

by D3–D0 of register 0x0E

XXXXX1 XX

D i sab l e d ata chang e i nter r up t—INT/O8

outp ut i s contr ol l ed b y t he O 0 and O 1 b i ts

XXXX0 XXX

Enable data change interrupt—INT/O8

output is controlled by port input data

change

XXXX1 XXX

INT/O8 output is low (blink is disabled)

XXX00XX0

INT/O8 output is high impedance (blink is

disabled)

XXX10XX0

INT/O8 outp ut i s l ow d ur i ng b l i nk p hase 0

XXX00XX1

INT/O8 output is high impedance during

blink phase 0

XXX10XX1

INT/O8 outp ut i s l ow d ur i ng b l i nk p hase 1

XX0 X 0 XX1

INT/O8 output is high impedance during

blink phase 1

0x0F

XX1 X 0 XX1

X = Don’t care.

—

—

—

—

—

—

—

—

—

—

—

—

—

—

0

1

INT BLINK O1

MAX7316

The blink mode is disabled by clearing the blink enable
flag E in the configuration register (Table 4). When blink
mode is disabled, the state of the blink flip flag is
ignored, and the blink phase 0 register alone controls
the output ports.

The logic status of BLINK is made available as the
read-only blink status flag, blink in the configuration
register (Table 4). This flag allows BLINK to be used as
an extra general-purpose input (GPI) in applications not
using the blink function. When BLINK is going to be
used as a GPI, blink mode should be disabled by
clearing the blink enable flag E in the configuration reg­ister (Table 4).

Blink Phase Register

When the blink function is disabled, the blink phase 0
register sets the logic levels of the eight ports (P0
through P7) when configured as outputs (Table 8). A
duplicate register called the blink phase 1 register is
also used if the blink function is enabled (Table 9). A
logic high sets the appropriate output port high imped­ance, while a logic low makes the port go low.

Reading a blink phase register reads the value stored
in the register, not the actual port condition. The port
output itself may or may not be at a valid logic level,
depending on the external load connected.

The 9th output, O8, is controlled through 2 bits in the
configuration register, which provide the same static or
blink control as the other eight output ports.

PWM Intensity Control

The MAX7316 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity con­trol or other applications such as PWM trim DACs.
PWM can be disabled entirely for all the outputs. In this
case, all outputs are static and the MAX7316 operating
current is lowest because the internal PWM oscillator is
turned off.

10-Port I/O Expander with LED Intensity
Control and Interrupt

14 ______________________________________________________________________________________

Table 4. Configuration Register (continued)

REGISTER DATA

REGISTER

ADDRESS

CODE

(HEX)

D7 D6 D5 D4 D3 D2 D1 D0

CONFIGURATION

R/W

INTERRUPT

STATUS

BLINK

STATUS

INTERRUPT

OUTPUT

CONTROL

AS GPO

INTERRUPT

ENABLE

GLOBAL

INTENSITY

BLINK FLIP

BLINK

ENABLE

Read back BLINK input pin status—

input is low

X 0 XXXXXX

Read back BLINK input pin status—

input is high

X 1 XXXXXX

Read back data change interrupt status

—data change is not detected, and

INT/O8 output is high when interrupt

enable (I bit) is set

0 XXXXXXX

Read back data change interrupt status

output is low when interrupt enable (I bit)

is set

0x0F

1 XXXXXXX

X = Don’t care.

Figure 11. Blink Logic

1

1

1

—data change is detected, and INT/O8

1

BLINK ENABLE FLAG E

BLINK FLIP FLAG B

BLINK INPUT

BLINK
PHASE
REGISTERS

The MAX7316 can be configured to provide any combi­nation of PWM outputs and glitch-free logic outputs.
Each PWM output has an individual 4-bit intensity con­trol (Table 14). When all outputs are to be used with the
same PWM setting, the outputs can be controlled
together instead using the global intensity control
(Table 13). Table 10 shows how to set up the MAX7316
to suit a particular application.

PWM Timing

The PWM control uses a 240-step PWM period, divided
into 15 master intensity timeslots. Each master intensity
timeslot is divided further into 16 PWM cycles (Figure 12).

The master intensity operates as a gate, allowing the indi­vidual output settings to be enabled from 1 to 15 timeslots
per PWM period (Figures 13, 14, 15) (Table 13).

Each output’s individual 4-bit intensity control only
operates during the number of timeslots gated by the
master intensity. The individual controls provide 16
intensity settings from 1/16 through 16/16 (Table 14).

Figures 16, 17, and 18 show examples of individual
intensity control settings. The highest value an individ­ual or global setting can be set to is 16/16. This setting
forces the output to ignore the master control, and fol­low the logic level set by the appropriate blink phase
register bit. The output becomes a glitch-free static out­put with no PWM.

Using PWM Intensity Controls with Blink Disabled

When blink is disabled (Table 7), the blink phase 0 reg­ister specifies each output’s logic level during the PWM
on-time (Table 8). The effect of setting an output’s blink
phase 0 register bit to 0 or 1 is shown in Table 11. With
its output bit set to zero, an LED can be controlled with
16 intensity settings from 1/16th duty through fully on,
but cannot be turned fully off using the PWM intensity
control. With its output bit set to 1, an LED can be con­trolled with 16 intensity settings from fully off through
15/16th duty.

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________ 15

Table 5. Ports Configuration Register

Table 6. Input Ports Register

Table 7. Blink Logic

REGISTER R/W

Ports configuration

(1 = input, 0 = output)

Read back ports configuration 1

REGISTER R/W

Read input ports 1 0x00 IP7 IP6 IP5 IP4 IP3 IP2 IP1 IP0

ADDRESS

CODE
(HEX)

0

ADDRESS

CODE
(HEX)

BLINK ENABLE

FLAG E

0 X X X Disabled Blink phase 0 register

1

BLINK FLIP

FLAG B

0 0 0 Blink phase 0 register

0 1 1 Blink phase 1 register

1 0 1 Blink phase 1 register

11 0

BLINK INPUT

PIN

REGISTER DATA

D7 D6 D5 D4 D3 D2 D1 D0

0x06 OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0

REGISTER DATA

D7 D6 D5 D4 D3 D2 D1 D0

BLINK FLIP FLAG

EXOR

BLINK INPUT PIN

BLINK FUNCTION OUTPUT REGISTERS USED

Enabled

Blink phase 0 register

MAX7316

Using PWM Intensity Controls with Blink Enabled

When blink is enabled (Table 7), the blink phase 0 regis­ter and blink phase 1 register specify each output’s logic
level during the PWM on-time during the respective blink
phases (Tables 8 and 9). The effect of setting an output’s
blink phase x register bit to 0 or 1 is shown in Table 12.
LEDs can be flipped between either directly on and off,
or between a variety of high/low PWM intensities.

Global/O8 Intensity Control

The 4 bits used for output O8’s PWM individual intensity
setting also double as the global intensity control (Table

13). Global intensity simplifies the PWM settings when
the application requires them all to be the same, such
as for backlight applications, by replacing the 9 individ­ual settings with 1 setting. Global intensity is enabled
with the Global Intensity flag G in the configuration reg­ister (Table 4). When global PWM control is used, the 4
bits of master intensity and 4 bits of O8 intensity effec­tively combine to provide an 8-bit, 240-step intensity
control applying to all outputs.

It is not possible to apply global PWM control to a sub­set of the ports, and use the others as logic outputs. To
mix static logic outputs and PWM outputs, individual
PWM control must be selected (Table 10).

Applications Information

Output Level Translation

The open-drain output architecture allows the ports to
level translate the outputs to higher or lower voltages
than the MAX7316 supply. An external pullup resistor
can be used on any output to convert the high-imped­ance logic-high condition to a positive voltage level.
The resistor can be connected to any voltage up to

5.5V. For interfacing CMOS inputs, a pullup resistor
value of 220kΩ is a good starting point. Use a lower
resistance to improve noise immunity, in applications
where power consumption is less critical, or where a
faster rise time is needed for a given capacitive load.

10-Port I/O Expander with LED Intensity
Control and Interrupt

16 ______________________________________________________________________________________

Table 8. Blink Phase 0 Register

Table 9. Blink Phase 1 Register

REGISTER R/W

Write outputs phase 0 0

Read back outputs phase 0 1

ADDRESS

REGISTER R/W

Write outputs phase 1 0

Read back outputs phase 1 1

ADDRESS

CODE

(HEX)

0x02 OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0

CODE
(HEX)

0x0A OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

REGISTER DATA

REGISTER DATA

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________ 17

Table 10. PWM Application Scenarios

Figure 12. PWM Timing

Figure 13. Master Set to 1/15

Figure 15. Master Set to 15/15

Figure 14. Master Set to 14/15

All outputs static without PWM

A mix of static and PWM outputs, with PWM
outputs using different PWM settings

A mix of static and PWM outputs, with PWM
outputs all using the same PWM setting

All outputs PWM using the same PWM
setting

APPLICATION RECOMMENDED CONFIGURATION

Set the master, O8 intensity register 0x0E to any value from 0x00 to 0x0F.
The global intensity G bit in the configuration register is don't care.
The output intensity registers 0x10 through 0x13 are don't care.

Set the master, O8 intensity register 0x0E to any value from 0x10 to 0xFF.
Clear global intensity G bit to 0 in the configuration register to disable global intensity
control.
For the static outputs, set the output intensity value to 0xF.
For the PWM outputs, set the output intensity value in the range 0x0 to 0xE.

As above. Global intensity control cannot be used with a mix of static and PWM
outputs, so write the individual intensity registers with the same PWM value.

Set the master, O8 intensity register 0x0E to any value from 0x10 to 0xFF.
Set global intensity G bit to 1 in the configuration register to enable global intensity
control.
The master, O8 intensity register 0x0E is the only intensity register used.
The output intensity registers 0x10 through 0x13 are don't care.

ONE PWM PERIOD IS 240 CYCLES OF THE 32kHz PWM

OSCILLATOR. A PWM PERIOD CONTAINS 15 MASTER

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 14 15 1 2

INTENSITY TIMESLOTS.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 15 16 1 2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 14 15 1 2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 14 15 2 1

EACH MASTER INTENSITY

TIMESLOT CONTAINS 16

PWM CYCLES

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 14 15 2 1

MAX7316

10-Port I/O Expander with LED Intensity
Control and Interrupt

18 ______________________________________________________________________________________

Figure 17. Individual (or Global) Set to 15/16

Figure 16. Individual (or Global) Set to 1/16

Figure 18. Individual (or Global) Set to 16/16

Table 11. PWM Intensity Settings (Blink Disabled)

MASTER INTENSITY TIMESLOT

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

OUTPUT

(OR

GLOBAL)

INTENSITY

SETTING

0x0 1/16 15/16 Lowest PWM intensity 15/16 1/16 Highest PWM intensity

0x1 2/16 14/16 14/16 2/16

0x2 3/16 13/16 13/16 3/16

0x3 4/16 12/16 12/16 4/16

0x4 5/16 11/16 11/16 5/16

0x5 6/16 10/16 10/16 6/16

0x6 7/16 9/16 9/16 7/16

0x7 8/16 8/16 8/16 8/16

0x8 9/16 7/16 7/16 9/16

0x9 10/16 6/16 6/16 10/16

0xA 11/16 5/16 5/16 11/16

0xB 12/16 4/16 4/16 12/16

0xC 13/16 3/16 3/16 13/16

0xD 14/16 2/16

0xE 15/16 1/16 Highest PWM intensity 1/16 15/16 Lowest PWM intensity

0xF Static low Static low

PWM DUTY CYCLE

OUTPUT BLINK PHASE 0

REGISTER BIT = 0

LOW TIME HIGH TIME

MASTER INTENSITY TIMESLOT

MASTER INTENSITY TIMESLOT CONTROL IS IGNORED

LED BEHAVIOR WHEN

OUTPUT BLINK PHASE 0

REGISTER BIT = 0
(LED IS ON WHEN

OUTPUT IS LOW)

 Increasing PWM intensity

Full intensity, no PWM
(LED on continuously)

NEXT MASTER INTENSITY TIMESLOT

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

NEXT MASTER INTENSITY TIMESLOT

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

PWM DUTY CYCLE

OUTPUT BLINK PHASE 0

REGISTER BIT = 1

LOW TIME HIGH TIME

2/16 14/16

Static high

impedance

Static high

impedance

LED BEHAVIOR WHEN

OUTPUT BLINK PHASE 0

REGISTER BIT = 1
(LED IS ON WHEN

OUTPUT IS LOW)

LED off continuously

Increasing PWM intensity 

Driving LED Loads

When driving LEDs, a resistor in series with the LED
must be used to limit the LED current to no more than
50mA. Choose the resistor value according to the fol­lowing formula:

R

LED

= (V

SUPPLY

- V

LED

- VOL) / I

LED

where:

R

LED

is the resistance of the resistor in series with the
LED (Ω).
V

SUPPLY

is the supply voltage used to drive the LED (V).

V

LED

is the forward voltage of the LED (V).
VOLis the output low voltage of the MAX7316 when
sinking I

LED

(V).

I

LED

is the desired operating current of the LED (A).

For example, to operate a 2.2V red LED at 14mA from a
5V supply, R

LED

= (5 - 2.2 - 0.25) / 0.014 = 182Ω.

Driving Load Currents Higher than 50mA

The MAX7316 can be used to drive loads drawing more
than 50mA, like relays and high-current white LEDs, by
paralleling outputs. Use at least one output per 50mA of
load current; for example, a 5V 330mW relay draws
66mA and needs two paralleled outputs to drive it.
Ensure that the paralleled outputs chosen are controlled
by the same blink phase register, i.e., select outputs
from the P0 through P7 range. This way, the paralleled
outputs are turned on and off together. Do not use out­put O8 as part of a load-sharing design. O8 cannot be
switched at the same time as any of the other outputs
because it is controlled by a different register.

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________ 19

Table 12. PWM Intensity Settings (Blink Enabled)

OUTPUT

(OR

GLOBAL)

INTENSITY

SETTING

0x0 1/16 15/16 15/16 1/16

0x1 2/16 14/16 14/16 2/16

0x2 3/16 13/16 13/16 3/16

0x3 4/16 12/16 12/16 4/16

0x4 5/16 11/16 11/16 5/16

0x5 6/16 10/16 10/16 6/16

0x6 7/16 9/16 9/16 7/16

0x7 8/16 8/16 8/16 8/16 Output is half intensity during both blink phases

0x8 9/16 7/16 7/16 9/16

0x9 10/16 6/16 6/16 10/16

0xA 11/16 5/16 5/16 11/16

0xB 12/16 4/16 4/16 12/16

0xC 13/16 3/16 3/16 13/16

0xD 14/16 2/16 2/16 14/16

0xE 15/16 1/16 1/16 15/16

0xF Static low Static low

PWM DUTY CYCLE

OUTPUT BLINK

PHASE X

REGISTER BIT = 0

LOW
TIME

HIGH
TIME

PWM DUTY CYCLE

OUTPUT BLINK

PHASE X

REGISTER BIT = 1

LOW
TIME

Static high

impedance

HIGH
TIME

Static high

impedance

P hase 0: LE D on at l ow i ntensi ty

P hase 1: LE D on at hi g h i ntensi ty

P hase 0: LE D on at hi g h i ntensi ty

P hase 1: LE D on at l ow i ntensi ty

Phase 0: LED on continuously
Phase 1: LED off continuously

EXAMPLES OF LED BLINK BEHAVIOR

(LED IS ON WHEN OUTPUT IS LOW)

BLINK PHASE 0

REGISTER BIT = 0

BLINK PHASE 1

REGISTER BIT = 1

P hase 0: LE D on at hi g h i ntensi ty

P hase 1: LE D on at l ow i ntensi ty

P hase 0: LE D on at l ow i ntensi ty

P hase 1: LE D on at hi g h i ntensi ty

Phase 0: LED off continuously
Phase 1: LED on continuously

BLINK PHASE 0

REGISTER BIT = 1

BLINK PHASE 1

REGISTER BIT = 0

MAX7316

10-Port I/O Expander with LED Intensity
Control and Interrupt

20 ______________________________________________________________________________________

Table 13. Master, O8 Intensity Register

The MAX7316 must be protected from the negative
voltage transient generated when switching off induc­tive loads, such as relays, by connecting a reverse­biased diode across the inductive load (Figure 19). The
peak current through the diode is the inductive load’s
operating current.

Power-Supply Considerations

The MAX7316 operates with a power-supply voltage of
2V to 3.6V. Bypass the power supply to GND with at
least 0.047µF as close to the device as possible.

REGISTER

MASTER AND GLOBAL INTENSITY

Write master and global intensity 0

Read back master and global intensity 1

Master intensity duty cycle is 0/15 (off);

internal oscillator is disabled;

all outputs will be static with no PWM

Master intensity duty cycle is 1/15 — 0001————

Master intensity duty cycle is 2/15 — 0010————

Master intensity duty cycle is 3/15 — 0011————

— — ————————

Master intensity duty cycle is 13/15 — 1101————

Master intensity duty cycle is 14/15 — 1110————

Master intensity duty cycle is 15/15 (full) — 1111————

O8 intensity duty cycle is 1/16 — ———— 0000

O8 intensity duty cycle is 2/16 — ———— 0001

O8 intensity duty cycle is 3/16 — ———— 0010

— — ————————

O8 intensity duty cycle is 14/16 — ———— 1101

O8 intensity duty cycle is 15/16 — ———— 1110

O8 intensity duty cycle is 16/16

(static output, no PWM)

ADDRESS

CODE

R/W

(HEX)

— 0000————

0X0E

—

D7 D6 D5 D4 D3 D2 D1 D0

MSB LSB MSB LSB

MASTER INTENSITY O8 INTENSITY

M3 M2 M1 M0 G3 G2 G1 G0

———— 1111

REGISTER DATA

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________________________ 21

Table 14. Output Intensity Registers

REGISTER DATA

REGISTER

ADDRESS

CODE

(HEX)

D7 D6 D5 D4 D3 D2 D1 D0

LSB

OUTPUTS P1, P0 INTENSITY

R/W

OUTPUT P1 INTENSITY OUTPUT P0 INTENSITY

Write output P1, P0 intensity

Read back output P1, P0 intensity

P0I0

Output P1 intensity duty cycle is 1/16

0000————

Output P1 intensity duty cycle is 2/16

0001————

Output P1 intensity duty cycle is 3/16

0010————

—

————————

Output P1 intensity duty cycle is 14/16

1101————

Output P1 intensity duty cycle is 15/16

1110————

Output P1 intensity duty cycle is 16/16

(static logic level, no PWM)

1111————

Output P0 intensity duty cycle is 1/16

———— 0000

Output P0 intensity duty cycle is 2/16

———— 0001

Output P0 intensity duty cycle is 3/16

———— 0010

—

————————

Output P0 intensity duty cycle is 14/16

———— 1101

Output P0 intensity duty cycle is 15/16

———— 1110

Output P0 intensity duty cycle is 16/16

(static logic level, no PWM)

0x10

———— 1111

LSB

OUTPUTS P3, P2 INTENSITY

OUTPUT P3 INTENSITY OUTPUT P2 INTENSITY

Write output P3, P2 intensity

Read back output P3, P2 intensity

0x11

P2I0

LSB

OUTPUTS P5, P4 INTENSITY

OUTPUT P5 INTENSITY OUTPUT P4 INTENSITY

Write output P5, P4 intensity

Read back output P5, P4 intensity

0x12

P4I0

LSB

OUTPUTS P7, P6 INTENSITY

OUTPUT P7 INTENSITY OUTPUT P6 INTENSITY

Write output P7, P6 intensity

Read back output P7, P6 intensity

0x13

P6I0

OUTPUT O8 INTENSITY See master, O8 intensity register (Table 13).

—

—

—

—

—

—

—

—

—

—

—

—

—

—

MSB LSB MSB

0

1

P1I3 P1I2 P1I1 P1I0 P0I3 P0I2 P0I1

0

1

0

1

0

1

MSB LSB MSB

P3I3 P3I2 P3I1 P3I0 P2I3 P2I2 P2I1

MSB LSB MSB

P5I3 P5I2 P5I1 P5I0 P4I3 P4I2 P4I1

MSB LSB MSB

P7I3 P7I2 P7I1 P7I0 P6I3 P6I2 P6I1

MAX7316

10-Port I/O Expander with LED Intensity
Control and Interrupt

22 ______________________________________________________________________________________

Figure 19. Diode-Protected Switching Inductive Load

Pin Configurations (continued)

Chip Information

TRANSISTOR COUNT: 17,611

PROCESS: BiCMOS

2V TO 3.6V

0.047µF

µC

SDA
SCL

I/O
I/O

INT

SDA
SCL
BLINK
RST
INT/08

AD0

V+

MAX7316

GND

P0
P1
P2
P3
P4
P5
P6
P7

BAS16

5V

TOP VIEW

BLINK

RST

AD0

P1

P2

P3

1

2

3

4

MAX7316AEE

5

6

7

8

16

V+

15

SDA

14

SCL

13

INT/08P0

12

P7

11

P6

10

P5

9

P4GND

QSOP

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

______________________________________________________________________________________ 23

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)

QSOP.EPS

PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH

1

21-0055

E

1

MAX7316

10-Port I/O Expander with LED Intensity
Control and Interrupt

24 ______________________________________________________________________________________

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)

C

L

- A -

0.10

D2

D

D/2

E/2

E

- B -

C

L

C

A

A2

A1

0.08

C

L

(NE - 1) X e

C

L

e

D2/2

e

b

0.10 M C A B

k

(ND - 1) X e

C

L

e

E2/2

E2

L

L

12x16L QFN THIN.EPS

PROPRIETARY INFORMATION

TITLE:

PACKAGE OUTLINE
12 & 16L, QFN THIN, 3x3x0.8 mm

21-0136

REV.DOCUMENT CONTROL NO.APPROVAL

1

C

2

MAX7316

10-Port I/O Expander with LED Intensity

Control and Interrupt

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25

© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)

NOTES:

1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.

2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.

3. N IS THE TOTAL NUMBER OF TERMINALS.

4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO
JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED
WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE.

5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm
FROM TERMINAL TIP.

6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.

7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.

8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.

9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.

EXPOSED PAD VARIATIONS

PROPRIETARY INFORMATION

TITLE:

PACKAGE OUTLINE

12 & 16L, QFN THIN, 3x3x0.8 mm

APPROVAL

DOCUMENT CONTROL NO.

21-0136

REV.

2

C

2

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