MAXIM MAX7304 User Manual

19-5949; Rev 1; 3/12

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

General Description

The MAX7304 consists of 16 port GPIOs, with 12 pushpull GPIOs and four open-drain GPIOs configurable as PWM-controlled LED drivers. The device supports a

1.62V to 3.6V separate power supply for level translation. An address-select input (AD0) allows up to four unique slave addresses for the device.

Each GPIO can be programmed to one of the two externally applied logic voltage levels. PORT15–PORT12 can also be configured as LED drivers that feature constant-current sinks and PWM intensity control with the internal oscillator. The maximum constant-current level for each open-drain LED port is 20mA. The intensity of the LED on each open-drain port can be individually adjusted through a 256-step PWM control. The port also features LED fading.

The same index rows and columns in the device can be used as a direct logic-level translator.

The device is offered in a 24-pin (3.5mm x 3.5mm) TQFN package with an exposed pad, and a small 25-bump (2.159mm x 2.159mm) wafer-level package (WLP) for cell phones, pocket PCs, and other portable consumer electronic applications.

The device operates over the -40NC to +85NC extended temperature range.

Applications

Cell Phones

Notebooks

PDAs

Handheld Games

Portable Consumer Electronics

Features

S Four LED Driver Pins on PORT15–PORT12

S Integrated High-ESD Protection

±8kV IEC 61000-4-2 Contact Discharge

±15kV IEC 61000-4-2 Air-Gap Discharge

S 5V Tolerant, Open-Drain I/O Ports Capable of

Constant-Current LED Drive

S 256-Step PWM Individual LED Intensity-Control

Accuracy

S Individual LED Blink Rates and Common LED

Fade-In /Out Rates from 256ms to 4096ms

S User-Configurable Debounce Time (1ms to 32ms) S Configurable Edge-Triggered Port Interrupt (INT)

S 1.62V to 3.6V Operating Supply Voltage

S Individually Programmable GPIOs to Two Logic

Levels

S 8-Channel Individual Programmable Level

Translators

S Supports Hot Insertion

S 400kbps, 5.5V Tolerant I2C Serial Interface with

Selectable Bus Timeout

Ordering Information appears at end of data sheet.

For related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX7304.related.

Typical Operating Circuit

+1.8V

+2.6V

V

CC

LA

PORT0

PORT1

MAX7304

INT

MCU

_________________________________________________________________ Maxim Integrated Products 1

SDA

SCL

AD0

GND

PORT13

PORT14

PORT15

14

GPIO

+5V

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

ABSOLUTE MAXIMUM RATINGS

V

CC, VLA

PORT11–PORT0 to GND .......................... -0.3V to (VCC + 0.3V)

PORT15–PORT12 to GND ....................................... -0.3V to +6V

SDA, SCL, AD0, INT to GND ..................................-0.3V to +6V

VLA to VCC ...........................................................-0.3V to +2.3V

DC Current on PORT15–PORT12 to GND .........................25mA

DC Current on PORT11–PORT0 to GND .............................7mA

VCC, VLA, GND Current .....................................................80mA

DC Current VCC, VLA to PORT11–PORT0 ...........................5mA

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

PACKAGE THERMAL CHARACTERISTICS (Note 1)

TQFN

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-

to GND ....................................................-0.3V to +4V

Junction-to-Ambient Thermal Resistance (BJA) ....65.1NC/W

Junction-to-Case Thermal Resistance (BJC) ...........5.4NC/W

layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.

Continuous Power Dissipation (TA = +70NC)

TQFN (derate 15.4mW/NC above +70NC)..................1229mW

WLP (derate 19.2mW/NC above +70NC)......................850mW

Operating Temperature Range .......................... -40NC to +85NC

Junction Temperature .....................................................+150NC

Storage Temperature Range ............................ -65NC to +150NC

Lead Temperature (TQFN) (soldering, 10s) ....................+300NC

Soldering Temperature (reflow) ......................................+260NC

WLP

Junction-to-Ambient Thermal Resistance (BJA) .......52NC/W

ELECTRICAL CHARACTERISTICS

(VCC = 1.62V to 3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Operating Supply Voltage V

Second Logic Supply V

Operating Supply Current I

Sleep-Mode Supply Current I

POR Threshold V

GPIO SPECIFICATIONS

External Supply Voltage PORT15–PORT12 (LED Drivers)

LED Port-to-Port Sink Current Variation

10mA Port Sink Current PORT15–PORT12

20mA Port Sink Current PORT15–PORT12

Input High Voltage PORT_ V Input Low Voltage PORT_ V

Input Leakage Current PORT11–PORT0

Input Leakage Current PORT15–PORT12

V

I

LEAKAGE

I

LEAKAGE

CC

LA

CC

SL

POR

LED

I

OL

I

OL

IH

IL

Oscillator running 50 65

Not using GPO or LED configuration 1.8 3

VCC = 3.3V, VOL = 1V, TA = +25NC, 10mA output mode

VOL = 1V

VOL = 0.5V

VOL = 1V

VOL = 0.5V

VS = V CC or VLA depending on reference logic level setting

Input voltage = VCC or V

Input voltage = 5V -1 +1

TA = +25NC

VCC = 3.6V, TA = +25NC TA = +25NC

VCC = 3.6V, TA = +25NC

GND

1.62 3.3 3.6 V

V

CC

8.6 11.4

18.13 21.52

0.7 O V

-2 +2

3.3 3.6 V

1.2 V

5 V

Q1.5 Q2.4

9.5

19.05

S

0.3 O V

S

FA

%

mAVCC = 3.3V 9.04 10 10.96

mAVCC = 3.3V 18.47 20 21.34

V V

FA

_________________________________________________________________ Maxim Integrated Products 2

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 1.62V to 3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Input Capacitance PORT_ C

Output Low Voltage PORT_ V

Output High Voltage COL3–COL0, ROW_

Output Logic-Low Voltage (INT)

PWM Frequency f

SERIAL-INTERFACE SPECIFICATIONS

Input High Voltage SDA, SCL, AD0

Input Low Voltage SDA, SCL, AD0

Input Leakage Current SDA, SCL, AD0

Output Logic-Low Voltage SDA

Input Capacitance SDA, SCL, AD0

I2C TIMING SPECIFICATIONS

SCL Serial-Clock Frequency f

Bus Free Time Between a STOP and START Condition

Hold Time (Repeated) START Condition

Repeated START Condition Setup Time

STOP Condition Setup Time t

Data Hold Time t

Data Setup Time t

SCL Clock Low Period t

SCL Clock High Period t

Rise Time of Both SDA and SCL Signals, Receiving

Fall Time of Both SDA and SCL Signals, Receiving

Fall Time of SDA Signal, Transmitting

I

LEAKAGE

t

HD, STA

t

SU, STA

SU, STO

HD, DAT

SU, DAT

t

IN

OL

V

OH

V

OL

PWM

V

IH

V

IL

V

OL

C

IN

SCL

t

BUF

LOW

HIGH

t

R

t

F

F, TX

VCC = 1.62V and I VCC = 1.62V and I

VCC = 1.62V and I

I

= 6mA 0.6 V

SINK

Derived from oscillator clock 500 Hz

Input voltage = 5.5V or V

I

= 6mA 0.6 V

SINK

(Notes 4, 5) 10 pF

Bus timeout enabled 0.05 400 Bus timeout disabled 0 400

(Note 6) 0.9

(Notes 4, 5)

(Notes 4, 7)

= 2.5mA 50 100

SINK

= 5mA 80 250

SINK

SOURCE

= 2.5mA

= 5mA

GND

VCC -

120

VCC -

250

0.7 O V

-1 +1

1.3

0.6

100 ns

1.3

0.7

20 pF

VCC -

40

VCC -

70

CC

0.3 O V

20 +

0.1C

20 +

0.1C

20 +

0.1C

B

300 ns

250 ns

CC

mV

V

FA

kHz

Fs

_________________________________________________________________ Maxim Integrated Products 3

MAX7304

02

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 1.62V to 3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Pulse Width of Spike Suppressed t

Capacitive Load for Each Bus Line C

Bus Timeout t

SP

B

TIMEOUT

ESD PROTECTION

PORT_

All Other Pins Human Body Model

Note 2: All parameters are tested at TA = +25NC. Specifications over temperature are guaranteed by design. Note 3: All digital inputs at VCC or GND. Note 4: Guaranteed by design. Note 5: CB = total capacitance of one bus line in pF. tR and tF measured between 0.8V and 2.1V. Note 6: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge

the undefined region of SCL’s falling edge.

Note 7: I

= 6mA. CB = total capacitance of one bus line in pF. tR and tF measured between 0.8V and 2.1V.

SINK

Note 8: Input filters on the SDA, SCL, and AD0 inputs suppress noise spikes less than 50ns.

(Notes 4, 8) 50 ns

(Note 4) 400 pF

14 19 27 ms

IEC 61000-4-2 Air-Gap Discharge IEC 61000-4-2 Contact Discharge

Q15

Q8

Q2.5

kV

(VCC = 2.5V, VLA = 2.5V, TA = +25NC, unless otherwise noted.)

GPO OUTPUT LOW VOLTAGE

vs. SINK CURRENT (PORT15–PORT12)

120

VCC = 2.4V

100

80

60

40

GPO OUTPUT LOW VOLTAGE (mV)

20

0

TA = +25°C

SINK CURRENT (mA)

TA = +85°C

TA = -40°C

120

100

MAX7304 toc01

80

60

40

GPO OUTPUT LOW VOLTAGE (mV)

20

18161412108642

0

GPO OUTPUT LOW VOLTAGE

vs. SINK CURRENT (PORT15–PORT12)

VCC = 3.0V

0

Typical Operating Characteristics

TA = +85°C

TA = +25°C

SINK CURRENT (mA)

TA = -40°C

GPO OUTPUT LOW VOLTAGE

vs. SINK CURRENT (PORT15–PORT12)

120

VCC = 3.6V

100

MAX7304 toc02

80

60

40

GPO OUTPUT LOW VOLTAGE (mV)

20

18161412108642

0

TA = +25°C

SINK CURRENT (mA)

TA = +85°C

TA = -40°C

MAX7304 toc03

18161412108642

0

_________________________________________________________________ Maxim Integrated Products 4

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Typical Operating Characteristics (continued)

(VCC = 2.5V, VLA = 2.5V, TA = +25NC, unless otherwise noted.)

SLEEP-MODE SUPPLY CURRENT

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

SLEEP-MODE SUPPLY CURRENT (µA)

0.2

0

1.6 3.6

vs. OUTPUT VOLTAGE (PORT15– PORT12)

25

20

15

10

vs. SUPPLY VOLTAGE

TA = +25°C

SUPPLY VOLTAGE (V)

CONSTANT-CURRENT GPIO

OUTPUT SINK CURRENT

VCC = 3.0V

TA = -40°C

TA = +25°C

TA = +85°C

MAX7304 toc04

TA = -40°C

3.43.22.8 3.02.0 2.2 2.4 2.61.8

MAX7304 toc06

TA = +85°C

MAX7304

I2C-Interfaced 16-Port,

CONSTANT-CURRENT GPIO OUTPUT

SINK CURRENT vs. OUTPUT VOLTAGE

25

20

15

10

5

0

CONSTANT-CURRENT GPIO OUTPUT SINK CURRENT (mA)

0 3.0

vs. OUTPUT VOLTAGE (PORT15–PORT12)

25

20

15

10

(PORT15–PORT12)

VCC = 2.4V

TA = -40°C

TA = +25°C

OUTPUT VOLTAGE (V)

CONSTANT-CURRENT GPIO

OUTPUT SINK CURRENT

VCC = 3.6V

TA = -40°C

TA = +25°C

MAX7304 toc05

TA = +85°C

2.52.01.51.00.5

MAX7304 toc07

TA = +85°C

5

0

CONSTANT-CURRENT GPIO OUTPUT SINK CURRENT (mA)

0 3.0

OUTPUT VOLTAGE (V)

2.52.01.51.00.5

5

0

CONSTANT-CURRENT GPIO OUTPUT SINK CURRENT (mA)

0 3.0

OUTPUT VOLTAGE (V)

2.52.01.51.00.5

_________________________________________________________________ Maxim Integrated Products 5

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Pin/Bump Configurations

TOP VIEW

PORT0

PORT1

PORT2

PORT3

GND

PORT4

19

20

21

22

23

24

CC

INT

V

SCL

1718 16 14 13

15

MAX7304

+

12

3

456

SDA

*EP

AD0

(BUMPS SIDE DOWN)

LA

V

1234

+

A

12

PORT8

PORT9

11

PORT10

10

9

PORT11

GND

8

PORT12

7

PORT4

B

GND

C

PORT3

D

PORT1

PORT5 PORT7 PORT14 PORT13

PORT6 PORT15 PORT12 GND

PORT2 GND PORT10 PORT11

MAX7304

V

CC

SDA

V

LA

5

PORT9

PORT6

PORT5

*CONNECT EP TO GROUND.

PORT7

TQFN

PORT15

PORT14

PORT13

E

PORT0

INT

SCL AD0 PORT8

WLP

Pin/Bump Description

PIN BUMP

TQFN WLP

1 A2 PORT5 GPIO Port 5. Push-pull I/O. 2 B2 PORT6 GPIO Port 6. Push-pull I/O. 3 A3 PORT7 GPIO Port 7. Push-pull I/O. 4 B3 PORT15 GPIO Port 15. Open-drain I/O. PORT15 can be configured as a constant-current sink. 5 A4 PORT14 GPIO Port 14. Open-drain I/O. PORT14 can be configured as a constant-current sink. 6 A5 PORT13 GPIO Port 13. Open-drain I/O. PORT13 can be configured as a constant-current sink. 7 B4 PORT12 GPIO Port 12. Open-drain I/O. PORT12 can be configured as a constant-current sink.

8, 23 B1, B5, C3 GND Ground

9 C5 PORT11 GPIO Port 11. Push-pull I/O. 10 C4 PORT10 GPIO Port 10. Push-pull I/O. 11 D5 PORT9 GPIO Port 9. Push-pull I/O. 12 E5 PORT8 GPIO Port 8. Push-pull I/O. 13 D4 V 14 E4 AD0 Address Input. Selects up to four device slave addresses (Table 2). 15 D3 SDA I2C-Compatible, Serial-Data I/O 16 E3 SCL I2C-Compatible Serial-Clock Input

17 E2

NAME FUNCTION

LA

Second Logic Level for GPIO Level Shifting (where VCC P VLA P 3.6V)

INT Active-Low Key-Switch Interrupt Output. INT is open-drain and requires a pullup resistor.

_________________________________________________________________ Maxim Integrated Products 6

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Pin Description (continued)

PIN BUMP

TQFN WLP

18 D2 V

NAME FUNCTION

CC

Positive Supply Voltage. Bypass to GND with a 0.1FF capacitor as close as possible to the device.

19 E1 PORT0 GPIO Port 0. Push-pull I/O. 20 D1 PORT1 GPIO Port 1. Push-pull I/O. 21 C2 PORT2 GPIO Port 2. Push-pull I/O. 22 C1 PORT3

GPIO Port 3. Push-pull I/

24 A1 PORT4 GPIO Port 4. Push-pull I/O.

— — EP

MAX7304

Exposed Pad (TQFN Only). Internally connected to GND. Connect to a large ground plane to maximize thermal performance. Not intended as an electrical connection point.

PWM

LOGIC

O.

I/0 SUPPLY CONTROL

LED ENABLE

PWM SIGNAL

VCCV

Functional Diagram

LA

INT

SDA

SCL

AD0

I2C

INTERFACE

BUS

TIMEOUT

128kHz

OSCILLATOR

CONTROL

REGISTERS

FIFO

POR

I/O

LOGIC

GPIO ENABLE

GPIO INPUT

GPIO OUTPUT

GPIO ENABLE

GPIO INPUT

GPIO OUTPUT

OPEN-DRAIN

GPIO/LED

DRIVERS

PUSH-PULL

GPIO

4

12

PORT15–PORT12

PORT11–PORT10

_________________________________________________________________ Maxim Integrated Products 7

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Detailed Description

constant-current and PWM intensity control. The maximum

constant-current level for each open-drain LED port is The MAX7304 is an I2C-interfaced 16-port GPIO expander. The device features 12 push-pull GPIOs configured for digital I/O and four open-drain GPIOs configurable as constant-current outputs for LED applications up to 5V. The device supports a second 1.62V to 3.6V power supply for level translation. The second logic supply

20mA. The intensity of the LED on each open-drain port

can be individually adjusted through a 256-step PWM

control. The port also features LED fading.

The device meets ESD requirements for Q8kV contact

discharge and Q15kV air-gap discharge on all port pins

(configured as GPIO and/or LED drivers). voltage (VLA) must be set equal to or higher than VCC.

Each GPIO can be programmed to one of the two externally applied logic voltage levels. PORT15–PORT12 can also be configured as LED drivers that feature

On power-up, all control registers reset to power-up

values (Table 1) and the device is in sleep mode.

Table 1. Register Address Map and Power-Up Conditions

ADDRESS

CODE (hex)

0x01 0x31 0x34 0x35

0x36

0x37

0x38

0x39

0x3A 0x3B 0x3C

0x40

0x42

0x43

0x45 0x48 Read only 0x00 I2C timeout flag I2C timeout since last POR 0x50 0x51 0x52 0x53

READ/

WRITE

R/W R/W R/W R/W

R/W

R/W R/W R/W

R/W

R/W R/W R/W R/W

POWER-UP

VALUE (hex)

0x0B Configuration Power-down and I2C timeout enable 0x00 LED driver enable LED driver enable register 0x00 GPIO direction 1 GPIO input/output control register 1 for PORT7–PORT0 0x00 GPIO direction 2 GPIO input/output control register 2 for PORT15–PORT8

0xFF GPO output mode 1

0x0F GPO output mode 2

0x00 GPIO supply voltage 1

0x00 GPIO supply voltage 2

0xFF GPIO values 1 Debounced input or output values of PORT7–PORT0 0xFF GPIO values 2 Debounced input or output values of PORT15–PORT8 0x00 GPIO level-shifter enable GPIO level-shifter pair enable

0x00

0x00 GPIO debounce PORT7–PORT0 debounce time setting

0xC0

0x00 Common PWM Common PWM duty-cycle setting

0x00 PORT12 PWM ratio PORT12 individual duty-cycle setting 0x00 PORT13 PWM ratio PORT13 individual duty-cycle setting 0x00 PORT14 PWM ratio PORT14 individual duty-cycle setting 0x00 PORT15 PWM ratio PORT15 individual duty-cycle setting

REGISTER FUNCTION

GPIO global

configuration

LED constant-current

setting

GPO open-drain/push-pull output setting for PORT7–PORT0

GPO open-drain/push-pull output setting for PORT15–PORT8

GPIO voltages supplied by VCC or VLA for PORT7–PORT0

GPIO voltages supplied by VCC or VLA for PORT15–PORT8

GPIO standby, GPIO reset, LED fade

PORT15–PORT12 constant-current output setting

Initial Power-Up

DESCRIPTION

_________________________________________________________________ Maxim Integrated Products 8

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 1. Register Address Map and Power-Up Conditions (continued)

MAX7304

ADDRESS

CODE (hex)

0x54

0x55

0x56

0x57

0x58 0x59

0x5A

0x5B

READ/ WRITE

R/W

R/W R/W

R/W

POWER-UP

VALUE (hex)

0x00

0xFF Interrupt mask 1 Interrupt mask for PORT7–PORT0 0xFF Interrupt mask 2 Interrupt mask for PORT15–PORT8

0x00 GPI trigger mode 1

0x00 GPI trigger mode 2

REGISTER FUNCTION

PORT12 LED configuration

PORT13 LED configuration

PORT14 LED configuration

PORT15 LED configuration

GPIOs

The device has 16 GPIO ports, of which four have LED control functions. The ports can be used as logic inputs and logic outputs. PORT15–PORT12 are also configurable as constant-current PWM LED drivers. Each ports’ logic level is referenced to VCC or VLA. The GPIO port’s inputs can also be debounced. When in PWM mode, the ports are set up to start their PWM cycle in 45N phase increments. This prevents large current spikes on the LED supply voltage when driving multiple LEDs.

Configuration Register (0x01)

The configuration register controls the I2C bus timeout feature (see Table 5 in the Register Tables section). The bus timeout feature prevents the SDA being held low when the SCL line hangs.

LED Driver Enable Register (0x31)

Bits D[3:0] correspond to PORT15–PORT12 on the device. Set the corresponding bit to 1 for enabling the LED driver circuitry and 0 for normal GPIO function (see

Table 6 in the Register Tables section).

GPIO Direction 1 and 2 Registers (0x34, 0x35)

These registers configure the pin as an input or an output. GPIO direction 1 register bits D[7:0] correspond with PORT7–PORT0 (see Table 7 in the Register Tables section). GPIO direction 2 register bits D[7:0] correspond with PORT15–PORT8 (see Table 8 in the Register Tables section). Set the corresponding bit to 0 to configure as input and 1 to configure as output.

DESCRIPTION

PORT12 interrupt, PWM mode control, and blinkperiod settings

PORT13 interrupt, PWM mode control, and blinkperiod settings

PORT14 interrupt, PWM mode control, and blinkperiod settings

PORT15 interrupt, PWM mode control, and blinkperiod settings

GPI edge-triggered detection setting for PORT7–PORT0

GPI edge-triggered detection setting for PORT15–PORT8

When the port is initially programmed as an input, there

is a delay of one debounce period prior to detecting

a transition on the input port. This is to prevent a false

interrupt from occurring when changing a port from an

output to an input.

GPO Output Mode 1 and 2 Registers (0x36, 0x37)

These registers configure the pins as an open-drain or

push-pull output. GPO output mode 1 register bits D[7:0]

correspond with PORT7–PORT0 (see Table 9 in the

Register Tables section). GPO output mode 2 register

bits D[7:0] correspond with PORT15–PORT8 (see Table

10 in the Register Tables section). Set the corresponding

bit to 0 to configure the output mode as open-drain and

1 to configure the output mode as push-pull.

GPIO Supply Voltage 1 and 2

Registers (0x38, 0x39)

These registers configure input and output voltages

to be referenced to VCC or VLA. GPIO supply voltage

1 register bits D[7:0] correspond with PORT7–PORT0

(see Table 11 in the Register Tables section). GPIO

supply voltage 2 register bits D[7:0] correspond with

PORT15–PORT8 (see Table 12 in the Register Tables

section). Set the bit to 0 for input/output voltages

referenced to VCC and set the bit to 1 for the input/output

voltage referenced to VLA.

_________________________________________________________________ Maxim Integrated Products 9

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

GPIO Values 1 and 2 Registers (0x3A, 0x3B)

The GPIO values 1 and 2 registers contain the debounced input data for all the GPIOs for PORT7–PORT0 and PORT15–PORT8, respectively (see Tables 13 and 14 in the Register Tables section). There is one debounce period delay prior to detecting a transition on the input port. This prevents a false interrupt from occurring when changing a port from an output to an input. The GPIO values 1 and 2 registers reports the state of all input ports regardless of any interrupt mask settings.

When writing to the GPIO values 1 and 2 registers, the corresponding PORT_ voltage is set high when written 1 or cleared when written 0. Reading the port when configured as an output always returns the value 0 for the corresponding port regardless of the output value.

GPIO Level-Shifter Enable Register (0x3C)

Enabling bit D_ in this register enables the direct level shifter between GPIO pins PORT15–PORT8 and PORT7–PORT0 (see Table 15 in the Register Tables section). The level-shifting pairs are PORT0/PORT8, PORT1/ PORT9, etc. The direction of the level shifter is controlled by the GPIO direction 2 register (0x35). When the corresponding bit in the GPIO direction 2 register is set to 0, PORT15–PORT8 are inputs, while PORT7–PORT0 are outputs. When the bit is set to 1, PORT7–PORT0 are inputs, while PORT15–PORT8 are outputs.

GPIO Global Configuration Register (0x40)

The GPIO global configuration register controls the main settings for the GPIO ports (see Table 16 in the Register

Tables section).

Bit D5 enables interrupt generation for I2C timeouts. D4 is the main enable/shutdown bit for the GPIOs. Bit D3 functions as a software reset for the GPIO registers (0x31 to 0x5B). Bits D[2:0] set the fade-in/out time for the GPIOs configured as constant-current sinks.

GPIO Debounce Configuration Register (0x42)

The GPIO debounce configuration register sets the amount of time a GPIO must be held in order for the device to register a logic transition (see Table 17 in the Register Tables section). Five bits (D[4:0]) set 32 possible debounce times from 9ms up to 40ms.

LED Constant-Current Setting Register (0x43)

The LED constant-current setting register sets the global constant-current level (see Table 18 in the Register

Tables section). Bit D0 selects the global current values

between 10mA and 20mA. This setting only applies to the LED driver enabled pins, PORT15–PORT12.

Common PWM Ratio Register (0x45)

The common PWM ratio register stores the common con-

stant-current output PWM duty cycle (see Table 19 in the

Register Tables section). The values stored in this register

translate over to a PWM ratio in the same manner as the

individual PWM ratio registers (0x50 to 0x53). Ports can use

their own individual PWM value or the common PWM value.

Write to this register to change the PWM ratio of several

ports at once.

2

I

C Timeout Flag Register (0x48) (Read Only)

The I2C timeout flag register contains a single bit (D0),

which indicates if an I2C timeout has occurred (see Table

20 in the Register Tables section). Read this register to

clear an I2C timeout initiated interrupt.

PORT12–PORT15 Individual PWM Ratio

Registers (0x50 to 0x53)

Each LED driver port has an individual PWM ratio reg-

ister, 0x50 to 0x53 (see Table 21 in the Register Tables

section). Use values 0x00 to 0xFE in these registers to

configure the number of cycles out of 256 the output

sinks current (LED is on), from 0 cycles to 254 cycles.

Use 0xFF to have an output continuously sink current

(always on). For applications requiring multiple ports

to have the same intensity, program a particular port’s

configuration register (0x54 to 0x57) to use the common

PWM ratio register (0x45). New PWM settings take place

at the beginning of a PWM cycle, to allow changes from

common intensity to individual intensity with no interrup-

tion in the PWM cycle.

PORT12–PORT15 LED Configuration

Registers (0x54 to 0x57)

Registers 0x54 to 0x57 set individual configurations for

each port (see Table 22 in the Register Tables section).

D5 sets the port’s PWM setting to either the common or

individual PWM setting. Bits D[4:2] enable and set the

port’s individual blink period from 0 to 4096ms. Bits D1

and D0 set a port’s blink duty cycle.

Interrupt Mask 1 and 2 Registers (0x58, 0x59)

The interrupt mask 1 and 2 registers control which ports

trigger an interrupt for PORT7–PORT0 and PORT15–

PORT8, respectively (see Tables 23 and 24 in the

Register Tables section). Set the bit to 0 to enable the

interrupt. Set the bit to 1 to mask the interrupt.

If the port that has generated the interrupt is not masked,

the interrupt causes the INT signal to assert. A read of the

GPIO values 1 and 2 registers (0x3A, 0x3B) is required

to deassert the INT pin. Note that transitions that occur

while the INT signal is asserted, but before the read of

________________________________________________________________ Maxim Integrated Products 10

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

the values 1 and 2 registers, sets the appropriate bit of the values 1 and 2 registers only, but has no effect on the INT pin as it is already asserted. However, transitions that occur when the I2C is active cannot be latched into the values 1 and 2 registers until after the read has taken place. If there are transitions that cause the INT signal to assert, during the time of an I2C read, they cause the INT signal to reassert once the read transaction has taken place. Note that the interrupt configurations only apply when a port is configured as an input.

GPI Trigger Mode 1 and 2 Registers (0x5A, 0x5B)

The GPI trigger mode 1 and 2 registers control how ports can trigger an interrupt for PORT7–PORT0 and PORT15–PORT8, respectively (see Tables 25 and 26 in the Register Tables section). Set the bit to 0 for risingedge triggering. Set the bit to 1 for rising- and fallingedge triggering.

The inputs are debounced (if enabled) by taking a snapshot of the port state when the transition occurs, and another after the debounce time has elapsed—ensuring that the state of the port is stable prior to triggering the interrupt. After the debounce cycle, an interrupt is generated and the INT pin asserts if it is not masked for that particular port. Regardless of whether or not the INT signal is masked, the GPIO values 1 and 2 registers (0x3A, 0x3B) report the state of all input ports.

Sleep Mode

The device is put into sleep mode by clearing bit D4 in the GPIO global configuration register (0x40). In sleep mode, the device draws minimal current. The device is taken out of sleep mode and put into operating mode by setting bit D4 in the GPIO configuration register. When the GPIOs are enabled, the part is in operating mode.

In sleep mode, the internal oscillator and I2C timeout features are disabled.

LED Fade

Set the fade cycle time in the GPIO global configuration register (0x40) to a non-zero value to enable fade in/out (see Table 16 in the Register Tables section). Fade in increases an LED’s PWM intensity in 16 even steps, from zero to its stored value. Fade out decreases an LED’s PWM intensity in 16 even steps, from its current value to zero. Fading occurs automatically in any of the following scenarios:

1) Change the common PWM register value from any value to zero to cause all ports using the common PWM register settings to fade out. No ports using individual PWM settings are affected.

2) Change the common PWM register value to any value from zero to cause all ports using the common PWM register settings to fade in. No ports using individual PWM settings are affected.

3) Take the part out of sleep mode to cause all ports to fade in. Changing an individual PWM intensity during fade in automatically cancels that port’s fade and immediately outputs at its newly programmed intensity.

4) Put the part into sleep mode to cause all ports to fade out. Changing an individual PWM intensity during fade out automatically cancels that port’s fade and immediately turns off.

LED PWM

Each port has an individual PWM ratio register. The value stored in this register configures the number of cycles out of 255 that the output is sinking current (LED is on). Setting a value of 0xFF in an individual intensity register sets the output to continuously sink current (always on). Conversely, setting a value of 0x00 in an individual intensity register sets the output in a high-impedance state (always off).

For applications requiring multiple ports to have the same intensity, the common PWM ratio intensity setting can be used in lieu of the individual intensity setting. To use the common intensity setting, program bit D5 of the corresponding port’s configuration register to logic-high. Setting a port to use the common PWM ratio setting copies the value of the common intensity register into the individual intensity register at the beginning of each PWM cycle. This allows an output port to be seamlessly changed from common intensity to individual intensity with no interruption in the PWM cycle.

Outputs are configured to sink a constant current of either 10mA or 20mA during the period when the output is on. The setting in the individual constant-current setting register (0x43) controls the value of the current.

________________________________________________________________ Maxim Integrated Products 11

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

LED Blink

Each LED driver-supported port has its own blink-control settings through registers 0x54 to 0x57 (see Table 22 in the Register Tables section). The blink period ranges from 0 (blink disabled) to 4.096s. Settable blink duty cycles range from 6.25% to 50%. All blink periods start at the same PWM cycle for synchronized blinking between multiple ports.

Each port has its own counter to generate blink timing. The blink counter can be programmed to cause the output to gate off and on at a programmable rate. The blink period can be set to 256ms, 512ms, 1.024s, 2.048s, or 4.096s using D[4:2] of the port’s individual configuration register. The percentage of time that the LED is on for one blink cycle is set to 50%, 25%, 12.5%, or 6.25% by D[1:0] of the individual configuration register.

Interrupt

Two possible sources generate INT: I2C timeout or GPIOs configured as inputs (registers 0x48, 0x5A, and 0x5B). Read the respective data/status registers for each type of interrupt in order to clear INT. If multiple sources generate the interrupt, all the related status registers must be read to clear INT.

Serial Interface

Figure 1 shows the 2-wire serial interface timing details.

Serial Addressing

The device operates as a slave that sends and receives data through an I2C-compatible 2-wire interface. The interface uses a serial-data line (SDA) and a serialclock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and from the device and generates the SCL clock that synchronizes the data transfer.

The device’s SDA line operates as both an input and an open-drain output. A pullup resistor, typically 4.7kI, is required on SDA. The device’s SCL line operates only as an input. A pullup resistor is required on SCL if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output.

Each transmission consists of a START (S) condition (Figure 2) sent by a master, followed by the device’s 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally, a STOP (P) condition.

START and STOP Conditions

Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission.

SDA

t

LOW

SCL

t

HD, STA

START

CONDITION

Figure 1. Two-Wire Serial Interface Timing Details

________________________________________________________________ Maxim Integrated Products 12

SU, DAT

t

HIGH

t

R

F

t

HD, DAT

t

SU, STA

START CONDITION

REPEATED

t

R

t

HD, STA

t

SU, STO

t t

F F, TX

STOP

CONDITION

t

BUF

START

CONDITION

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Bit Transfer

One data bit is transferred during each clock pulse (Figure 3). The data on SDA must remain stable while SCL is high.

Acknowledge

The acknowledge bit is a clocked 9th bit (Figure 4), which the recipient uses to handshake receipt of each byte of data. Thus, each byte transferred effectively requires 9 bits.

SDA

SCL

S

START

CONDITION

Figure 2. START and STOP Conditions

SDA

The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse; therefore, the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the device, the device generates the acknowledge bit because the device is the recipient. When the device is transmitting to the master, the master generates the acknowledge bit because the master is the recipient.

P

STOP

CONDITION

SCL

Figure 3. Bit Transfer

SCL

SDA BY

TRANSMITTER

SDA BY

RECEIVER

Figure 4. Acknowledge

________________________________________________________________ Maxim Integrated Products 13

START

CONDITION

S

DATA LINE STABLE;

DATA VALID

CHANGE OF DATA

ALLOWED

CLOCK PULSE FOR

ACKNOWLEDGE

1 2 8 9

MAX7304

AA

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Slave Addresses

The device has two 7-bit long slave addresses. The bit following a 7-bit slave address is the R/W bit, which is low for a write command and high for a read command.

The first 4 bits (MSBs) of the device slave addresses are always 0111. Slave address bits A[3:1] correspond, by the matrix in Table 2, to the states of the device address input pin AD0, and A0 corresponds to the R/W bit (Figure 5). The AD0 input can be connected to any of four signals: GND, VCC, SDA, or SCL, giving four possible slave-address pairs, allowing up to four devices to share the same bus. Because SDA and SCL are dynamic signals, care must be taken to ensure that AD0 transitions no sooner than the signals on SDA and SCL.

The device monitors the bus continuously, waiting for a START condition followed by its slave address. When the device recognizes its slave address, it acknowledges and is then ready for continued communication.

Table 2. 2-Wire Interface Address Map

PIN AD0

GND

V

CC

SDA 1 0

SCL 1 1

A7 A6 A5 A4 A3 A2 A1 A0

0 1 1 1

DEVICE ADDRESS

0 0

0 1

0

R/W

Bus Timeout

The device features a 20ms (min) bus timeout on the 2-wire serial interface, largely to prevent the device from holding the SDA I/O low during a read transaction, should the SCL lock up for any reason before a serial transaction is completed. Bus timeout operates by causing the device to internally terminate a serial transaction, either read or write, if the time between adjacent edges on SCL exceeds 20ms. After a bus timeout, the device waits for a valid START condition before responding to a consecutive transmission. This feature can be enabled or disabled under user control by writing to the configuration register.

Message Format for Writing

A write to the device comprises the transmission of the slave address with the R/W bit set to zero, followed by at least one byte of information. The first byte of information is the command byte. The command byte determines which register of the device is to be written by the next byte, if received. If a STOP condition is detected after the command byte is received, the device takes no further action (Figure 6) beyond storing the command byte.

Any bytes received after the command byte are data bytes. The first data byte goes into the internal register of the device selected by the command byte (Figure 7).

If multiple data bytes are transmitted before a STOP condition is detected, these bytes are generally stored in subsequent device internal registers, because the command byte address generally autoincrements.

SDA

SCL

Figure 5. Slave Address

S

Figure 6. Command Byte Received

01 1A3A2A11

MSB

COMMAND BYTE IS STORED ON RECEIPT OF

ACKNOWLEDGE FROM MAX7304

SLAVE ADDRESS COMMAND BYTE

________________________________________________________________ Maxim Integrated Products 14

ACKR/W

LSB

ACKNOWLEDGE CONDITION

R/W

D7 D6 D5 D4 D3 D2 D1 D0

P0

ACKNOWLEDGE FROM MAX7304

MAX7304

AA

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Message Format for Reading

The device is read using the internally stored command byte as an address pointer, the same way the stored command byte is used as an address pointer for a write. The pointer generally autoincrements after each data byte is read using the same rules as for a write. Thus, a read is initiated by first configuring the device’s command byte by performing a write (Figure 6). The master can now read N consecutive bytes from the device, with the first data byte being read from the register addressed by the initialized command byte. When performing read-afterwrite verification, remember to reset the command byte’s address because the stored command byte address is generally autoincremented after the write (Figure 8).

Operation with Multiple Masters

When the device is operated on a 2-wire interface with multiple masters, a master reading the device uses a repeated START between the write that sets the device’s address pointer, and the read(s) that takes the data from the location(s). This is because it is possible for master 2 to take over the bus after master 1 has set up the device’s address pointer but before master 1 has read the data. If master 2 subsequently resets the device’s address pointer, master 1’s read can be from an unexpected location.

Command Address Autoincrementing

Address autoincrementing allows the device to be configured with fewer transmissions by minimizing the number of times the command address needs to be sent. The command address (0x31 to 0x5B) stored in the device increments after each data byte is written or read. Autoincrement only functions when doing a multiburst read or write.

Applications Information

Reset from I2C

After a catastrophic event such as ESD discharge or microcontroller reset, use bit D4 of the GPIO global configuration register (0x40) as a software reset.

Hot Insertion

The INT, SCL, and AD0 inputs and SDA remain high impedance with up to 5.5V asserted on them when the device powers down (VCC = 0V). I/O ports remain high impedance with up to 5.5V asserted on them when not powered. Use the device in hot-swap applications.

ACKNOWLEDGE FROM MAX7304

D7 D6 D5 D4 D3 D2 D1 D0 D1 D0D3 D2D5 D4D7 D6

ACKNOWLEDGE FROM MAX7304

SA

R/W

Figure 7. Command and Single Data Byte Received

ACKNOWLEDGE FROM MAX7304

SA

R/W

Figure 8. N Data Bytes Received

________________________________________________________________ Maxim Integrated Products 15

D7 D6 D5 D4 D3 D2 D1 D0 D1 D0D3 D2D5 D4D7 D6

ACKNOWLEDGE FROM MAX7304

P0SLAVE ADDRESS COMMAND BYTE DATA BYTE

N BYTES

AUTOINCREMENT

COMMAND BYTE ADDRESS

ACKNOWLEDGE FROM MAX7304

P0SLAVE ADDRESS COMMAND BYTE DATA BYTE

N BYTES

AUTOINCREMENT

COMMAND BYTE ADDRESS

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Staggered PWM

The LED’s on-time in each PWM cycle is phase delayed by 45N into four evenly spaced start positions. Optimize phasing when using fewer than four ports as constantcurrent outputs by allocating the ports with the most appropriate start positions. For example, if using two constant-current outputs, choose PORT12 and PORT14 because their PWM start positions are evenly spaced. In general, choose the ports that spread the current demand from the ports’ load supply.

Power-Supply Considerations

The device operates with a 1.62V to 3.6V power-supply voltage. Bypass the power supply VCC to GND with a

0.1FF or higher ceramic capacitor as close as possible to the device. Bypass the logic power supply (VLA) to GND with a 0.1FF or higher ceramic capacitor as close as possible to the device.

Table 3. ESD Test Levels

1A—CONTACT DISCHARGE 1B—AIR DISCHARGE

LEVEL TEST VOLTAGE (kV) LEVEL TEST VOLTAGE (kV)

1 2 1 2 2 4 2 4 3 6 3 8 4 8 4 15 X Special X Special

ESD Protection

All device pins meet the Q2.5kV Human Body Model ESD tolerances. The GPIOs meet IEC 61000-4-2 ESD protection. The IEC test stresses consist of 10 consecutive ESD discharges per polarity at the maximum specified level and below (per IEC 61000-4-2). Test criteria include:

1) The powered device does not latch up during the ESD

discharge event.

2) The device subsequently passes the final test used for

prescreening.

Tables 3 and 4 are from the IEC 61000-4-2: Edition 1.1

1999-05: Electromagnetic compatibility (EMC) Testing

and measurement techniques—Electrostatic discharge immunity test.

X = Open level. The level has to be specified in the dedicated equipment specification. If higher voltages than those shown are specified, special test equipment could be needed.

Table 4. ESD Waveform Parameters

INDICATED

LEVEL

1 2 7.5 0.7 to 1 4 2 2 4 15 0.7 to 1 8 4 3 6 22.5 0.7 to 1 12 6 4 8 30 0.7 to 1 16 8

VOLTAGE

(kV)

________________________________________________________________ Maxim Integrated Products 16

FIRST PEAK OF CURRENT

DISCHARGE Q10%

(A)

RISE TIME (tR) WITH

DISCHARGE SWITCH

(ns)

CURRENT (Q30%)

AT 30ns

(A)

CURRENT (Q30%)

AT 60ns

(A)

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Register Tables

Table 5. Configuration Register (0x01)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D[7:1] Reserved — — 0000101

D0 Timeout disable

Table 6. LED Driver Enable Register (0x31)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D[7:4] Reserved 0000 — 0000

D3 PORT15

D2 PORT14

D1 PORT13

D0 PORT12

0 I2C timeout enabled 1 I2C timeout disabled

0 GPIO function 1 LED driver enable 0 GPIO function 1 LED driver enable 0 GPIO function 1 LED driver enable 0 GPIO function 1 LED driver enable

1

0

Table 7. GPIO Direction 1 Register (0x34)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT7

D6 PORT6

D5 PORT5

D4 PORT4

D3 PORT3

D2 PORT2

D1 PORT1

D0 PORT0

0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin

0

________________________________________________________________ Maxim Integrated Products 17

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 8. GPIO Direction 2 Register (0x35)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT15

D6 PORT14

D5 PORT13

D4 PORT12

D3 PORT11

D2 PORT10

D1 PORT9

D0 PORT8

0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin 0 Set as input pin 1 Set as output pin

0

Table 9. GPO Output Mode 1 Register (0x36)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT7

D6 PORT6

D5 PORT5

D4 PORT4

D3 PORT3

D2 PORT2

D1 PORT1

D0 PORT0

0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output

1

________________________________________________________________ Maxim Integrated Products 18

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 10. GPO Output Mode 2 Register (0x37)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT15 0 Port is an open-drain output 0 D6 PORT14 0 Port is an open-drain output 0 D5 PORT13 0 Port is an open-drain output 0 D4 PORT12 0 Port is an open-drain output 0

D3 PORT11

D2 PORT10

D1 PORT9

D0 PORT8

Note: When programmed as GPO, PORT15–PORT12 are always open-drain and bits D[7:4] are not writable.

0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output 0 Port is an open-drain output 1 Port is a push-pull output

1

Table 11. GPIO Supply Voltage 1 Register (0x38)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT7

D6 PORT6

D5 PORT5

D4 PORT4

D3 PORT3

D2 PORT2

D1 PORT1

D0 PORT0

0 PORT7 supplied by V

1 PORT7 supplied by V

0 PORT6 supplied by V

1 PORT6 supplied by V

0 PORT5 supplied by V

1 PORT5 supplied by V

0 PORT4 supplied by V

1 PORT4 supplied by V

0 PORT3 supplied by V

1 PORT3 supplied by V

0 PORT2 supplied by V

1 PORT2 supplied by V

0 PORT1 supplied by V

1 PORT1 supplied by V

0 PORT0 supplied by V

1 PORT0 supplied by V

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

0

________________________________________________________________ Maxim Integrated Products 19

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 12. GPIO Supply Voltage 2 Register (0x39)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT15

D6 PORT14

D5 PORT13

D4 PORT12

D3 PORT11

D2 PORT10

D1 PORT9

D0 PORT8

0 PORT15 supplied by V

1 PORT15 supplied by V

0 PORT14 supplied by V

1 PORT14 supplied by V

0 PORT13 supplied by V

1 PORT13 supplied by V

0 PORT12 supplied by V

1 PORT12 supplied by V

0 PORT11 supplied by V

1 PORT11 supplied by V

0 PORT10 supplied by V

1 PORT10 supplied by V

0 PORT9 supplied by V

1 PORT9 supplied by V

0 PORT8 supplied by V

1 PORT8 supplied by V

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

CC

LA

0

Table 13. GPIO Values 1 Register (0x3A)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT7

D6 PORT6

D5 PORT5

D4 PORT4

D3 PORT3

D2 PORT2

D1 PORT1

D0 PORT0

0 Clear PORT7 low 1 Set PORT7 high 0 Clear PORT6 low 1 Set PORT6 high 0 Clear PORT5 low 1 Set PORT5 high 0 Clear PORT4 low 1 Set PORT4 high 0 Clear PORT3 low 1 Set PORT3 high 0 Clear PORT2 low 1 Set PORT2 high 0 Clear PORT1 low 1 Set PORT1 high 0 Clear PORT0 low 1 Set PORT0 high

1

________________________________________________________________ Maxim Integrated Products 20

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 14. GPIO Values 2 Register (0x3B)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT15

D6 PORT14

D5 PORT13

D4 PORT12

D3 PORT11

D2 PORT10

D1 PORT9

D0 PORT8

*Open-drain output, pullup resistor required.

0 Clear PORT15 low 1 Set PORT15 high* 0 Clear PORT14 low 1 Set PORT14 high* 0 Clear PORT13 low 1 Set PORT13 high* 0 Clear PORT12 low 1 Set PORT12 high* 0 Clear PORT11 low 1 Set PORT11 high 0 Clear PORT10 low 1 Set PORT10 high 0 Clear PORT9 low 1 Set PORT9 high 0 Clear PORT8 low 1 Set PORT8 high

1

Table 15. GPIO Level-Shifter Enable (0x3C)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

0 Level shifting disabled

D7 PORT7/PORT15

D6 PORT6/PORT14

D5 PORT5/PORT13

D4 PORT4/PORT12

D3 PORT3/PORT11

D2 PORT2/PORT10

1

0 Level shifting disabled

1

0 Level shifting disabled

1

0 Level shifting disabled

1

0 Level shifting disabled

1

0 Level shifting disabled

1

Level shift between PORT7 and PORT15 enabled; direction controlled by GPIO direction 2 register (0x35)

Level shift between PORT6 and PORT14 enabled; direction controlled by GPIO direction 2 register (0x35)

Level shift between PORT5 and PORT13 enabled; direction controlled by GPIO direction 2 register (0x35)

Level shift between PORT4 and PORT12 enabled; direction controlled by GPIO direction 2 register (0x35)

Level shift between PORT3 and PORT11 enabled; direction controlled by GPIO direction 2 register (0x35)

Level shift between PORT2 and PORT10 enabled; direction controlled by GPIO direction 2 register (0x35)

0

________________________________________________________________ Maxim Integrated Products 21

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 15. GPIO Level-Shifter Enable (0x3C) (continued)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

0 Level shifting disabled

D1 PORT1/PORT9

D0 PORT0/PORT8

1

0 Level shifting disabled

1

Level shift between PORT1 and PORT9 enabled; direction controlled by GPIO direction 2 register (0x35)

Level shift between PORT0 and PORT8 enabled; direction controlled by GPIO direction 2 register (0x35)

Table 16. GPIO Global Configuration Register (0x40)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D[7:6] Reserved 0 — 00

0 Disabled

D5

I2C timeout

interrupt enable

1

INT is asserted when I2C bus times out. INT is deasserted when a read is performed on the

I2C timeout flag register (0x48).

0

D4 GPIO enable

D3 GPIO reset

D[2:0] Fade-in/out time

PWM, constant-current circuits, and GPIs are shut

0

1

0 Normal operation.

1

000 No fading.

XXX

down. GPO values depend on their setting. Register 0x31 to 0x5B values are stored and cannot be changed. The entire part is shut down.

Normal GPIO operation. PWM, constant-current circuits, and GPIOs are enabled.

Return all GPIO registers (registers 0x31 to 0x5B) to their POR value. This bit is momentary and resets itself to 0 after the write cycle.

PWM intensity ramps up (down) between the common PWM value and 0% duty cycle in 16 steps over the following time period: D[2:0] = 001 = 256ms D[2:0] = 010 = 512ms D[2:0] = 011 = 1024ms D[2:0] = 100 = 2048ms D[2:0] = 101 = 4096ms D[2:0] = 110/111 = Undefined

0

000

________________________________________________________________ Maxim Integrated Products 22

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 17. GPIO Debounce Configuration Register (0x42)

REGISTER DATA

REGISTER DESCRIPTION

Power-up default setting

Debounce time is 9ms

Debounce time is 10ms 0 0 0 0 0 0 0 1 Debounce time is 11ms 0 0 0 0 0 0 1 0 Debounce time is 12ms 0 0 0 0 0 0 1 1

Debounce time is 37ms 0 0 0 1 1 1 0 0 Debounce time is 38ms 0 0 0 1 1 1 0 1 Debounce time is 39ms 0 0 0 1 1 1 1 0 Debounce time is 40ms 0 0 0 1 1 1 1 1

Table 18. LED Constant-Current Setting Register (0x43)

D7 D6 D5 D4 D3 D2 D1 D0

RESERVED DEBOUNCE TIME

0 0 0 0 0 0 0 0

⋮

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D[7:6] Reserved 11 Set always as 11 11 D[5:1] Reserved 00000 — 00000

D0

Constant-

current setting

0 Constant current is 20mA 1 Constant current is 10mA

0

Table 19. Common PWM Ratio Register (0x45)

REGISTER DATA

REGISTER DESCRIPTION

Power-up default setting

Common PWM ratio is 0/256

Common PWM ratio is 1/256 0 0 0 0 0 0 0 1 Common PWM ratio is 2/256 0 0 0 0 0 0 1 0 Common PWM ratio is 3/256 0 0 0 0 0 0 1 1

Common PWM ratio is 252/256 1 1 1 1 1 1 0 0 Common PWM ratio is 253/256 1 1 1 1 1 1 0 1 Common PWM ratio is 254/256 1 1 1 1 1 1 1 0

Common PWM ratio is 256/256 (100% duty cycle)

D7 D6 D5 D4 D3 D2 D1 D0

COMMON PWM

0 0 0 0 0 0 0 0

⋮

1 1 1 1 1 1 1 1

________________________________________________________________ Maxim Integrated Products 23

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 20. I2C Timeout Flag Register (0x48) (Read Only)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D[7:1] Reserved 0000000 — 0000000

0 No I2C timeout has occurred since last read or POR.

I2C timeout has occurred since last read or POR. This

D0 I2C timeout flag

1

bit is reset to zero when a read is performed on this register. I2C timeouts must be enabled for this function to work (see Table 5).

Table 21. PORT12–PORT15 Individual PWM Ratio Registers (0x50 to 0x53)

REGISTER DATA

REGISTER DESCRIPTION

Power-up default setting

PORT PWM ratio is 0/256

PORT PWM ratio is 1/256 0 0 0 0 0 0 0 1 PORT PWM ratio is 2/256 0 0 0 0 0 0 1 0 PORT PWM ratio is 3/256 0 0 0 0 0 0 1 1

PORT PWM ratio is 252/256 1 1 1 1 1 1 0 0 PORT PWM ratio is 253/256 1 1 1 1 1 1 0 1 PORT PWM ratio is 254/256 1 1 1 1 1 1 1 0

PORT PWM ratio is 256/256 (100% duty cycle)

D7 D6 D5 D4 D3 D2 D1 D0

PORT PWM

0 0 0 0 0 0 0 0

⋮

1 1 1 1 1 1 1 1

0

Table 22. PORT12–PORT15 LED Configuration Registers (0x54 to 0x57)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D[7:6] Don’t care 00 — 00

Port uses individual PWM intensity register to set the PWM ratio

Port uses common PWM intensity register to set the PWM ratio

0

000

00

D5 Common PWM

D[4:2] Blink period

D[1:0] Blink-on time

________________________________________________________________ Maxim Integrated Products 24

0

1

000 Port does not blink 001 Port blink period is 256ms 010 Port blink period is 512ms 011 Port blink period is 1024ms 100 Port blink period is 2048ms 101 Port blink period is 4096ms

110/111 Undefined

00 LED is on for 50% of the blink period 01 LED is on for 25% of the blink period 10 LED is on for 12.5% of the blink period 11 LED is on for 6.25% of the blink period

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 23. Interrupt Mask 1 Register (0x58)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT7

D6 PORT6

D5 PORT5

D4 PORT4

D3 PORT3

D2 PORT2

D1 PORT1

D0 PORT0

0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked

1

Table 24. Interrupt Mask 2 Register (0x59)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT15

D6 PORT14

D5 PORT13

D4 PORT12

D3 PORT11

D2 PORT10

D1 PORT9

D0 PORT8

0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked 0 Interrupt is not masked 1 Interrupt is masked

1

________________________________________________________________ Maxim Integrated Products 25

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Table 25. GPI Trigger Mode 1 Register (0x5A)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT15

D6 PORT14

D5 PORT13

D4 PORT12

D3 PORT11

D2 PORT10

D1 PORT9

D0 PORT8

0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts

0

Table 26. GPI Trigger Mode 2 Register (0x5B)

REGISTER BIT DESCRIPTION VALUE FUNCTION DEFAULT VALUE

D7 PORT15

D6 PORT14

D5 PORT13

D4 PORT12

D3 PORT11

D2 PORT10

D1 PORT9

D0 PORT8

0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts 0 Rising-edge-triggered interrupts 1 Rising- and falling-edge-triggered interrupts

0

________________________________________________________________ Maxim Integrated Products 26

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Wafer-Level Packaging (WLP)

Applications Information

For the latest application details on WLP construction, dimensions, tape-carrier information, PCB techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability testing results, refer to Application Note 1891: Wafer- Level Packaging (WLP) and Its Applications, available at

www.maxim-ic.com.

PROCESS: BiCMOS

PART TEMP RANGE PIN-PACKAGE

MAX7304ETG+ MAX7304EWA+**

+Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. **Future product—contact factory for availability.

-40NC to +85NC

Chip Information

Ordering Information

24 TQFN-EP* 25 WLP

Package Information

For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.

24 TQFN-EP T243A3+1

25 WLP W252F2+1

21-0188 90-0122 21-0453

Refer to Application Note 1891

________________________________________________________________ Maxim Integrated Products 27

MAX7304

I2C-Interfaced 16-Port,

Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

Revision History

REVISION

NUMBER

0 6/11 Initial release — 1 3/12 Updated ESD protection specifications 1, 4, 8, 16

REVISION

DATE

DESCRIPTION

PAGES

CHANGED

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 28

©

2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

MAXIM MAX7304 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

General Description

Applications

Features

Typical Operating Circuit

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

Typical Operating Characteristics

Detailed Description

Initial Power-Up

GPIOs

Configuration Register (0x01)

LED Driver Enable Register (0x31)

GPIO Direction 1 and 2 Registers (0x34, 0x35)

GPO Output Mode 1 and 2 Registers (0x36, 0x37)

GPIO Values 1 and 2 Registers (0x3A, 0x3B)

GPIO Level-Shifter Enable Register (0x3C)

GPIO Global Configuration Register (0x40)

GPIO Debounce Configuration Register (0x42)

LED Constant-Current Setting Register (0x43)

Common PWM Ratio Register (0x45)

Interrupt Mask 1 and 2 Registers (0x58, 0x59)

GPI Trigger Mode 1 and 2 Registers (0x5A, 0x5B)

Sleep Mode

LED Fade

LED PWM

LED Blink

Interrupt

Serial Interface

Serial Addressing

START and STOP Conditions

Bit Transfer

Acknowledge

Figure 2. START and STOP Conditions

Figure 3. Bit Transfer

Figure 4. Acknowledge

Slave Addresses

Table 2. 2-Wire Interface Address Map

Bus Timeout

Message Format for Writing

Figure 5. Slave Address

Figure 6. Command Byte Received

Message Format for Reading

Operation with Multiple Masters

Command Address Autoincrementing

Applications Information

Reset from I2C

Hot Insertion

Figure 8. N Data Bytes Received

Staggered PWM

Power-Supply Considerations

Table 3. ESD Test Levels

ESD Protection

Table 4. ESD Waveform Parameters

Register Tables

Table 5. Configuration Register (0x01)

Table 13. GPIO Values 1 Register (0x3A)

Table 14. GPIO Values 2 Register (0x3B)

Chip Information

Ordering Information

Package Information

Revision History