MAXIM MAX7300 User Manual

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General Description
The MAX7300 compact, serial-interfaced, I/O expan­sion peripheral provides microprocessors with up to 28 ports. Each port is individually user configurable to either a logic input or logic output.
Each port can be configured as either a push-pull logic output capable of sinking 10mA and sourcing 4.5mA, or a Schmitt logic input with optional internal pullup. Seven ports feature configurable transition detection logic, which generates an interrupt upon change of port logic level. The MAX7300 is controlled through an I2C™-compatible 2-wire serial interface, and uses four-level logic to allow 16 I2C addresses from only two select pins.
The MAX7300AAX and MAX7300AGL have 28 ports and are available in 36-pin SSOP and 40-pin QFN pack­ages, respectively. The MAX7300AAI and MAX7300ANI have 20 ports and are available in 28-pin SSOP and 28­pin DIP packages, respectively.
Applications
White Goods Industrial Controllers
Automotive System Monitoring
Features
400kbps I2C-Compatible Serial Interface
2.5V to 5.5V Operation
-40°C to +125°C Temperature Range
20 or 28 I/O Ports, Each Configurable as
Push-Pull Logic Output Schmitt Logic Input Schmitt Logic Input with Internal Pullup
11µA (max) Shutdown Current
Logic Transition Detection for Seven I/O Ports
MAX7300
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port I/O Expander
________________________________________________________________ Maxim Integrated Products 1
19-2413; Rev 1; 2/03
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
I2C is a trademark of Philips Corp.
P5
P4
P7 P8
P6
P10
P9
P12 P13
P11
P15
P14
P17 P18
P16
P20
P19
I/O 5
I/O 4
I/O 7 I/O 8
I/O 6
I/O 10
I/O 9
I/O 12 I/O 13
I/O 11
I/O 15
I/O 14
I/O 17 I/O 18
I/O 16
I/O 20
I/O 19
I/O 21 I/O 22
I/O 23
P22 P23
P21
36
2
3
4
33
35
34
29 27
31
24
25
22 21
23
V+
GND
GND
AD0
AD1
SCL
P30 P29
P31
P27
P28
P25 P24
P26
32 30
26
5 7 9
28
6 8
11
10 12
14 15
13
17
16
19 20
18
SDA
MAX7300AAX
3V
DATA
CLOCK
I/O 24 I/O 25
I/O 27
I/O 26
I/O 29 I/O 30
I/O 28
I/O 31
47nF
39k
1
ISET
Typical Operating Circuit
Pin Configurations
Pin Configurations continued at end of data sheet.
PART TEMP RANGE PIN-PACKAGE
MAX7300ANI -40°C to +125°C 28 DIP
MAX7300AAI -40°C to +125°C 28 SSOP
MAX7300AAX -40°C to +125°C 36 SSOP
MAX7300AGL -40°C to +125°C 40 QFN
TOP VIEW
ISET
1
GND
2
GND
3
AD0
4
P12
5
P13
6
P14
7
P15
8
P16
9
P17
10
P18
11
P19
12
P20
13
P21
14
MAX7300
SSOP/DIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V+
AD1
SCL
SDA
P31
P30
P29
P28
P27
P26
P25
P24
P23
P22
MAX7300
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or 28-Port I/O Expander
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with respect to GND)
V+ .............................................................................-0.3V to +6V
SCL, SDA, AD0, AD1................................................-0.3V to +6V
All Other Pins................................................-0.3V to (V+ + 0.3V)
P4–P31 Current ................................................................±30mA
GND Current .....................................................................800mA
Continuous Power Dissipation (T
A
= +70°C)
28-Pin PDIP (derate 20.8mW/°C above +70°C).........1667mW
28-Pin SSOP (derate 9.5mW/°C above +70°C) ...........762mW
36-Pin SSOP (derate 11.8mW/°C above +70°C) .........941mW
40-Pin QFN (derate 23.25mW/°C aboveT
A
= +70°C)..1860mW
Operating Temperature Range
(T
MIN
to T
MAX
) ...............................................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
Operating Supply Voltage V+ 2.5 5.5 V
Operating Supply Current I
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
I
SHDN
GPOH
All digital inputs at V+ or GND
All ports programmed as outputs high, no load, all other inputs at V+ or GND
TA = +25°C 5.5 8
TA = -40°C to +85°C10Shutdown Supply Current
to T
T
MIN
TA = +25°C 180 240
TA = -40°C to +85°C 260
to T
T
MIN
MAX
MAX
11
280
µA
µA
All ports programmed
Operating Supply Current I
Operating Supply Current I
INPUTS AND OUTPUTS
Logic High Input Voltage Port Inputs
Logic Low Input Voltage Port Inputs
Input Leakage Current IIH, I
GPIO Input Internal Pullup to V+ I
Hysteresis Voltage GPIO Inputs ∆V
GPOL
GPI
V
V
as outputs low, no load, all other inputs at V+ or GND
All ports programmed as inputs without pullup, ports, and all other inputs at V+ or GND
IH
IL
GPIO inputs without pullup,
IL
PU
I
= V+ to GND
V
PORT
V+ = 2.5V 12 19 30
V+ = 5.5V 80 120 180
TA = +25°C 170 210
TA = -40°C to +85°C 230
T
to T
MIN
MAX
TA = +25°C 110 135
TA = -40°C to +85°C 140
to T
T
MIN
MAX
0.7 x V+
-100 ±1 +100 nA
0.3 V
240
145
0.3 x V+
µA
µA
V
V
µA
MAX7300
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port I/O Expander
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
TIMING CHARACTERISTICS (Figure 2)
(V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
Output High Voltage V
Port Sink Current I
Output Short-Circuit Current I
Input High-Voltage SDA, SCL, AD0, AD1
Input Low-Voltage SDA, SCL, AD0, AD1
Input Leakage Current SDA, SCL IIH, I
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OH
OL
OLSC
V
IH
V
IL
IL
Input Capacitance (Note 2) 10 pF
Output Low-Voltage SDA V
OL
GPIO outputs, I T
= -40°C to +85°C
A
GPIO outputs, I
= T
T
A
MIN
V
= 0.6V 2 10 18 mA
PORT
= 2mA,
SOURCE
= 1mA,
SOURCE
to T
MAX
(Note 2)
V+ -
0.7
V+ -
0.7
Port configured output low, shorted to V+ 2.75 11 20 mA
0.7 x V+
0.3 x V+
-50 +50 nA
I
= 6mA 0.4 V
SINK
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Serial Clock Frequency f
Bus Free Time Between a STOP and a START Condition
Hold Time (Repeated) START Condition
Repeated START Condition Setup Time
STOP Condition Setup Time t
Data Hold Time t
Data Setup Time t
SCL Clock Low Period t
SCL Clock High Period t
Rise Time of Both SDA and SCL Signals, Receiving
Fall Time of Both SDA and SCL Signals, Receiving
Fall Time of SDA Transmitting t
Pulse Width of Spike Suppressed t
Capacitive Load for Each Bus Line
SCL
t
BUF
t
HD, STA
t
SU, STA
SU, STO
HD, DAT
SU, DAT
LOW
HIGH
F,TX
C
(Note 3) 15 900 ns
(Notes 2, 4)
t
R
(Notes 2, 4)
t
F
(Notes 2, 5)
(Notes 2, 6) 0 50 ns
SP
(Note 2) 400 pF
b
400 kHz
1.3 µs
0.6 µs
0.6 µs
0.6 µs
100 ns
1.3 µs
0.7 µs
20 +
0.1C
20 +
0.1C
20 +
0.1C
b
b
b
300 ns
300 ns
250 ns
V
V
V
MAX7300
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or 28-Port I/O Expander
4 _______________________________________________________________________________________
__________________________________________Typical Operating Characteristics
(R
ISET
= 39k, TA = +25°C, unless otherwise noted.)
TIMING CHARACTERISTICS (Figure 2) (continued)
(V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
Note 1: All parameters tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design. Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCLs falling edge.
Note 4: C
b
= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 5: I
SINK
6mA. Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
OPERATING SUPPLY CURRENT
vs. TEMPERATURE
0.40
V+ = 2.5V TO 5.5V
0.36
NO LOAD
0.32
0.28
ALL PORTS OUTPUT (1)
0.24
0.20
0.16
0.12
SUPPLY CURRENT (mA)
0.08
0.04
0
-40.0 125.0 TEMPERATURE (°C)
ALL PORTS OUTPUT (0)
ALL PORTS INPUT HIGH
MAX7300 toc01
SUPPLY CURRENT (µA)
97.570.042.515.0-12.5
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
8
7
V+ = 3.3V
6
5
4
3
-40.0 125.0
V+ = 5.5V
V+ = 2.5V
97.570.042.515.0-12.5
TEMPERATURE (°C)
1
MAX7300 toc02
SUPPLY CURRENT ( mA)
0.1
OPERATING SUPPLY CURRENT vs. V+
(OUTPUTS UNLOADED)
ALL PORTS OUTPUT (1)
ALL PORTS OUTPUT (0)
ALL PORTS INPUT
(PULLUPS DISABLED)
2.0 5.5 V+ (V)
5.04.54.03.53.02.5
MAX7300 toc03
MAX7300
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port I/O Expander
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(R
ISET
= 39k, TA = +25°C, unless otherwise noted.)
GPO SINK CURRENT vs. TEMPERATURE
18
V+ = 2.5V TO 5.5V, V
16
14
12
10
8
PORT SINK CURRENT (mA)
6
4
2
-40.0 125.0
GPI PULLUP CURRENT
1000
100
PULLUP CURRENT (µA)
10
-40.0 125.0
(OUTPUT = 0)
= 0.6V
PORT
TEMPERATURE (°C)
vs. TEMPERATURE
V+ = 5.5V
V+ = 3.3V
V+ = 2.5V
TEMPERATURE (°C)
GPO SOURCE CURRENT vs. TEMPERATURE
9
V
PORT
MAX7300 toc04
97.570.0-12.5 15.0 42.5
MAX7300 toc06
97.570.042.515.0-12.5
8
7
6
5
4
PORT SOURCE CURRENT (mA)
3
2
-40.0 125.0
100
10
PORT CURRENT (mA)
SHORTED TO GND
1
-40.0 125.0
(OUTPUT = 1)
= 1.4V
V+ = 5.5V
V+ = 3.3V
V+ = 2.5V
97.570.042.515.0-12.5
TEMPERATURE (°C)
GPO SHORT-CIRCUIT CURRENT
vs. TEMPERATURE
GPO = 0, PORT
SHORTED TO V+
GPO = 1, PORT
97.570.042.515.0-12.5
TEMPERATURE (°C)
MAX7300 toc05
MAX7300 toc07
MAX7300
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or 28-Port I/O Expander
6 _______________________________________________________________________________________
Detailed Description
The MAX7300 general-purpose input/output (GPIO) peripheral provides up to 28 I/O ports, P4 to P31, con­trolled through an I2C-compatible serial interface. The ports can be configured to any combination of logic inputs and logic outputs, and default to logic inputs on power-up.
Figure 1 is the MAX7300 functional diagram. Any I/O port can be configured as a push-pull output (sinking 10mA, sourcing 4.5mA), or a Schmitt-trigger logic input. Each input has an individually selectable internal pullup resis­tor. Additionally, transition detection allows seven ports (P24 to P30) to be monitored in any maskable combina­tion for changes in their logic status. A detected transi­tion is flagged through a status register bit, as well as an interrupt pin (port P31), if desired.
The port configuration registers individually set the 28 ports, P4 to P31, as GPIO. A pair of bits in registers 0x09 through 0x0F sets each ports configuration (Tables 1 and 2).
The 36-pin MAX7300AAX and 40-pin MAX7300AGL have 28 ports, P4 to P31. The 28-pin MAX7300ANI and MAX7300AAI have only 20 ports available, P12 to P31. The eight unused ports should be configured as out­puts on power-up by writing 0x55 to registers 0x09 and
0x0A. If this is not done, the eight unused ports remain as floating inputs and quiescent supply current rises, although there is no damage to the part.
Register Control of I/O Ports
Across Multiple Drivers
The MAX7300 offers 20 or 28 I/O ports, depending on package choice. Two addressing methods are avail­able. Any single port (bit) can be written (set/cleared) at once; or, any sequence of eight ports can be written (set/cleared) in any combination at once. There are no boundaries; it is equally acceptable to write P0 to P7, P1 to P8, or P31 to P38 (P32 to P38 are nonexistent, so the instructions to these bits are ignored).
Shutdown
When the MAX7300 is in shutdown mode, all ports are forced to inputs, and the pullup current sources are turned off. Data in the port and control registers remain unaltered, so port configuration and output levels are restored when the MAX7300 is taken out of shutdown. The MAX7300 can still be programmed while in shut­down mode. For minimum supply current in shutdown mode, logic inputs should be at GND or V+ potential. Shutdown mode is exited by setting the S bit in the con­figuration register (Table 8).
Pin Description
PIN
SSOP/DIP SSOP
1 1 36 ISET
2, 3 2, 3
4 4 40 AD0
QFN
37, 38, 39
NAME FUNCTION
GND Ground
5–24 ——P12–P31
5–32
25 33
26 34
27 35 34 AD1
28 36 35 V+
1–10, 12–19,
21–30
32
33
P4–P31
SDA I2C-Compatible Serial Data I/O
SCL I2C-Compatible Serial Clock Input
Bias Current Setting. Connect ISET to GND through a resistor (R value of 39k to 120kΩ.
Address Input 0. Sets device slave address. Connect to either GND, V+, SCL, SDA to give four logic combinations. See Table 3.
I/O P or ts. P 12 to P 31 can b e confi g ur ed as p ush- p ul l outp uts, C M O S ­l og i c i np uts, or C M O S - l og i c i np uts w i th w eak p ul l up r esi stor .
I/O P or ts. P4 to P31 can be configured as p ush- p ul l outputs, CMOS­logic inputs, or CMOS-logic inputs with weak pullup resistor.
Address Input 1. Sets device slave address. Connect to either GND, V+, SCL, SDA to give four logic combinations. See Table 3.
Positive Supply Voltage. Bypass V+ to GND with minimum 0.047µF capacitor.
ISET
)
MAX7300
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port I/O Expander
_______________________________________________________________________________________ 7
Serial Interface
Serial Addressing
The MAX7300 operates as a slave that sends and receives data through an I2C-compatible 2-wire inter­face. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional commu­nication between master(s) and slave(s). A master (typ­ically a microcontroller) initiates all data transfers to and from the MAX7300, and generates the SCL clock that synchronizes the data transfer (Figure 2).
The MAX7300 SDA line operates as both an input and an open-drain output. A pullup resistor, typically 4.7kΩ, is required on SDA. The MAX7300 SCL line operates only as an input. A pullup resistor, typically 4.7k, is required on SCL if there are multiple masters on the 2­wire interface, or if the master in a single-master system has an open-drain SCL output.
Each transmission consists of a START condition (Figure 3) sent by a master, followed by the MAX7300 7-bit slave address plus R/W bit (Figure 6), a register address byte, one or more data bytes, and finally a STOP condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmis­sion with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit, which the recipient uses to handshake receipt of each byte of data (Figure 5). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is sta­ble low during the high period of the clock pulse. When the master is transmitting to the MAX7300, the MAX7300 generates the acknowledge bit since the
Table 1. Port Configuration Map
Table 2. Port Configuration Matrix
(
)
REGISTER
Port Configuration for P7, P6, P5, P4 0x09 P7 P6 P5 P4
Port Configuration for P11, P10, P9, P8 0x0A P11 P10 P9 P8
Port Configuration for P15, P14, P13, P12 0x0B P15 P14 P13 P12
Port Configuration for P19, P18, P17, P16 0x0C P19 P18 P17 P16
Port Configuration for P23, P22, P21, P20 0x0D P23 P22 P21 P20
Port Configuration for P27, P26, P25, P24 0x0E P27 P26 P25 P24
Port Configuration for P31, P30, P29, P28 0x0F P31 P30 P29 P28
ADDRESS
CODE (HEX)
D7 D6 D5 D4 D3 D2 D1 D0
MODE FUNCTION
DO NOT USE THIS SETTING 0x09 to 0x0F 0 0
Output GPIO Output
Input
Input GPIO Input with Pullup Reading Port Schmitt logic input with pullup 0x09 to 0x0F 1 1
GPIO Input
without Pullup
PORT
REGISTER
Written Low
Written High
Reading Port Schmitt logic output 0x09 to 0x0F 1 0
Active-low logic output
Active-high logic output
PIN BEHAVIOR
REGISTER DATA
PORT
ADDRESS
CODE
HEX
0x09 to 0x0F 0 1
CONFIGURATION
BIT PAIR
UPPER LOWER
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