The MAX6956 compact, serial-interfaced LED display
driver/I/O expander provide microprocessors with up to
28 ports. Each port is individually user configurable to
either a logic input, logic output, or common-anode
(CA) LED constant-current segment driver. Each port
configured as an LED segment driver behaves as a
digitally controlled constant-current sink, with 16 equal
current steps from 1.5mA to 24mA. The LED drivers are
suitable for both discrete LEDs and CA numeric and
alphanumeric LED digits.
Each port configured as a general-purpose I/O (GPIO)
can be either a push-pull logic output capable of sinking 10mA and sourcing 4.5mA, or a Schmitt logic input
with optional internal pullup. Seven ports feature configurable transition detection logic, which generates an
interrupt upon change of port logic level. The MAX6956
is controlled through an I2C™-compatible 2-wire serial
interface, and uses four-level logic to allow 16 I2C
addresses from only 2 select pins.
The MAX6956AAX and MAX6956ATL have 28 ports
and are available in 36-pin SSOP and 40-pin thin QFN
packages, respectively. The MAX6956AAI and
MAX6956ANI have 20 ports and are available in 28-pin
SSOP and 28-pin DIP packages, respectively.
For an SPI-interfaced version, refer to the MAX6957
data sheet. For a lower cost pin-compatible port
expander without the constant-current LED drive capability, refer to the MAX7300 data sheet.
Applications
Set-Top BoxesBar Graph Displays
Panel MetersIndustrial Controllers
White GoodsSystem Monitoring
Automotive
Features
♦ 400kbps I2C-Compatible Serial Interface
♦ 2.5V to 5.5V Operation
♦ -40°C to +125°C Temperature Range
♦ 20 or 28 I/O Ports, Each Configurable as
Constant-Current LED Driver
Push-Pull Logic Output
Schmitt Logic Input
Schmitt Logic Input with Internal Pullup
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Typical Operating Circuit appears at end of data sheet.
Ordering Information
Purchase of I2C components of Maxim Integrated Products, Inc.,
or one of its sublicensed Associated Companies, conveys a
license under the Philips I2C Patent Rights to use these components in an I
2
C system, provided that the system conforms to the
I
2
C Standard Specification as defined by Philips.
Pin Configurations continued at end of data sheet.
PARTTEMP RANGEPIN-PACKAGE
MAX6956ANI-40°C to +125°C28 DIP
MAX6956AAI-40°C to +125°C28 SSOP
MAX6956AAX-40°C to +125°C36 SSOP
MAX6956ATL-40°C to +125°C40 Thin QFN
TOP VIEW
ISET
1
GND
2
GND
3
AD0
4
P12
5
6
7
8
9
10
11
12
13
14
MAX6956
SSOP/DIP
P13
P14
P15
P16
P17
P18
P19
P20
P21
V+
28
AD1
27
SCL
26
SDA
25
P31
24
P30
23
P29
22
P28
21
P27
20
P26
19
P25
18
P24
17
P23
16
P22
15
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with Respect to GND)
V+ .............................................................................-0.3V to +6V
SCL, SDA, AD0, AD1................................................-0.3V to +6V
All Other Pins................................................-0.3V to (V+ + 0.3V)
P4–P31 Current ................................................................±30mA
GND Current .....................................................................800mA
Note 1: All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4: C
b
= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 5: I
SINK
≤ 6mA. Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
TIMING CHARACTERISTICS (Figure 2)
(V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
Port Drive LED Sink Current,
Port Configured as LED Driver
Port Drive Logic Sink Current,
Port Configured as LED Driver
V+ = 3.3V, V
current (Note 2)
V+ = 5.5V, V
current
V+ = 2.5V, V
current
V+ = 5.5V, V
current
= 2.3V at maximum LED
LED
= 2.4V at maximum LED
LED
= 2.4V at maximum LED
LED
= 0.6V at maximum sink
OUT
= 0.6V at maximum sink
OUT
9.513.518
18.52427.5
192530
18.52328
192428
✕
0.7
V+
0.3
-5050nA
= 6mA0.4V
✕
V+
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Serial Clock Frequencyf
Bus Free Time Between a STOP
and a START Condition
Hold Time (Repeated) START
Condition
Repeated START Condition
Setup Time
STOP Condition Setup Timet
Data Hold Timet
Data Setup Timet
SCL Clock Low Periodt
SCL Clock High Periodt
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of Both SDA and SCL
Signals, Receiving
Fall Time of SDA Transmittingt
Pulse Width of Spike Suppressedt
Capacitive Load for Each Bus
Line
SCL
t
BUF
t
HD, STA
t
SU, STA
SU, STO
HD, DAT
SU, DAT
LOW
HIGH
t
t
,TX
F
SP
C
(Note 3)15900ns
(Notes 2, 4)
R
(Notes 2, 4)
F
(Notes 2, 5)
(Notes 2, 6)050ns
(Note 2)400pF
b
400kHz
1.3µs
0.6µs
0.6µs
0.6µs
100ns
1.3µs
0.7µs
20 +
0.1C
20 +
0.1C
20 +
0.1C
b
b
b
300ns
300ns
250ns
mA
mA
V
V
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
The MAX6956 LED driver/GPIO peripheral provides up
to 28 I/O ports, P4 to P31, controlled through an I2C-compatible serial interface. The ports can be configured to
any combination of constant-current LED drivers, logic
inputs and logic outputs, and default to logic inputs on
power-up. When fully configured as an LED driver, the
MAX6956 controls up to 28 LED segments with individual 16-step adjustment of the constant current through
each LED segment. A single resistor sets the maximum
segment current for all segments, with a maximum of
24mA per segment. The MAX6956 drives any combination of discrete LEDs and CA digits, including sevensegment and starburst alphanumeric types.
Figure 1 is the MAX6956 functional diagram. Any I/O
port can be configured as a push-pull output (sinking
10mA, sourcing 4.5mA), or a Schmitt-trigger logic
input. Each input has an individually selectable internal
pullup resistor. Additionally, transition detection allows
seven ports (P24 through P30) to be monitored in any
maskable combination for changes in their logic status.
A detected transition is flagged through a status register bit, as well as an interrupt pin (port P31), if desired.
The Typical Operating Circuit shows two MAX6956s
working together controlling three monocolor 16-seg-
ment-plus-DP displays, with five ports left available for
GPIO (P26–P31 of U2).
The port configuration registers set the 28 ports, P4 to
P31, individually as either LED drivers or GPIO. A pair
of bits in registers 0x09 through 0x0F sets each port’s
configuration (Tables 1 and 2).
The 36-pin MAX6956AAX has 28 ports, P4 to P31. The
28-pin MAX6956ANI and MAX6956AAI make only 20
ports available, P12 to P31. The eight unused ports
should be configured as outputs on power-up by writing 0x55 to registers 0x09 and 0x0A. If this is not done,
the eight unused ports remain as floating inputs and
quiescent supply current rises, although there is no
damage to the part.
Register Control of I/O Ports and LEDs
Across Multiple Drivers
The MAX6956 offers 20 or 28 I/O ports, depending on
package choice. These can be applied to a variety of
combinations of different display types, for example:
seven, 7-segment digits (Figure 7). This example
requires two MAX6956s, with one digit being driven by
both devices, half by one MAX6956, half by the other
(digit 4 in this example). The two drivers are static, and
therefore do not need to be synchronized. The
MAX6956 sees CA digits as multiple discrete LEDs. To
283635V+Positive Supply Voltage. Bypass V+ to GND with minimum 0.047µF capacitor.
SSOPT H I N Q F N
1–10, 12–19,
21–30
NAMEFUNCTION
Segment Current Setting. Connect ISET to GND through a resistor (R
set the maximum segment current.
Address Input 0. Sets device slave address. Connect to either GND, V+, SCL,
SDA to give four logic combinations. See Table 3.
LED Segment Drivers and GPIO. P12 to P31 can be configured as CA LED
drivers, GPIO outputs, CMOS logic inputs, or CMOS logic inputs with weak
pullup resistor.
LED Segment Drivers and GPIO. P4 to P31 can be configured as CA LED
P4–P31
drivers, GPIO outputs, CMOS logic inputs, or CMOS logic inputs with weak
pullup resistor.
Address Input 1. Sets device slave address. Connect to either GND, V+, SCL,
SDA to give four logic combinations. See Table 3.
ISET
) to
MAX6956
simplify access to displays that overlap two MAX6956s,
the MAX6956 provides four virtual ports, P0 through P3.
To update an overlapping digit, send the same code
twice as an eight-port write, once to P28 through P35 of
the first driver, and again to P0 through P7 of the second driver. The first driver ignores the last 4 bits and
the second driver ignores the first 4 bits.
Two addressing methods are available. Any single port
(bit) can be written (set/cleared) at once; or, any
sequence of eight ports can be written (set/cleared) in
any combination at once. There are no boundaries; it is
equally acceptable to write P0 through P7, P1 through
P8, or P31 through P38 (P32 through P38 are nonexistent, so the instructions to these bits are ignored).
Using 8-bit control, a seven-segment digit with a decimal point can be updated in a single byte-write, a 14-
segment digit with DP can be updated in two bytewrites, and 16-segment digits with DP can be updated
in two byte-writes plus a bit write. Also, discrete LEDs
and GPIO port bits can be lit and controlled individually
without affecting other ports.
Shutdown
When the MAX6956 is in shutdown mode, all ports are
forced to inputs (which an be read), and the pullup current sources are turned off. Data in the port and control
registers remain unaltered, so port configuration and
output levels are restored when the MAX6956 is taken
out of shutdown. The display driver can still be programmed while in shutdown mode. For minimum supply current in shutdown mode, logic inputs should be at
GND or V+ potential. Shutdown mode is exited by setting the S bit in the configuration register (Table 8).
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
Note: The logic is inverted between the two output modes; a high makes the output go low in LED segment driver mode (0x00) to
turn that segment on; in GPIO output mode (0x01), a high makes the output go high.
(
)
(
)
REGISTER
Port Configuration for P7, P6, P5, P40x09P7P6P5P4
Port Configuration for P11, P10, P9, P80x0AP11P10P9P8
Port Configuration for P15, P14, P13, P120x0BP15P14P13P12
Port Configuration for P19, P18, P17, P160x0CP19P18P17P16
Port Configuration for P23, P22, P21, P200x0DP23P22P21P20
Port Configuration for P27, P26, P25, P240x0EP27P26P25P24
Port Configuration for P31, P30, P29, P280x0FP31P30P29P28
ADDRESS
CODE (HEX)
D7D6D5D4D3D2D1D0
REGISTER DATA
MODEFUNCTION
OutputLED Segment Driver
OutputGPIO Output
Input
InputGPIO Input with Pullup
GPIO Input
Without Pullup
PORT
REGISTER
0x20–0x5F
Register bit = 0High impedance
Open-drain current sink, with sink
Register bit = 1
Register bit = 0Active-low logic output
Register bit = 1Active-high logic output
Register bit =
input logic level
current (up to 24mA) determined
by the appropriate current register
Schmitt logic input0x09 to 0x0F10
Schmitt logic input with pullup0x09 to 0x0F11
PIN BEHAVIOR
ADDRESS
CODE
HEX
0x09 to 0x0F00
0x09 to 0x0F01
CONFIGURATION
UPPERLOWER
PORT
BIT PAIR
Shutdown mode is temporarily overridden by the display test function.
Serial Interface
Serial Addressing
The MAX6956 operates as a slave that sends and
receives data through an I2C-compatible 2-wire interface. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and
from the MAX6956, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX6956 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on SDA. The MAX6956 SCL line operates
only as an input. A pullup resistor, typically 4.7kΩ, is
required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX6956
7-bit slave address plus R/W bit (Figure 6), a register
address byte, one or more data bytes, and finally a
STOP condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit, which the
recipient uses to handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When
the master is transmitting to the MAX6956, the
MAX6956 generates the acknowledge bit because the
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
MAX6956 is the recipient. When the MAX6956 is transmitting to the master, the master generates the
acknowledge bit because the master is the recipient.
Slave Address
The MAX6956 has a 7-bit-long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/W bit. It is low for a write command, high for a read
command.
The first 3 bits (MSBs) of the MAX6956 slave address
are always 100. Slave address bits A3, A2, A1, and A0
are selected by address inputs, AD1 and AD0. These
two input pins may be connected to GND, V+, SDA, or
SCL. The MAX6956 has 16 possible slave addresses
(Table 3) and therefore, a maximum of 16 MAX6956
devices may share the same interface.
Message Format for Writing
the MAX6956
A write to the MAX6956 comprises the transmission of
the MAX6956’s slave address with the R/ W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command byte determines which register of the MAX6956
is to be written by the next byte, if received. If a STOP
condition is detected after the command byte is
received, then the MAX6956 takes no further action
(Figure 8) beyond storing the command byte.
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register of
the MAX6956 selected by the command byte (Figure 9). If
multiple data bytes are transmitted before a STOP condition is detected, these bytes are generally stored in subsequent MAX6956 internal registers because the command
byte address generally autoincrements (Table 4).
Message Format for Reading
The MAX6956 is read using the MAX6956’s internally
stored command byte as address pointer, the same
way the stored command byte is used as address
pointer for a write. The pointer generally autoincrements after each data byte is read using the same rules
as for a write (Table 4). Thus, a read is initiated by first
configuring the MAX6956’s command byte by perform-
COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION
ACKNOWLEDGE FROM MAX6956
SAAP0
COMMAND BYTE RECEIVED
SLAVE ADDRESS
R/W
D15 D14 D13 D12 D11 D10 D9 D8
COMMAND BYTE
ACKNOWLEDGE FROM MAX6956
ACKNOWLEDGE FROM MAX6956ACKNOWLEDGE FROM MAX6956
HOW COMMAND BYTE AND DATA BYTE MAP INTO MAX6956's REGISTER
SAAAP0
ACKNOWLEDGE FROM MAX6956
SLAVE ADDRESS
R/W
D15 D14 D13 D12 D11 D10 D9 D8D1 D0D3 D2D5 D4D7 D6
COMMAND BYTE
DATA BYTE
1 BYTE
ing a write (Figure 8). The master can now read n consecutive bytes from the MAX6956, with the first data
byte being read from the register addressed by the initialized command byte. When performing read-afterwrite verification, remember to reset the command
byte’s address because the stored control byte
address generally has been autoincremented after the
write (Table 4). Table 5 is the register address map.
Operation with Multiple Masters
If the MAX6956 is operated on a 2-wire interface with
multiple masters, a master reading the MAX6956
should use a repeated start between the write, which
sets the MAX6956’s address pointer, and the read(s)
that takes the data from the location(s). This is because
it is possible for master 2 to take over the bus after
master 1 has set up the MAX6956’s address pointer but
before master 1 has read the data. If master 2 subse-
Port 11 only (data bit D0; D7–D1 read as 0)X01010110x2B
Port 12 only (data bit D0; D7–D1 read as 0)X01011000x2C
Port 13 only (data bit D0; D7–D1 read as 0)X01011010x2D
Port 14 only (data bit D0; D7–D1 read as 0)X01011100x2E
Port 15 only (data bit D0; D7–D1 read as 0)X01011110x2F
Port 16 only (data bit D0; D7–D1 read as 0)X01100000x30
Port 17 only (data bit D0; D7–D1 read as 0)X01100010x31
Port 18 only (data bit D0; D7–D1 read as 0)X01100100x32
Port 19 only (data bit D0; D7–D1 read as 0)X01100110x33
Port 20 only (data bit D0; D7–D1 read as 0)X01101000x34
Port 21 only (data bit D0; D7–D1 read as 0)X01101010x35
Port 22 only (data bit D0; D7–D1 read as 0)X01101100x36
Port 23 only (data bit D0; D7–D1 read as 0)X01101110x37
Port 24 only (data bit D0; D7–D1 read as 0)X01110000x38
Port 25 only (data bit D0; D7–D1 read as 0)X01110010x39
Port 26 only (data bit D0; D7–D1 read as 0)X01110100x3A
Port 27 only (data bit D0; D7–D1 read as 0)X01110110x3B
Port 28 only (data bit D0; D7–D1 read as 0)X01111000x3C
Port 29 only (data bit D0; D7–D1 read as 0)X01111010x3D
Port 30 only (data bit D0; D7–D1 read as 0)X01111100x3E
Port 31 only (data bit D0; D7–D1 read as 0)X01111110x3F
4 ports 4–7 (data bits D0–D3; D4–D7 read as 0)X10000000x40
5 ports 4–8 (data bits D0–D4; D5–D7 read as 0)X10000010x41
6 ports 4–9 (data bits D0–D5; D6–D7 read as 0)X10000100x42
7 ports 4–10 (data bits D0–D6; D7 reads as 0)X10000110x43
8 ports 4–11 (data bits D0–D7)X10001000x44
8 ports 5–12 (data bits D0–D7)X10001010x45
8 ports 6–13 (data bits D0–D7)X10001100x46
8 ports 7–14 (data bits D0–D7)X10001110x47
8 ports 8–15 (data bits D0–D7)X10010000x48
8 ports 9–16 (data bits D0–D7)X10010010x49
8 ports 10–17 (data bits D0–D7)X10010100x4A
8 ports 11–18 (data bits D0–D7)X10010110x4B
8 ports 12–19 (data bits D0–D7)X10011000x4C
8 ports 13–20 (data bits D0–D7)X10011010x4D
8 ports 14–21 (data bits D0–D7)X10011100x4E
8 ports 15–22 (data bits D0–D7)X10011110x4F
D15D14D13D12D11D10D9D8
COMMAND ADDRESS
HEX
CODE
MAX6956
quently changes, the MAX6956’s address pointer, then
master 1’s delayed read may be from an unexpected
location.
Command Address Autoincrementing
Address autoincrementing allows the MAX6956 to be
configured with the shortest number of transmissions
by minimizing the number of times the command
address needs to be sent. The command address
stored in the MAX6956 generally increments after each
data byte is written or read (Table 4).
Initial Power-Up
On initial power-up, all control registers are reset, the
current registers are set to minimum value, and the
MAX6956 enters shutdown mode (Table 6).
LED Current Control
LED segment drive current can be set either globally or
individually. Global control simplifies the operation
when all LEDs are set to the same current level,
because writing just the global current register sets the
current for all ports configured as LED segment drivers.
It is also possible to individually control the current
drive of each LED segment driver. Individual/global
brightness control is selected by setting the configuration register I bit (Table 9). The global current register
(0x02) data are then ignored, and segment currents are
set using register addresses 0x12 through 0x1F (Tables
12, 13, and 14). Each segment is controlled by a nibble
of one of the 16 current registers.
Transition (Port Data Change) Detection
Port transition detection allows any combination of the
seven ports P24–P30 to be continuously monitored for
changes in their logic status (Figure 11). A detected
change is flagged on the transition detection mask register INT status bit, D7 (Table 15). If port P31 is configured as an output (Tables 1 and 2), then P31 also
automatically becomes an active-high interrupt output
(INT), which follows the condition of the INT status bit.
Port P31 is set as output by writing bit D7 = 0 and bit
D6 = 1 to the port configuration register (Table 1). Note
that the MAX6956 does not identify which specific
port(s) caused the interrupt, but provides an alert that
one or more port levels have changed.
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
P7, P6, P5, P4: GPIO Inputs Without Pullup0x0910101010
P11, P10, P9, P8: GPIO Inputs Without Pullup0x0A10101010
P15, P14, P13, P12: GPIO Inputs Without Pullup0x0B10101010
P19, P18, P17, P16: GPIO Inputs Without Pullup0x0C10101010
P23, P22, P21, P20: GPIO Inputs Without Pullup0x0D10101010
P27, P26, P25, P24: GPIO Inputs Without Pullup0x0E10101010
P31, P30, P29, P28: GPIO Inputs Without Pullup0x0F10101010
POWER-UP CONDITION
LED Off; GPIO Output Low
1/16 (minimum on)0x02XXXX0000
Shutdown Enabled
Current Control = Global
Transition Detection Disabled
All Clear (Masked Off)0x06X0000000
ADDRESS
CODE
(HEX)
0x24 to
0x3F
0x0400XXXXX0
D7D6D5D4D3D2D1D0
XXXXXXX0
REGISTER DATA
MAX6956
The mask register contains 7 mask bits, which select
which of the seven ports P24–P30 are to be monitored
(Table 15). Set the appropriate mask bit to enable that
port for transition detect. Clear the mask bit if transitions
on that port are to be ignored. Transition detection
works regardless of whether the port being monitored is
set to input or output, but generally, it is not particularly
useful to enable transition detection for outputs.
To use transition detection, first set up the mask register
and configure port P31 as an output, as described
above. Then enable transition detection by setting the
M bit in the configuration register (Table 10). Whenever
the configuration register is written with the M bit set,
the MAX6956 updates an internal 7-bit snapshot register, which holds the comparison copy of the logic states
of ports P24 through P30. The update action occurs
regardless of the previous state of the M bit, so that it is
not necessary to clear the M bit and then set it again to
update the snapshot register.
When the configuration register is written with the M bit
set, transition detection is enabled and remains
enabled until either the configuration register is written
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
Table 10. Transition Detection Control (M-Data Bit D7) Format
Table 9. Global Current Control (I Data Bit D6) Format
FUNCTION
Configuration Register0x04MIXXXXXS
FUNCTION
Shutdown0x04MIXXXXX0
Normal Operation0x04MIXXXXX1
FUNCTION
Global
Constant-current limits for all digits are
controlled by one setting in the Global Current
register, 0x02
Individual Segment
Constant-current limit for each digit is
individually controlled by the settings in the
Current054 through Current1FE registers
ADDRESS CODE
(HEX)
ADDRESS CODE
(HEX)
D7D6D5D4D3D2D1D0
D7D6D5D4D3D2D1D0
ADDRESS
CODE (HEX)
D7D6D5D4D3D2D1D0
0x04M0XXXXXS
0x04M1XXXXXS
REGISTER DATA
REGISTER DATA
REGISTER DATA
FUNCTION
Disabled0x040IXXXXXS
Enabled0x041IXXXXXS
ADDRESS CODE
(HEX)
D7D6D5D4D3D2D1D0
REGISTER DATA
with the M bit clear, or a transition is detected. The INT
status bit (transition detection mask register bit D7)
goes low. Port P31 (if enabled as INT output) also goes
low, if it was not already low.
Once transition detection is enabled, the MAX6956
continuously compares the snapshot register against
the changing states of P24 through P31. If a change on
any of the monitored ports is detected, even for a short
time (like a pulse), the INT status bit (transition detection mask register bit D7) is set. Port P31 (if enabled as
INT output) also goes high. The INT output and INT status bit are not cleared if more changes occur or if the
data pattern returns to its original snapshot condition.
The only way to clear INT is to access (read or write)
the transition detection mask register (Table 15). So if
the transition detection mask register is read twice in
succession after a transition event, the first time reads
with bit D7 set (identifying the event), and the second
time reads with bit D7 clear.
Transition detection is a one-shot event. When INT has
been cleared after responding to a transition event,
transition detection is automatically disabled, even
though the M bit in the configuration register remains
set (unless cleared by the user). Reenable transition
detection by writing the configuration register with the
M bit set, to take a new snapshot of the seven ports
P24 to P30.
Display Test Register
Display test mode turns on all ports configured as LED
drivers by overriding, but not altering, all controls and
port registers, except the port configuration register
(Table 16). Only ports configured as LED drivers are
affected. Ports configured as GPIO push-pull outputs
do not change state. In display test mode, each port’s
current is temporarily set to 1/2 the maximum current
limit as controlled by R
ISET
.
Selecting External Component R
ISET
to Set Maximum Segment Current
The MAX6956 uses an external resistor R
ISET
to set the
maximum segment current. The recommended value,
39kΩ, sets the maximum current to 24mA, which makes
the segment current adjustable from 1.5mA to 24mA in
1.5mA steps.
To set a different segment current, use the formula:
is the minimum
allowed value, since it sets the display driver to the
maximum allowed segment current. R
ISET
can be a
higher value to set the segment current to a lower maximum value where desired. The user must also ensure
that the maximum current specifications of the LEDs
connected to the driver are not exceeded.
The drive current for each segment can be controlled
through programming either the Global Current register
(Table 11) or Individual Segment Current registers
(Tables 12, 13, and 14), according to the setting of the
Current Control bit of the Configuration register (Table 9).
These registers select the LED’s constant-current drive
from 16 equal fractions of the maximum segment current. The current difference between successive current
steps, I
STEP
, is therefore determined by the formula:
I
STEP
= I
SEG
/ 16
If I
SEG
= 24mA, then I
STEP
= 24mA / 16 = 1.5mA.
Applications Information
Driving Bicolor and Tricolor LEDs
Bicolor digits group a red and a green die together for
each display element, so that the element can be lit
red, green (or orange), depending on which die (or
both) is lit. The MAX6956 allows each segment’s current to be set individually from 1/16th (minimum current
and LED intensity) to 16/16th (maximum current and
LED intensity), as well as off (zero current). Thus, a
bicolor (red-green) segment pair can be set to 289
color/intensity combinations. A discrete or CA tricolor
(red-green-yellow or red-green-blue) segment triad can
be set to 4913 color/intensity combinations.
Power Dissipation Issues
Each MAX6956 port can sink a current of 24mA into an
LED with a 2.4V forward-voltage drop when operated
from a supply voltage of at least 3.0V. The minimum
voltage drop across the internal LED drivers is therefore (3.0V - 2.4V) = 0.6V. The MAX6956 can sink 28 x
24mA = 672mA when all outputs are operating as LED
Table 14. Odd Individual Segment Current Format
LED
DRIVE
FRACTION
1/161.50x12 to 0x1F00000x0X
2/1630x12 to 0x1F00010x1X
3/164.50x12 to 0x1F00100x2X
4/1660x12 to 0x1F00110x3X
5/167.50x12 to 0x1F01000x4X
6/16 90x12 to 0x1F01010x5X
7/1610.50x12 to 0x1F0110See Table 13.0x6X
8/16120x12 to 0x1F01110x7X
9/1613.50x12 to 0x1F10000x8X
10/16150x12 to 0x1F10010x9X
11/1616.50x12 to 0x1F10100xAX
12/16180x12 to 0x1F10110xBX
13/1619.50x12 to 0x1F11000xCX
14/16210x12 to 0x1F11010xDX
15/1622.50x12 to 0x1F11100xEX
16/16240x12 to 0x1F11110xFX
SEGMENT
CONSTANT
CURRENT WITH
= 39kΩ (mA)
R
ISET
ADDRESS
CODE (HEX)
D7D6D5D4D3D2D1D0HEX CODE
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
CLOCK PULSE AFTER EACH READ ACCESS TO MASK REGISTER
DQ
MASK REGISTER BIT 6
DQ
MASK REGISTER BIT 5
DQ
MASK REGISTER BIT 4
DQ
MASK REGISTER BIT 3
OR
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
GPIO IN
GPIO/PORT OUT
DQ
MASK REGISTER BIT 2
DQ
MASK REGISTER BIT 1
DQ
MASK REGISTER LSB
CLOCK PULSE WHEN WRITING CONFIGURATION REGISTER WITH M BIT SET
P26
P25
P24
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
GPIO INPUT
CONDITIONING
GPIO/PORT OUTPUT LATCH
segment drivers at full current. On a 3.3V supply, a
MAX6956 dissipates (3.3V - 2.4V) ✕672mA = 0.6W
when driving 28 of these 2.4V forward-voltage drop
LEDs at full current. This dissipation is within the ratings
of the 36-pin SSOP package with an ambient temperature up to +98°C. If a higher supply voltage is used or
the LEDs used have a lower forward-voltage drop than
2.4V, the MAX6956 absorbs a higher voltage, and the
MAX6956’s power dissipation increases.
If the application requires high drive current and high
supply voltage, consider adding a series resistor to
each LED to drop excessive drive voltage off-chip. For
example, consider the requirement that the MAX6956
must drive LEDs with a 2.0V to 2.4V specified forwardvoltage drop, from an input supply range is 5V ±5%
with a maximum LED current of 20mA. Minimum input
supply voltage is 4.75V. Maximum LED series resistor
value is (4.75V - 2.4V - 0.6V)/0.020A = 87.5Ω. We
choose 82Ω ±2%. Worst-case resistor dissipation is at
maximum toleranced resistance, i.e., (0.020A)
2
✕
(82Ω
✕
1.02) = 34mW. The maximum MAX6956 dissipation
per LED is at maximum input supply voltage, minimum
toleranced resistance, minimum toleranced LED forward-voltage drop, i.e., 0.020 x (5.25V - 2.0V - (0.020A
✕
82Ω x 0.98)) = 32.86mW. Worst-case MAX6956 dissipation is 920mW driving all 28 LEDs at 20mA full current at once, which meets the 941mW dissipation
ratings of the 36-pin SSOP package.
Low-Voltage Operation
The MAX6956 operates down to 2V supply voltage
(although the sourcing and sinking currents are not guaranteed), providing that the MAX6956 is powered up initially to at least 2.5V to trigger the device’s internal reset.
Serial Interface Latency
When a MAX6956 register is written through the I2C interface, the register is updated on the rising edge of SCL
during the data byte’s acknowledge bit (Figure 5). The
delay from the rising edge of SCL to the internal register
being updated can range from 50ns to 350ns.
PC Board Layout Considerations
Ensure that all of the MAX6956 GND connections are
used. A ground plane is not necessary, but may be useful
to reduce supply impedance if the MAX6956 outputs are
to be heavily loaded. Keep the track length from the ISET
pin to the R
ISET
resistor as short as possible, and take the
GND end of the resistor either to the ground plane or
directly to the GND pins.
Power-Supply Considerations
The MAX6956 operates with power-supply voltages of
2.5V to 5.5V. Bypass the power supply to GND with a
0.047µF capacitor as close to the device as possible.
Add a 1µF capacitor if the MAX6956 is far away from
the board’s input bulk decoupling capacitor.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
12
INCHES
DIM
MIN
A
0.068
A1
0.002
B
0.010
C
HE
N
D
E
e
H
L
0.004
SEE VARIATIONS
0.205
0.0256 BSC
0.301
0.025
0∞
MAX
0.078
0.008
0.015
0.008
0.212
0.311
0.037
8∞
MILLIMETERS
MAX
MIN
1.731.99
0.21
0.05
0.38
0.25
0.20
0.09
5.20
5.38
0.65 BSC
7.65
7.90
0.63
0.95
0∞
8∞
INCHES
MIN
D
0.239
D
0.239
D
0.278
D
0.317
0.397
D
MAX
0.249
0.249
0.289
0.328
0.407
MILLIMETERS
MAX
MIN
6.07
6.33
6.07
6.33
7.07
7.33
8.07
8.33
10.07
10.33
N
14L
16L
20L
24L
28L
SSOP.EPS
A
e
D
B
A1
L
NOTES:
1. D&E DO NOT INCLUDE MOLD FLASH.
2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006").
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
36
1
TOP VIEW
e
INCHES
DIM
MIN
0.096A
0.004
A1
0.012
B
0.009
C
HE
D
A1
A
B
C
e0.0315 BSC0.80 BSC
0.291
E
H0.4140.39810.1110.51
0.020L
D0.6120.598
L
MAX
0.104
0.011
0.017
0.013
0.299
0.040
MILLIMETERS
MAX
MIN
2.65
2.44
0.29
0.10
0.44
0.30
0.23
0.32
7.407.60
0.511.02
15.2015.55
0∞-8∞
SSOP.EPS
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 36L SSOP, 0.80 MM PITCH
REV.DOCUMENT CONTROL NO.APPROVAL
21-0040E
1
1
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
D
D/2
E/2
(NE-1) X e
A1 A2
E
A
k
D2
C
L
D2/2
e
(ND-1) X e
C
L
ee
PACKAGE OUTLINE
36,40L THIN QFN, 6x6x0.8 mm
21-0141
b
E2/2
C
E2
L
k
L
C
L
D
QFN THIN 6x6x0.8.EPS
LL
1
2
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 27
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
PACKAGE OUTLINE
36, 40L THIN QFN, 6x6x0.8 mm
21-0141
2
D
2
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