The MAX6956 compact, serial-interfaced LED display
driver/I/O expander provide microprocessors with up to
28 ports. Each port is individually user configurable to
either a logic input, logic output, or common-anode
(CA) LED constant-current segment driver. Each port
configured as an LED segment driver behaves as a
digitally controlled constant-current sink, with 16 equal
current steps from 1.5mA to 24mA. The LED drivers are
suitable for both discrete LEDs and CA numeric and
alphanumeric LED digits.
Each port configured as a general-purpose I/O (GPIO)
can be either a push-pull logic output capable of sinking 10mA and sourcing 4.5mA, or a Schmitt logic input
with optional internal pullup. Seven ports feature configurable transition detection logic, which generates an
interrupt upon change of port logic level. The MAX6956
is controlled through an I2C™-compatible 2-wire serial
interface, and uses four-level logic to allow 16 I2C
addresses from only 2 select pins.
The MAX6956AAX and MAX6956ATL have 28 ports
and are available in 36-pin SSOP and 40-pin thin QFN
packages, respectively. The MAX6956AAI and
MAX6956ANI have 20 ports and are available in 28-pin
SSOP and 28-pin DIP packages, respectively.
For an SPI-interfaced version, refer to the MAX6957
data sheet. For a lower cost pin-compatible port
expander without the constant-current LED drive capability, refer to the MAX7300 data sheet.
Applications
Set-Top BoxesBar Graph Displays
Panel MetersIndustrial Controllers
White GoodsSystem Monitoring
Automotive
Features
♦ 400kbps I2C-Compatible Serial Interface
♦ 2.5V to 5.5V Operation
♦ -40°C to +125°C Temperature Range
♦ 20 or 28 I/O Ports, Each Configurable as
Constant-Current LED Driver
Push-Pull Logic Output
Schmitt Logic Input
Schmitt Logic Input with Internal Pullup
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Typical Operating Circuit appears at end of data sheet.
Ordering Information
Purchase of I2C components of Maxim Integrated Products, Inc.,
or one of its sublicensed Associated Companies, conveys a
license under the Philips I2C Patent Rights to use these components in an I
2
C system, provided that the system conforms to the
I
2
C Standard Specification as defined by Philips.
Pin Configurations continued at end of data sheet.
PARTTEMP RANGEPIN-PACKAGE
MAX6956ANI-40°C to +125°C28 DIP
MAX6956AAI-40°C to +125°C28 SSOP
MAX6956AAX-40°C to +125°C36 SSOP
MAX6956ATL-40°C to +125°C40 Thin QFN
TOP VIEW
ISET
1
GND
2
GND
3
AD0
4
P12
5
6
7
8
9
10
11
12
13
14
MAX6956
SSOP/DIP
P13
P14
P15
P16
P17
P18
P19
P20
P21
V+
28
AD1
27
SCL
26
SDA
25
P31
24
P30
23
P29
22
P28
21
P27
20
P26
19
P25
18
P24
17
P23
16
P22
15
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with Respect to GND)
V+ .............................................................................-0.3V to +6V
SCL, SDA, AD0, AD1................................................-0.3V to +6V
All Other Pins................................................-0.3V to (V+ + 0.3V)
P4–P31 Current ................................................................±30mA
GND Current .....................................................................800mA
Note 1: All parameters tested at TA= +25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4: C
b
= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 5: I
SINK
≤ 6mA. Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3V+ and 0.7V+.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
TIMING CHARACTERISTICS (Figure 2)
(V+ = 2.5V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.) (Note 1)
Port Drive LED Sink Current,
Port Configured as LED Driver
Port Drive Logic Sink Current,
Port Configured as LED Driver
V+ = 3.3V, V
current (Note 2)
V+ = 5.5V, V
current
V+ = 2.5V, V
current
V+ = 5.5V, V
current
= 2.3V at maximum LED
LED
= 2.4V at maximum LED
LED
= 2.4V at maximum LED
LED
= 0.6V at maximum sink
OUT
= 0.6V at maximum sink
OUT
9.513.518
18.52427.5
192530
18.52328
192428
✕
0.7
V+
0.3
-5050nA
= 6mA0.4V
✕
V+
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Serial Clock Frequencyf
Bus Free Time Between a STOP
and a START Condition
Hold Time (Repeated) START
Condition
Repeated START Condition
Setup Time
STOP Condition Setup Timet
Data Hold Timet
Data Setup Timet
SCL Clock Low Periodt
SCL Clock High Periodt
Rise Time of Both SDA and SCL
Signals, Receiving
Fall Time of Both SDA and SCL
Signals, Receiving
Fall Time of SDA Transmittingt
Pulse Width of Spike Suppressedt
Capacitive Load for Each Bus
Line
SCL
t
BUF
t
HD, STA
t
SU, STA
SU, STO
HD, DAT
SU, DAT
LOW
HIGH
t
t
,TX
F
SP
C
(Note 3)15900ns
(Notes 2, 4)
R
(Notes 2, 4)
F
(Notes 2, 5)
(Notes 2, 6)050ns
(Note 2)400pF
b
400kHz
1.3µs
0.6µs
0.6µs
0.6µs
100ns
1.3µs
0.7µs
20 +
0.1C
20 +
0.1C
20 +
0.1C
b
b
b
300ns
300ns
250ns
mA
mA
V
V
MAX6956
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
The MAX6956 LED driver/GPIO peripheral provides up
to 28 I/O ports, P4 to P31, controlled through an I2C-compatible serial interface. The ports can be configured to
any combination of constant-current LED drivers, logic
inputs and logic outputs, and default to logic inputs on
power-up. When fully configured as an LED driver, the
MAX6956 controls up to 28 LED segments with individual 16-step adjustment of the constant current through
each LED segment. A single resistor sets the maximum
segment current for all segments, with a maximum of
24mA per segment. The MAX6956 drives any combination of discrete LEDs and CA digits, including sevensegment and starburst alphanumeric types.
Figure 1 is the MAX6956 functional diagram. Any I/O
port can be configured as a push-pull output (sinking
10mA, sourcing 4.5mA), or a Schmitt-trigger logic
input. Each input has an individually selectable internal
pullup resistor. Additionally, transition detection allows
seven ports (P24 through P30) to be monitored in any
maskable combination for changes in their logic status.
A detected transition is flagged through a status register bit, as well as an interrupt pin (port P31), if desired.
The Typical Operating Circuit shows two MAX6956s
working together controlling three monocolor 16-seg-
ment-plus-DP displays, with five ports left available for
GPIO (P26–P31 of U2).
The port configuration registers set the 28 ports, P4 to
P31, individually as either LED drivers or GPIO. A pair
of bits in registers 0x09 through 0x0F sets each port’s
configuration (Tables 1 and 2).
The 36-pin MAX6956AAX has 28 ports, P4 to P31. The
28-pin MAX6956ANI and MAX6956AAI make only 20
ports available, P12 to P31. The eight unused ports
should be configured as outputs on power-up by writing 0x55 to registers 0x09 and 0x0A. If this is not done,
the eight unused ports remain as floating inputs and
quiescent supply current rises, although there is no
damage to the part.
Register Control of I/O Ports and LEDs
Across Multiple Drivers
The MAX6956 offers 20 or 28 I/O ports, depending on
package choice. These can be applied to a variety of
combinations of different display types, for example:
seven, 7-segment digits (Figure 7). This example
requires two MAX6956s, with one digit being driven by
both devices, half by one MAX6956, half by the other
(digit 4 in this example). The two drivers are static, and
therefore do not need to be synchronized. The
MAX6956 sees CA digits as multiple discrete LEDs. To
283635V+Positive Supply Voltage. Bypass V+ to GND with minimum 0.047µF capacitor.
SSOPT H I N Q F N
1–10, 12–19,
21–30
NAMEFUNCTION
Segment Current Setting. Connect ISET to GND through a resistor (R
set the maximum segment current.
Address Input 0. Sets device slave address. Connect to either GND, V+, SCL,
SDA to give four logic combinations. See Table 3.
LED Segment Drivers and GPIO. P12 to P31 can be configured as CA LED
drivers, GPIO outputs, CMOS logic inputs, or CMOS logic inputs with weak
pullup resistor.
LED Segment Drivers and GPIO. P4 to P31 can be configured as CA LED
P4–P31
drivers, GPIO outputs, CMOS logic inputs, or CMOS logic inputs with weak
pullup resistor.
Address Input 1. Sets device slave address. Connect to either GND, V+, SCL,
SDA to give four logic combinations. See Table 3.
ISET
) to
MAX6956
simplify access to displays that overlap two MAX6956s,
the MAX6956 provides four virtual ports, P0 through P3.
To update an overlapping digit, send the same code
twice as an eight-port write, once to P28 through P35 of
the first driver, and again to P0 through P7 of the second driver. The first driver ignores the last 4 bits and
the second driver ignores the first 4 bits.
Two addressing methods are available. Any single port
(bit) can be written (set/cleared) at once; or, any
sequence of eight ports can be written (set/cleared) in
any combination at once. There are no boundaries; it is
equally acceptable to write P0 through P7, P1 through
P8, or P31 through P38 (P32 through P38 are nonexistent, so the instructions to these bits are ignored).
Using 8-bit control, a seven-segment digit with a decimal point can be updated in a single byte-write, a 14-
segment digit with DP can be updated in two bytewrites, and 16-segment digits with DP can be updated
in two byte-writes plus a bit write. Also, discrete LEDs
and GPIO port bits can be lit and controlled individually
without affecting other ports.
Shutdown
When the MAX6956 is in shutdown mode, all ports are
forced to inputs (which an be read), and the pullup current sources are turned off. Data in the port and control
registers remain unaltered, so port configuration and
output levels are restored when the MAX6956 is taken
out of shutdown. The display driver can still be programmed while in shutdown mode. For minimum supply current in shutdown mode, logic inputs should be at
GND or V+ potential. Shutdown mode is exited by setting the S bit in the configuration register (Table 8).
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
Note: The logic is inverted between the two output modes; a high makes the output go low in LED segment driver mode (0x00) to
turn that segment on; in GPIO output mode (0x01), a high makes the output go high.
(
)
(
)
REGISTER
Port Configuration for P7, P6, P5, P40x09P7P6P5P4
Port Configuration for P11, P10, P9, P80x0AP11P10P9P8
Port Configuration for P15, P14, P13, P120x0BP15P14P13P12
Port Configuration for P19, P18, P17, P160x0CP19P18P17P16
Port Configuration for P23, P22, P21, P200x0DP23P22P21P20
Port Configuration for P27, P26, P25, P240x0EP27P26P25P24
Port Configuration for P31, P30, P29, P280x0FP31P30P29P28
ADDRESS
CODE (HEX)
D7D6D5D4D3D2D1D0
REGISTER DATA
MODEFUNCTION
OutputLED Segment Driver
OutputGPIO Output
Input
InputGPIO Input with Pullup
GPIO Input
Without Pullup
PORT
REGISTER
0x20–0x5F
Register bit = 0High impedance
Open-drain current sink, with sink
Register bit = 1
Register bit = 0Active-low logic output
Register bit = 1Active-high logic output
Register bit =
input logic level
current (up to 24mA) determined
by the appropriate current register
Schmitt logic input0x09 to 0x0F10
Schmitt logic input with pullup0x09 to 0x0F11
PIN BEHAVIOR
ADDRESS
CODE
HEX
0x09 to 0x0F00
0x09 to 0x0F01
CONFIGURATION
UPPERLOWER
PORT
BIT PAIR
Shutdown mode is temporarily overridden by the display test function.
Serial Interface
Serial Addressing
The MAX6956 operates as a slave that sends and
receives data through an I2C-compatible 2-wire interface. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and
from the MAX6956, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX6956 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7kΩ,
is required on SDA. The MAX6956 SCL line operates
only as an input. A pullup resistor, typically 4.7kΩ, is
required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX6956
7-bit slave address plus R/W bit (Figure 6), a register
address byte, one or more data bytes, and finally a
STOP condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit, which the
recipient uses to handshake receipt of each byte of
data (Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When
the master is transmitting to the MAX6956, the
MAX6956 generates the acknowledge bit because the
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
MAX6956 is the recipient. When the MAX6956 is transmitting to the master, the master generates the
acknowledge bit because the master is the recipient.
Slave Address
The MAX6956 has a 7-bit-long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/W bit. It is low for a write command, high for a read
command.
The first 3 bits (MSBs) of the MAX6956 slave address
are always 100. Slave address bits A3, A2, A1, and A0
are selected by address inputs, AD1 and AD0. These
two input pins may be connected to GND, V+, SDA, or
SCL. The MAX6956 has 16 possible slave addresses
(Table 3) and therefore, a maximum of 16 MAX6956
devices may share the same interface.
Message Format for Writing
the MAX6956
A write to the MAX6956 comprises the transmission of
the MAX6956’s slave address with the R/ W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command byte determines which register of the MAX6956
is to be written by the next byte, if received. If a STOP
condition is detected after the command byte is
received, then the MAX6956 takes no further action
(Figure 8) beyond storing the command byte.
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register of
the MAX6956 selected by the command byte (Figure 9). If
multiple data bytes are transmitted before a STOP condition is detected, these bytes are generally stored in subsequent MAX6956 internal registers because the command
byte address generally autoincrements (Table 4).
Message Format for Reading
The MAX6956 is read using the MAX6956’s internally
stored command byte as address pointer, the same
way the stored command byte is used as address
pointer for a write. The pointer generally autoincrements after each data byte is read using the same rules
as for a write (Table 4). Thus, a read is initiated by first
configuring the MAX6956’s command byte by perform-